This patch adds basic support for OMAP35x/DM37x SOM LV/Torpedo reference boards. It assumes U-boot is loaded to SDRAM with the help of another small bootloader (x-load) running from SRAM. Signed-off-by: Peter Barada <peter.barada@logicpd.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Igor Grinberg <grinberg@compulab.co.il>master
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#
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# (C) Copyright 2000, 2001, 2002
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = $(obj)lib$(BOARD).o
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COBJS-y := omap3logic.o
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COBJS := $(sort $(COBJS-y))
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SRCS := $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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$(LIB): $(obj).depend $(OBJS) |
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$(call cmd_link_o_target, $(OBJS))
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk |
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sinclude $(obj).depend |
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/*
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* (C) Copyright 2011 |
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* Logic Product Development <www.logicpd.com> |
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* |
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* Author : |
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* Peter Barada <peter.barada@logicpd.com> |
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* |
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* Derived from Beagle Board and 3430 SDP code by |
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* Richard Woodruff <r-woodruff2@ti.com> |
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* Syed Mohammed Khasim <khasim@ti.com> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#include <common.h> |
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#include <netdev.h> |
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#include <flash.h> |
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#include <nand.h> |
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#include <i2c.h> |
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#include <twl4030.h> |
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#include <asm/io.h> |
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#include <asm/arch/mmc_host_def.h> |
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#include <asm/arch/mux.h> |
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#include <asm/arch/mem.h> |
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#include <asm/arch/sys_proto.h> |
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#include <asm/gpio.h> |
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#include <asm/mach-types.h> |
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#include "omap3logic.h" |
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DECLARE_GLOBAL_DATA_PTR; |
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/*
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* two dimensional array of strucures containining board name and Linux |
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* machine IDs; row it selected based on CPU column is slected based |
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* on hsusb0_data5 pin having a pulldown resistor |
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*/ |
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static struct board_id { |
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char *name; |
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int machine_id; |
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} boards[2][2] = { |
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{ |
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{ |
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.name = "OMAP35xx SOM LV", |
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.machine_id = MACH_TYPE_OMAP3530_LV_SOM, |
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}, |
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{ |
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.name = "OMAP35xx Torpedo", |
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.machine_id = MACH_TYPE_OMAP3_TORPEDO, |
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}, |
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}, |
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{ |
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{ |
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.name = "DM37xx SOM LV", |
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.machine_id = MACH_TYPE_DM3730_SOM_LV, |
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}, |
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{ |
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.name = "DM37xx Torpedo", |
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.machine_id = MACH_TYPE_DM3730_TORPEDO, |
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}, |
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}, |
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}; |
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/*
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* BOARD_ID_GPIO - GPIO of pin with optional pulldown resistor on SOM LV |
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*/ |
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#define BOARD_ID_GPIO 189 /* hsusb0_data5 pin */ |
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/*
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* Routine: board_init |
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* Description: Early hardware init. |
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*/ |
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int board_init(void) |
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{ |
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struct board_id *board; |
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unsigned int val; |
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gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ |
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/* boot param addr */ |
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gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); |
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/*
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* To identify between a SOM LV and Torpedo module, |
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* a pulldown resistor is on hsusb0_data5 for the SOM LV module. |
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* Drive the pin (and let it soak), then read it back. |
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* If the pin is still high its a Torpedo. If low its a SOM LV |
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*/ |
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/* Mux hsusb0_data5 as a GPIO */ |
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MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M4)); |
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if (gpio_request(BOARD_ID_GPIO, "husb0_data5.gpio_189") == 0) { |
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/*
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* Drive BOARD_ID_GPIO - the pulldown resistor on the SOM LV |
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* will drain the voltage. |
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*/ |
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gpio_direction_output(BOARD_ID_GPIO, 0); |
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gpio_set_value(BOARD_ID_GPIO, 1); |
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/* Let it soak for a bit */ |
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sdelay(0x100); |
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/*
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* Read state of BOARD_ID_GPIO as an input and if its set. |
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* If so the board is a Torpedo |
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*/ |
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gpio_direction_input(BOARD_ID_GPIO); |
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val = gpio_get_value(BOARD_ID_GPIO); |
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gpio_free(BOARD_ID_GPIO); |
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board = &boards[!!(get_cpu_family() == CPU_OMAP36XX)][!!val]; |
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printf("Board: %s\n", board->name); |
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/* Set the machine_id passed to Linux */ |
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gd->bd->bi_arch_number = board->machine_id; |
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} |
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/* restore hsusb0_data5 pin as hsusb0_data5 */ |
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MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)); |
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return 0; |
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} |
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#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) |
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int board_mmc_init(bd_t *bis) |
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{ |
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return omap_mmc_init(0); |
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} |
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#endif |
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/*
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* Routine: misc_init_r |
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* Description: display die ID register |
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*/ |
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int misc_init_r(void) |
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{ |
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dieid_num_r(); |
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return 0; |
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} |
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#ifdef CONFIG_SMC911X |
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/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */ |
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static const u32 gpmc_lan92xx_config[] = { |
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NET_LAN92XX_GPMC_CONFIG1, |
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NET_LAN92XX_GPMC_CONFIG2, |
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NET_LAN92XX_GPMC_CONFIG3, |
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NET_LAN92XX_GPMC_CONFIG4, |
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NET_LAN92XX_GPMC_CONFIG5, |
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NET_LAN92XX_GPMC_CONFIG6, |
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}; |
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int board_eth_init(bd_t *bis) |
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{ |
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enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1], |
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CONFIG_SMC911X_BASE, GPMC_SIZE_16M); |
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return smc911x_initialize(0, CONFIG_SMC911X_BASE); |
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} |
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#endif |
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/*
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* IEN - Input Enable |
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* IDIS - Input Disable |
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* PTD - Pull type Down |
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* PTU - Pull type Up |
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* DIS - Pull type selection is inactive |
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* EN - Pull type selection is active |
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* M0 - Mode 0 |
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* The commented string gives the final mux configuration for that pin |
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*/ |
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/*
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* Routine: set_muxconf_regs |
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* Description: Setting up the configuration Mux registers specific to the |
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* hardware. Many pins need to be moved from protect to primary |
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* mode. |
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*/ |
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void set_muxconf_regs(void) |
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{ |
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/*GPMC*/ |
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MUX_VAL(CP(GPMC_A1), (IDIS | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_A2), (IDIS | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_A3), (IDIS | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_A4), (IDIS | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_A5), (IDIS | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_D8), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_D9), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_D10), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_D11), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_D12), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_D13), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_D14), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_D15), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_NCS0), (IDIS | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_NCS3), (IDIS | PTD | DIS | M0)); |
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MUX_VAL(CP(GPMC_NCS5), (IDIS | PTU | DIS | M4)); |
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MUX_VAL(CP(GPMC_NCS7), (IDIS | PTD | DIS | M1)); /*GPMC_IO_DIR*/ |
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MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)); |
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MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)); |
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/*Expansion card */ |
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MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)); |
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MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | EN | M0)); |
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/* Serial Console */ |
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MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)); |
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MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)); |
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MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)); |
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MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)); |
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/* I2C */ |
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MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)); |
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/*Control and debug */ |
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MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)); |
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MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)); |
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MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M0)); |
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MUX_VAL(CP(JTAG_nTRST), (IEN | PTD | DIS | M0)); |
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MUX_VAL(CP(SDRC_CKE0), (IDIS | PTU | EN | M0)); |
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} |
@ -0,0 +1,47 @@ |
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/*
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* (C) Copyright 2011 |
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* Logic Product Development <www.logicpd.com> |
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* |
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* Author: |
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* Peter Barada <peter.barada@logicpd.com> |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef _OMAP3LOGIC_H_ |
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#define _OMAP3LOGIC_H_ |
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/*
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* OMAP3 GPMC register settings for CS1 LAN922x |
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*/ |
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#define NET_LAN92XX_GPMC_CONFIG1 0x00001000 |
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#define NET_LAN92XX_GPMC_CONFIG2 0x00080801 |
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#define NET_LAN92XX_GPMC_CONFIG3 0x00000000 |
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#define NET_LAN92XX_GPMC_CONFIG4 0x08010801 |
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#define NET_LAN92XX_GPMC_CONFIG5 0x00080a0a |
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#define NET_LAN92XX_GPMC_CONFIG6 0x03000280 |
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const omap3_sysinfo sysinfo = { |
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DDR_DISCRETE, |
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"Logic DM37x/OMAP35x reference board", |
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"NAND", |
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}; |
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#endif |
@ -0,0 +1,362 @@ |
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/*
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* (C) Copyright 2011 Logic Product Development <www.logicpd.com> |
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* Peter Barada <peter.barada@logicpd.com> |
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* |
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* Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo |
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* reference boards. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#ifndef __CONFIG_H |
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#define __CONFIG_H |
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/*
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* High Level Configuration Options |
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*/ |
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#define CONFIG_OMAP /* in a TI OMAP core */ |
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#define CONFIG_OMAP34XX /* which is a 34XX */ |
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#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */ |
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#undef CONFIG_USE_IRQ /* no support for IRQs */ |
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#define CONFIG_SYS_TEXT_BASE 0x80400000 |
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#define CONFIG_SDRC /* The chip has SDRC controller */ |
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#include <asm/arch/cpu.h> /* get chip and board defs */ |
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#include <asm/arch/omap3.h> |
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/*
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* Display CPU and Board information |
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*/ |
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#define CONFIG_DISPLAY_CPUINFO |
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#define CONFIG_DISPLAY_BOARDINFO |
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/* Clock Defines */ |
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#define V_OSCK 26000000 /* Clock output from T2 */ |
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#define V_SCLK (V_OSCK >> 1) |
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#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */ |
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
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#define CONFIG_SETUP_MEMORY_TAGS |
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#define CONFIG_INITRD_TAG |
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#define CONFIG_REVISION_TAG |
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#define CONFIG_CMDLINE_EDITING /* cmd line edit/history */ |
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */ |
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/*
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* Size of malloc() pool |
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*/ |
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
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/* Sector */ |
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) |
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/*
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* Hardware drivers |
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*/ |
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/*
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* NS16550 Configuration |
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*/ |
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#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
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#define CONFIG_SYS_NS16550 |
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#define CONFIG_SYS_NS16550_SERIAL |
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#define CONFIG_SYS_NS16550_REG_SIZE (-4) |
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
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/*
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* select serial console configuration |
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*/ |
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#define CONFIG_CONS_INDEX 1 |
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#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1 |
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#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */ |
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|
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/* allow to overwrite serial and ethaddr */ |
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#define CONFIG_ENV_OVERWRITE |
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#define CONFIG_BAUDRATE 115200 |
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
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115200} |
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#define CONFIG_GENERIC_MMC |
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#define CONFIG_MMC |
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#define CONFIG_OMAP_HSMMC |
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#define CONFIG_DOS_PARTITION |
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|
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/* commands to include */ |
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#include <config_cmd_default.h> |
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|
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#define CONFIG_CMD_CACHE |
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#define CONFIG_CMD_EXT2 /* EXT2 Support */ |
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#define CONFIG_CMD_FAT /* FAT support */ |
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#define CONFIG_CMD_JFFS2 /* JFFS2 Support */ |
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#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ |
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
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#define MTDIDS_DEFAULT "nand0=omap2-nand.0" |
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#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\ |
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"1920k(u-boot),128k(u-boot-env),"\
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"4m(kernel),-(fs)" |
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|
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#define CONFIG_CMD_I2C /* I2C serial bus support */ |
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#define CONFIG_CMD_MMC /* MMC support */ |
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#define CONFIG_CMD_NAND /* NAND support */ |
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#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ |
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#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ |
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#define CONFIG_CMD_PING |
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#define CONFIG_CMD_DHCP |
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#define CONFIG_CMD_SETECPR /* Evaluate expressions */ |
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|
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#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ |
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#undef CONFIG_CMD_FPGA /* FPGA configuration Support */ |
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#undef CONFIG_CMD_IMI /* iminfo */ |
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#undef CONFIG_CMD_IMLS /* List all found images */ |
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|
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#define CONFIG_SYS_NO_FLASH |
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|
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/*
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* I2C |
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*/ |
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#define CONFIG_HARD_I2C |
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#define CONFIG_DRIVER_OMAP34XX_I2C |
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|
||||
#define CONFIG_SYS_I2C_SPEED 100000 |
||||
#define CONFIG_SYS_I2C_SLAVE 1 |
||||
#define CONFIG_SYS_I2C_BUS 0 |
||||
#define CONFIG_SYS_I2C_BUS_SELECT 1 |
||||
#define CONFIG_I2C_MULTI_BUS |
||||
|
||||
/*
|
||||
* TWL4030 |
||||
*/ |
||||
#define CONFIG_TWL4030_POWER |
||||
|
||||
/*
|
||||
* Board NAND Info. |
||||
*/ |
||||
#define CONFIG_SYS_NAND_QUIET_TEST |
||||
#define CONFIG_NAND_OMAP_GPMC |
||||
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
||||
/* to access nand */ |
||||
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
||||
/* to access nand at */ |
||||
/* CS0 */ |
||||
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ |
||||
/* NAND devices */ |
||||
#define CONFIG_JFFS2_NAND |
||||
/* nand device jffs2 lives on */ |
||||
#define CONFIG_JFFS2_DEV "nand0" |
||||
/* start of jffs2 partition */ |
||||
#define CONFIG_JFFS2_PART_OFFSET 0x680000 |
||||
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ |
||||
/* partition */ |
||||
|
||||
/* Environment information */ |
||||
#define CONFIG_BOOTDELAY 2 |
||||
|
||||
/*
|
||||
* PREBOOT assumes the 4.3" display is attached. User can interrupt |
||||
* and modify display variable to suit their needs. |
||||
*/ |
||||
#define CONFIG_PREBOOT \ |
||||
"echo ======================NOTICE============================;"\
|
||||
"echo \"The u-boot environment is not set.\";" \
|
||||
"echo \"If using a display a valid display varible for your panel\";" \
|
||||
"echo \"needs to be set.\";" \
|
||||
"echo \"Valid display options are:\";" \
|
||||
"echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
|
||||
"echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
|
||||
"echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
|
||||
"echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
|
||||
"echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
|
||||
"echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
|
||||
"echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
|
||||
"echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
|
||||
"echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
|
||||
"echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
|
||||
"setenv display 15;" \
|
||||
"setenv preboot;" \
|
||||
"saveenv;" |
||||
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \ |
||||
"loadaddr=0x81000000\0" \
|
||||
"bootfile=uImage\0" \
|
||||
"mtdids=" MTDIDS_DEFAULT "\0" \
|
||||
"mtdparts=" MTDPARTS_DEFAULT "\0" \
|
||||
"mmcdev=0\0" \
|
||||
"autoboot=if mmc rescan ${mmcdev}; then " \
|
||||
"if run loadbootscript; then " \
|
||||
"run bootscript; " \
|
||||
"else " \
|
||||
"run defaultboot;" \
|
||||
"fi; " \
|
||||
"else run defaultboot; fi\0" \
|
||||
"defaultboot=run mmcramboot\0" \
|
||||
"consoledevice=ttyO0\0" \
|
||||
"display=15\0" \
|
||||
"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
|
||||
"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
|
||||
"rotation=0\0" \
|
||||
"vrfb_arg=if itest ${rotation} -ne 0; then " \
|
||||
"setenv bootargs ${bootargs} omapfb.vrfb=y " \
|
||||
"omapfb.rotate=${rotation}; " \
|
||||
"fi\0" \
|
||||
"otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
|
||||
"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
|
||||
"common_bootargs=setenv bootargs ${bootargs} display=${display} " \
|
||||
"${otherbootargs};" \
|
||||
"run addmtdparts; " \
|
||||
"run vrfb_arg\0" \
|
||||
"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
|
||||
"bootscript=echo 'Running bootscript from mmc ...'; " \
|
||||
"source ${loadaddr}\0" \
|
||||
"loaduimage=mmc rescan ${mmcdev}; " \
|
||||
"fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
|
||||
"ramdisksize=64000\0" \
|
||||
"ramdiskaddr=0x82000000\0" \
|
||||
"ramdiskimage=rootfs.ext2.gz.uboot\0" \
|
||||
"ramargs=run setconsole; setenv bootargs console=${console} " \
|
||||
"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
|
||||
"mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
|
||||
"run ramargs; " \
|
||||
"run common_bootargs; " \
|
||||
"run dump_bootargs; " \
|
||||
"run loaduimage; " \
|
||||
"fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
|
||||
"bootm ${loadaddr} ${ramdiskaddr}\0" \
|
||||
"ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
|
||||
"run ramargs; " \
|
||||
"run common_bootargs; " \
|
||||
"run dump_bootargs; " \
|
||||
"tftpboot ${loadaddr} ${bootfile}; "\
|
||||
"tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
|
||||
"bootm ${loadaddr} ${ramdiskaddr}\0" |
||||
|
||||
#define CONFIG_BOOTCOMMAND \ |
||||
"run autoboot" |
||||
|
||||
#define CONFIG_AUTO_COMPLETE |
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */ |
||||
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
||||
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
||||
#define CONFIG_SYS_PROMPT "OMAP Logic # " |
||||
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
||||
/* Print Buffer Size */ |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
||||
sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
||||
/* Boot Argument Buffer Size */ |
||||
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
||||
/* memtest works on */ |
||||
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) |
||||
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ |
||||
0x01F00000) /* 31MB */ |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ |
||||
/* address */ |
||||
|
||||
/*
|
||||
* OMAP3 has 12 GP timers, they can be driven by the system clock |
||||
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
||||
* This rate is divided by a local divisor. |
||||
*/ |
||||
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
||||
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
||||
#define CONFIG_SYS_HZ 1000 |
||||
|
||||
/*
|
||||
* Stack sizes |
||||
* |
||||
* The stack sizes are set up in start.S using the settings below |
||||
*/ |
||||
#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ |
||||
|
||||
/*
|
||||
* Physical Memory Map |
||||
*/ |
||||
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ |
||||
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
||||
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 |
||||
|
||||
/*
|
||||
* FLASH and environment organization |
||||
*/ |
||||
|
||||
/* **** PISMO SUPPORT *** */ |
||||
|
||||
/* Configure the PISMO */ |
||||
#define PISMO1_NAND_SIZE GPMC_SIZE_128M |
||||
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
||||
|
||||
#if defined(CONFIG_CMD_NAND) |
||||
#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE |
||||
#elif defined(CONFIG_CMD_ONENAND) |
||||
#define CONFIG_SYS_FLASH_BASE PISMO1_ONEN_BASE |
||||
#endif |
||||
|
||||
/* Monitor at start of flash */ |
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
||||
|
||||
#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
||||
|
||||
#if defined(CONFIG_CMD_NAND) |
||||
#define CONFIG_NAND_OMAP_GPMC |
||||
#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 |
||||
#define CONFIG_ENV_IS_IN_NAND |
||||
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
||||
#endif |
||||
|
||||
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ |
||||
#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET |
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
||||
CONFIG_SYS_INIT_RAM_SIZE - \
|
||||
GENERATED_GBL_DATA_SIZE) |
||||
|
||||
/*
|
||||
* SMSC922x Ethernet |
||||
*/ |
||||
#if defined(CONFIG_CMD_NET) |
||||
|
||||
#define CONFIG_SMC911X |
||||
#define CONFIG_SMC911X_16_BIT |
||||
#define CONFIG_SMC911X_BASE 0x08000000 |
||||
|
||||
#endif /* (CONFIG_CMD_NET) */ |
||||
|
||||
/*
|
||||
* BOOTP fields |
||||
*/ |
||||
|
||||
#define CONFIG_BOOTP_SUBNETMASK 0x00000001 |
||||
#define CONFIG_BOOTP_GATEWAY 0x00000002 |
||||
#define CONFIG_BOOTP_HOSTNAME 0x00000004 |
||||
#define CONFIG_BOOTP_BOOTPATH 0x00000010 |
||||
|
||||
#endif /* __CONFIG_H */ |
Loading…
Reference in new issue