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@ -69,22 +69,14 @@ int stm32_gpio_config(const struct stm32_gpio_dsc *dsc, |
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setbits_le32(&STM32_RCC->ahb1enr, 1 << dsc->port); |
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i = (dsc->pin & 0x07) * 4; |
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clrbits_le32(&gpio_regs->afr[dsc->pin >> 3], (0xF << i)); |
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setbits_le32(&gpio_regs->afr[dsc->pin >> 3], ctl->af << i); |
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clrsetbits_le32(&gpio_regs->afr[dsc->pin >> 3], 0xF << i, ctl->af << i); |
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i = dsc->pin * 2; |
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clrbits_le32(&gpio_regs->moder, (0x3 << i)); |
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setbits_le32(&gpio_regs->moder, ctl->mode << i); |
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clrbits_le32(&gpio_regs->otyper, (0x3 << i)); |
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setbits_le32(&gpio_regs->otyper, ctl->otype << i); |
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clrbits_le32(&gpio_regs->ospeedr, (0x3 << i)); |
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setbits_le32(&gpio_regs->ospeedr, ctl->speed << i); |
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clrbits_le32(&gpio_regs->pupdr, (0x3 << i)); |
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setbits_le32(&gpio_regs->pupdr, ctl->pupd << i); |
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clrsetbits_le32(&gpio_regs->moder, 0x3 << i, ctl->mode << i); |
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clrsetbits_le32(&gpio_regs->otyper, 0x3 << i, ctl->otype << i); |
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clrsetbits_le32(&gpio_regs->ospeedr, 0x3 << i, ctl->speed << i); |
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clrsetbits_le32(&gpio_regs->pupdr, 0x3 << i, ctl->pupd << i); |
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rv = 0; |
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out: |
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