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13 changed files with
24 additions and
16 deletions
README
arch/arm/config.mk
arch/avr32/config.mk
arch/blackfin/config.mk
arch/i386/config.mk
arch/m68k/config.mk
arch/microblaze/config.mk
arch/mips/config.mk
arch/powerpc/config.mk
arch/sh/config.mk
arch/sparc/config.mk
examples/standalone/Makefile
include/configs/omap2420h4.h
@ -1997,6 +1997,14 @@ The following options need to be configured:
example, some LED's) on your board. At the moment,
the following checkpoints are implemented:
- Standalone program support:
CONFIG_STANDALONE_LOAD_ADDR
This option allows to define board specific values
for the address where standalone program gets loaded,
thus overwriting the architecutre dependent default
settings.
Legacy uImage format:
Arg Where When
@ -23,13 +23,11 @@
CROSS_COMPILE ?= arm-linux-
i f e q ( $( BOARD ) , o m a p 2 4 2 0 h 4 )
STANDALONE_LOAD_ADDR = 0x80300000
e l s e
i f n d e f C O N F I G _ S T A N D A L O N E _ L O A D _ A D D R
i f e q ( $( SOC ) , o m a p 3 )
STANDALONE_LOAD_ADDR = 0x80300000
CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
e l s e
STANDALONE_LOAD_ADDR = 0xc100000
CONFIG_ STANDALONE_LOAD_ADDR = 0xc100000
e n d i f
e n d i f
@ -23,7 +23,7 @@
CROSS_COMPILE ?= avr32-linux-
STANDALONE_LOAD_ADDR = 0x00000000
CONFIG_ STANDALONE_LOAD_ADDR ? = 0x00000000
PLATFORM_RELFLAGS += -ffixed-r5 -fPIC -mno-init-got -mrelax
PLATFORM_LDFLAGS += --relax
@ -23,7 +23,7 @@
CROSS_COMPILE ?= bfin-uclinux-
STANDALONE_LOAD_ADDR = 0x1000 -m elf32bfin
CONFIG_ STANDALONE_LOAD_ADDR ? = 0x1000 -m elf32bfin
i f e q ( $( CONFIG_BFIN_CPU ) , )
CONFIG_BFIN_CPU := \
@ -21,7 +21,7 @@
# MA 02111-1307 USA
#
STANDALONE_LOAD_ADDR = 0x40000
CONFIG_ STANDALONE_LOAD_ADDR ? = 0x40000
PLATFORM_CPPFLAGS += -fno-strict-aliasing
PLATFORM_CPPFLAGS += -Wstrict-prototypes
@ -24,7 +24,7 @@
CROSS_COMPILE ?= m68k-elf-
clibdir = $( shell dirname ` $( CC) $( CFLAGS) -print-file-name= libc.a` )
STANDALONE_LOAD_ADDR = 0x20000 -L $( clibdir)
CONFIG_ STANDALONE_LOAD_ADDR ? = 0x20000 -L $( clibdir)
PLATFORM_CPPFLAGS += -DCONFIG_M68K -D__M68K__
PLATFORM_LDFLAGS += -n
@ -26,6 +26,6 @@
CROSS_COMPILE ?= mb-
STANDALONE_LOAD_ADDR = 0x80F00000
CONFIG_ STANDALONE_LOAD_ADDR ? = 0x80F00000
PLATFORM_CPPFLAGS += -ffixed-r31 -D__microblaze__
@ -23,7 +23,7 @@
CROSS_COMPILE ?= mips_4KC-
STANDALONE_LOAD_ADDR = 0x80200000 -T mips.lds
CONFIG_ STANDALONE_LOAD_ADDR ? = 0x80200000 -T mips.lds
PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
@ -23,7 +23,7 @@
CROSS_COMPILE ?= ppc_8xx-
STANDALONE_LOAD_ADDR = 0x40000
CONFIG_ STANDALONE_LOAD_ADDR ? = 0x40000
LDFLAGS_FINAL += --gc-sections
PLATFORM_RELFLAGS += -fpic -mrelocatable -ffunction-sections -fdata-sections
PLATFORM_RELFLAGS += $( call cc-option,-msingle-pic-base,)
@ -23,9 +23,9 @@
CROSS_COMPILE ?= sh4-linux-
STANDALONE_LOAD_ADDR = 0x8C000000
CONFIG_ STANDALONE_LOAD_ADDR ? = 0x8C000000
i f e q ( $( CPU ) , s h 2 )
STANDALONE_LOAD_ADDR += -EB
CONFIG_ STANDALONE_LOAD_ADDR += -EB
e n d i f
PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__
@ -23,6 +23,6 @@
CROSS_COMPILE ?= sparc-elf-
STANDALONE_LOAD_ADDR = 0x00000000 -L $( gcclibdir) -T sparc.lds
CONFIG_ STANDALONE_LOAD_ADDR ? = 0x00000000 -L $( gcclibdir) -T sparc.lds
PLATFORM_CPPFLAGS += -DCONFIG_SPARC -D__sparc__
@ -95,7 +95,7 @@ $(LIB): $(obj).depend $(LIBOBJS)
$(ELF) :
$(obj)% : $( obj ) %.o $( LIB )
$( LD) -g -Ttext $( STANDALONE_LOAD_ADDR) \
$( LD) -g -Ttext $( CONFIG_ STANDALONE_LOAD_ADDR) \
-o $@ -e $( SYM_PREFIX) $( notdir $( <:.o= ) ) $< $( LIB) \
-L$( gcclibdir) -lgcc
@ -38,6 +38,8 @@
/*#define CONFIG_APTIX 1 #* define if on APTIX test chip */
/*#define CONFIG_VIRTIO 1 #* Using Virtio simulator */
# define CONFIG_STANDALONE_LOAD_ADDR 0x80300000
/* Clock config to target*/
# define PRCM_CONFIG_II 1
/* #define PRCM_CONFIG_III 1 */