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serial: serial_stm32: Rename status register flags

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Uart status register is named USART_ISR on STM32F7, STM32H7
and STM32MP1 SoCs family, but USART_SR only on STM32F4 SoCs.

Use USART_ISR_ prefix instead of USART_SR_ .

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
lime2-spi
Patrice Chotard 6 years ago committed by Tom Rini
parent 7b3b74d321
commit 8dc4e1fbf4
2 changed files with 8 additions and 8 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 10
      drivers/serial/serial_stm32.c
  2. 6
      drivers/serial/serial_stm32.h

10
drivers/serial/serial_stm32.c
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@ -45,10 +45,10 @@ static int stm32_serial_getc(struct udevice *dev)
fdt_addr_t base = plat->base;
u32 isr = readl(base + ISR_OFFSET(stm32f4));
if ((isr & USART_SR_FLAG_RXNE) == 0)
if ((isr & USART_ISR_FLAG_RXNE) == 0)
return -EAGAIN;
if (isr & USART_SR_FLAG_ORE) {
if (isr & USART_ISR_FLAG_ORE) {
if (!stm32f4)
setbits_le32(base + ICR_OFFSET, USART_ICR_OREF);
else
@ -65,7 +65,7 @@ static int stm32_serial_putc(struct udevice *dev, const char c)
bool stm32f4 = plat->uart_info->stm32f4;
fdt_addr_t base = plat->base;
if ((readl(base + ISR_OFFSET(stm32f4)) & USART_SR_FLAG_TXE) == 0)
if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_FLAG_TXE) == 0)
return -EAGAIN;
writel(c, base + TDR_OFFSET(stm32f4));
@ -81,10 +81,10 @@ static int stm32_serial_pending(struct udevice *dev, bool input)
if (input)
return readl(base + ISR_OFFSET(stm32f4)) &
USART_SR_FLAG_RXNE ? 1 : 0;
USART_ISR_FLAG_RXNE ? 1 : 0;
else
return readl(base + ISR_OFFSET(stm32f4)) &
USART_SR_FLAG_TXE ? 0 : 1;
USART_ISR_FLAG_TXE ? 0 : 1;
}
static int stm32_serial_probe(struct udevice *dev)

6
drivers/serial/serial_stm32.h
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@ -60,9 +60,9 @@ struct stm32x7_serial_platdata {
#define USART_CR3_OVRDIS BIT(12)
#define USART_SR_FLAG_ORE BIT(3)
#define USART_SR_FLAG_RXNE BIT(5)
#define USART_SR_FLAG_TXE BIT(7)
#define USART_ISR_FLAG_ORE BIT(3)
#define USART_ISR_FLAG_RXNE BIT(5)
#define USART_ISR_FLAG_TXE BIT(7)
#define USART_BRR_F_MASK GENMASK(7, 0)
#define USART_BRR_M_SHIFT 4

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