Add the base address map for Stratix10 SoC Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>lime2-spi
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/*
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* Copyright (C) 2016-2017 Intel Corporation <www.intel.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0 |
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*/ |
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#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_ |
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#define _SOCFPGA_S10_BASE_HARDWARE_H_ |
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#define SOCFPGA_SDR_SCHEDULER_ADDRESS 0xf8000400 |
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#define SOCFPGA_HMC_MMR_IO48_ADDRESS 0xf8010000 |
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#define SOCFPGA_SDR_ADDRESS 0xf8011000 |
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#define SOCFPGA_SMMU_ADDRESS 0xfa000000 |
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#define SOCFPGA_MAILBOX_ADDRESS 0xffa30000 |
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#define SOCFPGA_UART0_ADDRESS 0xffc02000 |
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#define SOCFPGA_UART1_ADDRESS 0xffc02100 |
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#define SOCFPGA_SPTIMER0_ADDRESS 0xffc03000 |
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#define SOCFPGA_SPTIMER1_ADDRESS 0xffc03100 |
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#define SOCFPGA_SYSTIMER0_ADDRESS 0xffd00000 |
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#define SOCFPGA_SYSTIMER1_ADDRESS 0xffd00100 |
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#define SOCFPGA_GTIMER_SEC_ADDRESS 0xffd01000 |
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#define SOCFPGA_GTIMER_NSEC_ADDRESS 0xffd02000 |
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#define SOCFPGA_CLKMGR_ADDRESS 0xffd10000 |
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#define SOCFPGA_RSTMGR_ADDRESS 0xffd11000 |
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#define SOCFPGA_SYSMGR_ADDRESS 0xffd12000 |
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#define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS 0xffd13000 |
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#define SOCFPGA_DMANONSECURE_ADDRESS 0xffda0000 |
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#define SOCFPGA_DMASECURE_ADDRESS 0xffda1000 |
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#define SOCFPGA_OCRAM_ADDRESS 0xffe00000 |
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#define GICD_BASE 0xfffc1000 |
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#define GICC_BASE 0xfffc2000 |
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#endif /* _SOCFPGA_S10_BASE_HARDWARE_H_ */ |
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