fsl/board/ddr: optimize board-specific cpo for erratum A-009942

Optimize board-specific cpo for erratum A-009942 on b4860qds,
ls1043aqds, ls1043ardb, ls1046aqds, ls1046ardb, ls2080ardb,
t102xqds, t102xrdb, t1040qds, t104xrdb, t208xqds, t208xrdb,
t4qds, t4rdb boards.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
master
Shengzhou Liu 8 years ago committed by York Sun
parent 473f1fc280
commit 90101386f1
  1. 3
      board/freescale/b4860qds/ddr.c
  2. 3
      board/freescale/ls1043aqds/ddr.c
  3. 3
      board/freescale/ls1043ardb/ddr.c
  4. 3
      board/freescale/ls1046aqds/ddr.c
  5. 3
      board/freescale/ls1046ardb/ddr.c
  6. 3
      board/freescale/ls2080ardb/ddr.c
  7. 3
      board/freescale/t102xqds/ddr.c
  8. 4
      board/freescale/t102xrdb/ddr.c
  9. 3
      board/freescale/t1040qds/ddr.c
  10. 2
      board/freescale/t104xrdb/ddr.c
  11. 3
      board/freescale/t208xqds/ddr.c
  12. 3
      board/freescale/t208xrdb/ddr.c
  13. 3
      board/freescale/t4qds/ddr.c
  14. 3
      board/freescale/t4rdb/ddr.c

@ -171,6 +171,9 @@ found:
/* DHC_EN =1, ODT = 75 Ohm */
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x3e;
}
phys_size_t initdram(int board_type)

@ -96,6 +96,9 @@ found:
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x59;
#else
popts->cswl_override = DDR_CSWL_CS0;

@ -91,6 +91,9 @@ found:
/* Enable ZQ calibration */
popts->zq_en = 1;
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x46;
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */

@ -87,6 +87,9 @@ found:
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x70;
}
phys_size_t initdram(int board_type)

@ -91,6 +91,9 @@ found:
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x70;
}
phys_size_t initdram(int board_type)

@ -134,6 +134,9 @@ found:
/* Enable ZQ calibration */
popts->zq_en = 1;
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x6e;
if (ddr_freq < 2350) {
if (pdimm[0].n_ranks == 2 && pdimm[1].n_ranks == 2) {
/* four chip-selects */

@ -139,6 +139,9 @@ found:
#else
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x5f;
#endif
/* T1023 supports max DDR bus 32bit width, T1024 supports DDR 64bit,

@ -139,6 +139,10 @@ found:
#ifdef CONFIG_T1023RDB
popts->wrlvl_ctl_2 = 0x07070606;
popts->half_strength_driver_enable = 1;
popts->cpo_sample = 0x43;
#elif defined(CONFIG_T1024RDB)
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x52;
#endif
}

@ -95,6 +95,9 @@ found:
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x69;
#else
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);

@ -77,6 +77,8 @@ found:
*/
#ifdef CONFIG_SYS_FSL_DDR4
popts->half_strength_driver_enable = 1;
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x59;
#else
popts->half_strength_driver_enable = 0;
#endif

@ -99,6 +99,9 @@ found:
/* DHC_EN =1, ODT = 75 Ohm */
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x64;
}
phys_size_t initdram(int board_type)

@ -92,6 +92,9 @@ found:
/* DHC_EN =1, ODT = 75 Ohm */
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x54;
}
phys_size_t initdram(int board_type)

@ -107,6 +107,9 @@ found:
/* DHC_EN =1, ODT = 75 Ohm */
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x63;
}
phys_size_t initdram(int board_type)

@ -100,6 +100,9 @@ found:
/* DHC_EN =1, ODT = 75 Ohm */
popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x64;
}
phys_size_t initdram(int board_type)

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