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@ -62,7 +62,7 @@ |
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#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" |
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#if defined(CONFIG_T1024RDB) |
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#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_nand_rcw.cfg |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_nand_rcw.cfg |
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#endif |
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#define CONFIG_SPL_NAND_BOOT |
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@ -81,7 +81,7 @@ |
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#endif |
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#if defined(CONFIG_T1024RDB) |
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#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_spi_rcw.cfg |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_spi_rcw.cfg |
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#endif |
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#define CONFIG_SPL_SPI_BOOT |
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@ -100,7 +100,7 @@ |
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#endif |
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#if defined(CONFIG_T1024RDB) |
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#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1024_sd_rcw.cfg |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t102xrdb/t1023_sd_rcw.cfg |
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#endif |
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#define CONFIG_SPL_MMC_BOOT |
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@ -177,7 +177,7 @@ |
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#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ |
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#if defined(CONFIG_T1024RDB) |
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#define CONFIG_ENV_SECT_SIZE 0x10000 |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define CONFIG_ENV_SECT_SIZE 0x40000 |
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#endif |
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#elif defined(CONFIG_SDCARD) |
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@ -192,7 +192,7 @@ |
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#define CONFIG_ENV_SIZE 0x2000 |
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#if defined(CONFIG_T1024RDB) |
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#define CONFIG_ENV_OFFSET (2 * CONFIG_SYS_NAND_BLOCK_SIZE) |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define CONFIG_ENV_OFFSET (10 * CONFIG_SYS_NAND_BLOCK_SIZE) |
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#endif |
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#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) |
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@ -277,7 +277,7 @@ unsigned long get_board_ddr_clk(void); |
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#define CONFIG_SYS_SPD_BUS_NUM 0 |
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#define SPD_EEPROM_ADDRESS 0x51 |
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#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define CONFIG_SYS_FSL_DDR4 |
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#define CONFIG_SYS_DDR_RAW_TIMING |
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#define CONFIG_SYS_SDRAM_SIZE 2048 |
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@ -303,7 +303,7 @@ unsigned long get_board_ddr_clk(void); |
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/* NOR Flash Timing Params */ |
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#if defined(CONFIG_T1024RDB) |
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#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(0) | \ |
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CSOR_NAND_TRHZ_80 | CSOR_NOR_ADM_SHFT_MODE_EN) |
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#endif |
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@ -378,7 +378,7 @@ unsigned long get_board_ddr_clk(void); |
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| CSOR_NAND_SPRZ_224 /* Spare size = 224 */ \
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| CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ |
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#define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ |
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| CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
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| CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
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@ -733,7 +733,7 @@ unsigned long get_board_ddr_clk(void); |
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#if defined(CONFIG_T1024RDB) |
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#define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE) |
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#define CONFIG_SYS_QE_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) |
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#define CONFIG_SYS_QE_FW_ADDR (12 * CONFIG_SYS_NAND_BLOCK_SIZE) |
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#endif |
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@ -766,7 +766,7 @@ unsigned long get_board_ddr_clk(void); |
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#define RGMII_PHY2_ADDR 0x6 |
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#define SGMII_AQR_PHY_ADDR 0x2 |
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#define FM1_10GEC1_PHY_ADDR 0x1 |
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#elif defined(CONFIG_T1023RDB) |
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#elif defined(CONFIG_TARGET_T1023RDB) |
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#define RGMII_PHY1_ADDR 0x1 |
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#define SGMII_RTK_PHY_ADDR 0x3 |
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#define SGMII_AQR_PHY_ADDR 0x2 |
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