This patch adds ddrc memory controller node in dts. size mentioned in dts is 0x30000, because we need to access DDR_QOS INTR registers located at fd090208 from this driver. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>master
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