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@ -28,11 +28,11 @@ |
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#define SDHCI_ARGUMENT 0x08 |
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#define SDHCI_TRANSFER_MODE 0x0C |
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#define SDHCI_TRNS_DMA 0x01 |
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#define SDHCI_TRNS_BLK_CNT_EN 0x02 |
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#define SDHCI_TRNS_ACMD12 0x04 |
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#define SDHCI_TRNS_READ 0x10 |
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#define SDHCI_TRNS_MULTI 0x20 |
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#define SDHCI_TRNS_DMA BIT(0) |
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#define SDHCI_TRNS_BLK_CNT_EN BIT(1) |
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#define SDHCI_TRNS_ACMD12 BIT(2) |
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#define SDHCI_TRNS_READ BIT(4) |
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#define SDHCI_TRNS_MULTI BIT(5) |
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#define SDHCI_COMMAND 0x0E |
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#define SDHCI_CMD_RESP_MASK 0x03 |
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@ -54,29 +54,29 @@ |
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#define SDHCI_BUFFER 0x20 |
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#define SDHCI_PRESENT_STATE 0x24 |
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#define SDHCI_CMD_INHIBIT 0x00000001 |
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#define SDHCI_DATA_INHIBIT 0x00000002 |
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#define SDHCI_DOING_WRITE 0x00000100 |
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#define SDHCI_DOING_READ 0x00000200 |
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#define SDHCI_SPACE_AVAILABLE 0x00000400 |
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#define SDHCI_DATA_AVAILABLE 0x00000800 |
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#define SDHCI_CARD_PRESENT 0x00010000 |
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#define SDHCI_CARD_STATE_STABLE 0x00020000 |
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#define SDHCI_CARD_DETECT_PIN_LEVEL 0x00040000 |
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#define SDHCI_WRITE_PROTECT 0x00080000 |
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#define SDHCI_CMD_INHIBIT BIT(0) |
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#define SDHCI_DATA_INHIBIT BIT(1) |
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#define SDHCI_DOING_WRITE BIT(8) |
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#define SDHCI_DOING_READ BIT(9) |
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#define SDHCI_SPACE_AVAILABLE BIT(10) |
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#define SDHCI_DATA_AVAILABLE BIT(11) |
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#define SDHCI_CARD_PRESENT BIT(16) |
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#define SDHCI_CARD_STATE_STABLE BIT(17) |
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#define SDHCI_CARD_DETECT_PIN_LEVEL BIT(18) |
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#define SDHCI_WRITE_PROTECT BIT(19) |
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#define SDHCI_HOST_CONTROL 0x28 |
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#define SDHCI_CTRL_LED 0x01 |
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#define SDHCI_CTRL_4BITBUS 0x02 |
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#define SDHCI_CTRL_HISPD 0x04 |
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#define SDHCI_CTRL_LED BIT(0) |
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#define SDHCI_CTRL_4BITBUS BIT(1) |
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#define SDHCI_CTRL_HISPD BIT(2) |
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#define SDHCI_CTRL_DMA_MASK 0x18 |
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#define SDHCI_CTRL_SDMA 0x00 |
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#define SDHCI_CTRL_ADMA1 0x08 |
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#define SDHCI_CTRL_ADMA32 0x10 |
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#define SDHCI_CTRL_ADMA64 0x18 |
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#define SDHCI_CTRL_8BITBUS 0x20 |
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#define SDHCI_CTRL_CD_TEST_INS 0x40 |
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#define SDHCI_CTRL_CD_TEST 0x80 |
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#define SDHCI_CTRL_8BITBUS BIT(5) |
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#define SDHCI_CTRL_CD_TEST_INS BIT(6) |
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#define SDHCI_CTRL_CD_TEST BIT(7) |
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#define SDHCI_POWER_CONTROL 0x29 |
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#define SDHCI_POWER_ON 0x01 |
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@ -87,9 +87,9 @@ |
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#define SDHCI_BLOCK_GAP_CONTROL 0x2A |
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#define SDHCI_WAKE_UP_CONTROL 0x2B |
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#define SDHCI_WAKE_ON_INT 0x01 |
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#define SDHCI_WAKE_ON_INSERT 0x02 |
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#define SDHCI_WAKE_ON_REMOVE 0x04 |
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#define SDHCI_WAKE_ON_INT BIT(0) |
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#define SDHCI_WAKE_ON_INSERT BIT(1) |
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#define SDHCI_WAKE_ON_REMOVE BIT(2) |
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#define SDHCI_CLOCK_CONTROL 0x2C |
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#define SDHCI_DIVIDER_SHIFT 8 |
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@ -97,10 +97,10 @@ |
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#define SDHCI_DIV_MASK 0xFF |
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#define SDHCI_DIV_MASK_LEN 8 |
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#define SDHCI_DIV_HI_MASK 0x300 |
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#define SDHCI_PROG_CLOCK_MODE 0x0020 |
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#define SDHCI_CLOCK_CARD_EN 0x0004 |
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#define SDHCI_CLOCK_INT_STABLE 0x0002 |
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#define SDHCI_CLOCK_INT_EN 0x0001 |
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#define SDHCI_PROG_CLOCK_MODE BIT(5) |
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#define SDHCI_CLOCK_CARD_EN BIT(2) |
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#define SDHCI_CLOCK_INT_STABLE BIT(1) |
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#define SDHCI_CLOCK_INT_EN BIT(0) |
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#define SDHCI_TIMEOUT_CONTROL 0x2E |
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@ -112,25 +112,25 @@ |
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#define SDHCI_INT_STATUS 0x30 |
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#define SDHCI_INT_ENABLE 0x34 |
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#define SDHCI_SIGNAL_ENABLE 0x38 |
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#define SDHCI_INT_RESPONSE 0x00000001 |
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#define SDHCI_INT_DATA_END 0x00000002 |
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#define SDHCI_INT_DMA_END 0x00000008 |
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#define SDHCI_INT_SPACE_AVAIL 0x00000010 |
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#define SDHCI_INT_DATA_AVAIL 0x00000020 |
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#define SDHCI_INT_CARD_INSERT 0x00000040 |
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#define SDHCI_INT_CARD_REMOVE 0x00000080 |
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#define SDHCI_INT_CARD_INT 0x00000100 |
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#define SDHCI_INT_ERROR 0x00008000 |
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#define SDHCI_INT_TIMEOUT 0x00010000 |
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#define SDHCI_INT_CRC 0x00020000 |
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#define SDHCI_INT_END_BIT 0x00040000 |
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#define SDHCI_INT_INDEX 0x00080000 |
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#define SDHCI_INT_DATA_TIMEOUT 0x00100000 |
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#define SDHCI_INT_DATA_CRC 0x00200000 |
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#define SDHCI_INT_DATA_END_BIT 0x00400000 |
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#define SDHCI_INT_BUS_POWER 0x00800000 |
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#define SDHCI_INT_ACMD12ERR 0x01000000 |
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#define SDHCI_INT_ADMA_ERROR 0x02000000 |
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#define SDHCI_INT_RESPONSE BIT(0) |
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#define SDHCI_INT_DATA_END BIT(1) |
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#define SDHCI_INT_DMA_END BIT(3) |
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#define SDHCI_INT_SPACE_AVAIL BIT(4) |
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#define SDHCI_INT_DATA_AVAIL BIT(5) |
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#define SDHCI_INT_CARD_INSERT BIT(6) |
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#define SDHCI_INT_CARD_REMOVE BIT(7) |
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#define SDHCI_INT_CARD_INT BIT(8) |
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#define SDHCI_INT_ERROR BIT(15) |
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#define SDHCI_INT_TIMEOUT BIT(16) |
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#define SDHCI_INT_CRC BIT(17) |
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#define SDHCI_INT_END_BIT BIT(18) |
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#define SDHCI_INT_INDEX BIT(19) |
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#define SDHCI_INT_DATA_TIMEOUT BIT(20) |
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#define SDHCI_INT_DATA_CRC BIT(21) |
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#define SDHCI_INT_DATA_END_BIT BIT(22) |
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#define SDHCI_INT_BUS_POWER BIT(23) |
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#define SDHCI_INT_ACMD12ERR BIT(24) |
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#define SDHCI_INT_ADMA_ERROR BIT(25) |
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#define SDHCI_INT_NORMAL_MASK 0x00007FFF |
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#define SDHCI_INT_ERROR_MASK 0xFFFF8000 |
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@ -156,15 +156,15 @@ |
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#define SDHCI_CLOCK_BASE_SHIFT 8 |
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#define SDHCI_MAX_BLOCK_MASK 0x00030000 |
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#define SDHCI_MAX_BLOCK_SHIFT 16 |
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#define SDHCI_CAN_DO_8BIT 0x00040000 |
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#define SDHCI_CAN_DO_ADMA2 0x00080000 |
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#define SDHCI_CAN_DO_ADMA1 0x00100000 |
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#define SDHCI_CAN_DO_HISPD 0x00200000 |
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#define SDHCI_CAN_DO_SDMA 0x00400000 |
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#define SDHCI_CAN_VDD_330 0x01000000 |
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#define SDHCI_CAN_VDD_300 0x02000000 |
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#define SDHCI_CAN_VDD_180 0x04000000 |
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#define SDHCI_CAN_64BIT 0x10000000 |
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#define SDHCI_CAN_DO_8BIT BIT(18) |
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#define SDHCI_CAN_DO_ADMA2 BIT(19) |
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#define SDHCI_CAN_DO_ADMA1 BIT(20) |
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#define SDHCI_CAN_DO_HISPD BIT(21) |
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#define SDHCI_CAN_DO_SDMA BIT(22) |
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#define SDHCI_CAN_VDD_330 BIT(24) |
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#define SDHCI_CAN_VDD_300 BIT(25) |
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#define SDHCI_CAN_VDD_180 BIT(26) |
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#define SDHCI_CAN_64BIT BIT(28) |
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#define SDHCI_CAPABILITIES_1 0x44 |
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#define SDHCI_CLOCK_MUL_MASK 0x00FF0000 |
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