powerpc: P5040: Remove macro CONFIG_P5040

Replace CONFIG_P5040 with ARCH_P5040 in Kconfig and clean up
existing macros.

Signed-off-by: York Sun <york.sun@nxp.com>

arch/powerpc/cpu/mpc85xx/Kconfig

@@ -56,6 +56,7 @@ config TARGET_P5020DS
 config TARGET_P5040DS
 	bool "Support P5040DS"
 	select PHYS_64BIT
+	select ARCH_P5040
 
 config TARGET_MPC8536DS
 	bool "Support MPC8536DS"
@@ -328,6 +329,9 @@ config ARCH_P4080
 config ARCH_P5020
 	bool
 
+config ARCH_P5040
+	bool
+
 source "board/freescale/b4860qds/Kconfig"
 source "board/freescale/bsc9131rdb/Kconfig"
 source "board/freescale/bsc9132qds/Kconfig"

arch/powerpc/cpu/mpc85xx/Makefile

@@ -43,7 +43,7 @@ obj-$(CONFIG_ARCH_P2041) += p2041_ids.o
 obj-$(CONFIG_ARCH_P3041) += p3041_ids.o
 obj-$(CONFIG_ARCH_P4080) += p4080_ids.o
 obj-$(CONFIG_ARCH_P5020) += p5020_ids.o
-obj-$(CONFIG_PPC_P5040) += p5040_ids.o
+obj-$(CONFIG_ARCH_P5040) += p5040_ids.o
 obj-$(CONFIG_PPC_T4240) += t4240_ids.o
 obj-$(CONFIG_PPC_T4160) += t4240_ids.o
 obj-$(CONFIG_PPC_T4080) += t4240_ids.o
@@ -85,7 +85,7 @@ obj-$(CONFIG_ARCH_P2041) += p2041_serdes.o
 obj-$(CONFIG_ARCH_P3041) += p3041_serdes.o
 obj-$(CONFIG_ARCH_P4080) += p4080_serdes.o
 obj-$(CONFIG_ARCH_P5020) += p5020_serdes.o
-obj-$(CONFIG_PPC_P5040) += p5040_serdes.o
+obj-$(CONFIG_ARCH_P5040) += p5040_serdes.o
 obj-$(CONFIG_PPC_T4240) += t4240_serdes.o
 obj-$(CONFIG_PPC_T4160) += t4240_serdes.o
 obj-$(CONFIG_PPC_T4080) += t4240_serdes.o

arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c

@@ -491,7 +491,7 @@ void fsl_serdes_init(void)
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 	int cfg;
 	serdes_corenet_t *srds_regs;
-#ifdef CONFIG_PPC_P5040
+#ifdef CONFIG_ARCH_P5040
 	serdes_corenet_t *srds2_regs;
 #endif
 	int lane, bank, idx;
@@ -577,7 +577,7 @@ void fsl_serdes_init(void)
 		}
 	}
 
-#ifdef CONFIG_PPC_P5040
+#ifdef CONFIG_ARCH_P5040
 	/*
 	 * Lanes on bank 4 on P5040 are commented-out, but for some SERDES
 	 * protocols, these lanes are routed to SATA.  We use serdes_prtcl_map

arch/powerpc/include/asm/config_mpc85xx.h

@@ -465,7 +465,7 @@
 #define CONFIG_SYS_FSL_ERRATUM_A006261
 #define CONFIG_SYS_FSL_A004447_SVR_REV	0x20
 
-#elif defined(CONFIG_PPC_P5040)
+#elif defined(CONFIG_ARCH_P5040)
 #define CONFIG_SYS_PPC64
 #define CONFIG_SYS_FSL_QORIQ_CHASSIS1
 #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */

arch/powerpc/include/asm/fsl_secure_boot.h

@@ -61,7 +61,7 @@
 #if defined(CONFIG_ARCH_P3041)	||	\
 	defined(CONFIG_ARCH_P4080) ||	\
 	defined(CONFIG_ARCH_P5020) ||	\
-	defined(CONFIG_PPC_P5040) ||	\
+	defined(CONFIG_ARCH_P5040) ||	\
 	defined(CONFIG_ARCH_P2041)
 	#define	CONFIG_FSL_TRUST_ARCH_v1
 #endif

arch/powerpc/include/asm/immap_85xx.h

@@ -1866,7 +1866,7 @@ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
 #define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_MII		0x00100000
 #define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_NONE		0x00180000
 #endif
-#if defined(CONFIG_PPC_P5040)
+#if defined(CONFIG_ARCH_P5040)
 #define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC5_RGMII        0x00000000
 #define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC5_MII          0x00800000
 #define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC5_NONE         0x00c00000

board/varisys/cyrus/eth.c

@@ -19,7 +19,7 @@
 #define FIRST_PORT_ADDR 3
 #define SECOND_PORT_ADDR 7
 
-#ifdef CONFIG_PPC_P5040
+#ifdef CONFIG_ARCH_P5040
 #define FIRST_PORT FM1_DTSEC5
 #define SECOND_PORT FM2_DTSEC5
 #else
@@ -83,7 +83,7 @@ int board_eth_init(bd_t *bis)
 			fm_disable_port(i);
 	}
 
-#ifdef CONFIG_PPC_P5040
+#ifdef CONFIG_ARCH_P5040
 	for (i = FM2_DTSEC2; i < FM2_DTSEC1 + CONFIG_SYS_NUM_FM2_DTSEC; i++) {
 		if (!IS_VALID_PORT(i))
 			fm_disable_port(i);

configs/Cyrus_P5040_defconfig

@@ -5,7 +5,7 @@ CONFIG_TARGET_CYRUS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000,PPC_P5040"
+CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SYS_TEXT_BASE=0xFFF40000,ARCH_P5040"
 CONFIG_BOOTDELAY=10
 CONFIG_CONSOLE_MUX=y
 CONFIG_HUSH_PARSER=y

drivers/net/fm/Makefile

@@ -23,7 +23,7 @@ obj-$(CONFIG_ARCH_P2041) += p5020.o
 obj-$(CONFIG_ARCH_P3041) += p5020.o
 obj-$(CONFIG_ARCH_P4080) += p4080.o
 obj-$(CONFIG_ARCH_P5020) += p5020.o
-obj-$(CONFIG_PPC_P5040) += p5040.o
+obj-$(CONFIG_ARCH_P5040) += p5040.o
 obj-$(CONFIG_PPC_T1040) += t1040.o
 obj-$(CONFIG_PPC_T1042)	+= t1040.o
 obj-$(CONFIG_PPC_T1020)	+= t1040.o

include/configs/P5040DS.h

@@ -9,7 +9,6 @@
  *
  */
 #define CONFIG_P5040DS
-#define CONFIG_PPC_P5040
 
 #define CONFIG_FSL_NGPIXIS		/* use common ngPIXIS code */
 

include/configs/cyrus.h

@@ -9,7 +9,7 @@
 
 #define CONFIG_CYRUS
 
-#if !defined(CONFIG_ARCH_P5020) && !defined(CONFIG_PPC_P5040)
+#if !defined(CONFIG_ARCH_P5020) && !defined(CONFIG_ARCH_P5040)
 #error Must call Cyrus CONFIG with a specific CPU enabled.
 #endif
 
@@ -33,7 +33,7 @@
 #if defined(CONFIG_ARCH_P5020)
 #define CONFIG_SYS_CLK_FREQ 133000000
 #define CONFIG_SYS_FSL_PBL_RCW board/varisys/cyrus/rcw_p5020_v2.cfg
-#elif defined(CONFIG_PPC_P5040)
+#elif defined(CONFIG_ARCH_P5040)
 #define CONFIG_SYS_CLK_FREQ 100000000
 #define CONFIG_SYS_FSL_PBL_RCW board/varisys/cyrus/rcw_p5040.cfg
 #endif

scripts/config_whitelist.txt

@@ -3643,7 +3643,6 @@ CONFIG_PPC64BRIDGE
 CONFIG_PPC_B4420
 CONFIG_PPC_B4860
 CONFIG_PPC_CLUSTER_START
-CONFIG_PPC_P5040
 CONFIG_PPC_SPINTABLE_COMPATIBLE
 CONFIG_PPC_T1023
 CONFIG_PPC_T1024