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ARM: uniphier: remove ifdef CONFIG_{SOC} conditionals from sg-regs.h

Browse Source 
To achieve the complete run-time configuration by device trees, ifdef
conditionals in header files are not preferable.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
master
Masahiro Yamada 10 years ago
parent d5ed8c5727
commit 9628afa7f5
11 changed files with 109 additions and 119 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 40
      arch/arm/mach-uniphier/include/mach/sg-regs.h
  2. 4
      arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S
  3. 46
      arch/arm/mach-uniphier/ph1-ld4/pinctrl.c
  4. 4
      arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S
  5. 50
      arch/arm/mach-uniphier/ph1-pro4/pinctrl.c
  6. 12
      arch/arm/mach-uniphier/ph1-sld3/early_pinctrl.c
  7. 4
      arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S
  8. 16
      arch/arm/mach-uniphier/ph1-sld3/pinctrl.c
  9. 2
      arch/arm/mach-uniphier/ph1-sld3/sbc_init.c
  10. 4
      arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S
  11. 46
      arch/arm/mach-uniphier/ph1-sld8/pinctrl.c

40
arch/arm/mach-uniphier/include/mach/sg-regs.h
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@ -53,24 +53,6 @@
/* Pin Control */
#define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000)
#if defined(CONFIG_MACH_PH1_PRO4)
# define SG_PINCTRL(n) (SG_PINCTRL_BASE + (n) * 8)
#elif defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \
defined(CONFIG_MACH_PH1_SLD8)
# define SG_PINCTRL(n) (SG_PINCTRL_BASE + (n) * 4)
#endif
#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_PRO4)
#define SG_PINSELBITS 4
#elif defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
#define SG_PINSELBITS 8
#endif
#define SG_PINSEL_ADDR(n) (SG_PINCTRL((n) * (SG_PINSELBITS) / 32))
#define SG_PINSEL_MASK(n) (~(((1 << (SG_PINSELBITS)) - 1) << \
((n) * (SG_PINSELBITS) % 32)))
#define SG_PINSEL_MODE(n, mode) ((mode) << ((n) * (SG_PINSELBITS) % 32))
/* Only for PH1-Pro4 */
#define SG_LOADPINCTRL (SG_CTRL_BASE | 0x1700)
@ -98,11 +80,11 @@
#ifdef __ASSEMBLY__
.macro set_pinsel, n, value, ra, rd
ldr \ra, =SG_PINSEL_ADDR(\n)
.macro sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd
ldr \ra, =(SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride)
ldr \rd, [\ra]
and \rd, \rd, #SG_PINSEL_MASK(\n)
orr \rd, \rd, #SG_PINSEL_MODE(\n, \value)
and \rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32))
orr \rd, \rd, #(\muxval << (\pin * \mux_bits % 32))
str \rd, [\ra]
.endm
@ -111,10 +93,18 @@
#include <linux/types.h>
#include <linux/io.h>
static inline void sg_set_pinsel(int n, int value)
static inline void sg_set_pinsel(unsigned pin, unsigned muxval,
unsigned mux_bits, unsigned reg_stride)
{
writel((readl(SG_PINSEL_ADDR(n)) & SG_PINSEL_MASK(n))
| SG_PINSEL_MODE(n, value), SG_PINSEL_ADDR(n));
unsigned shift = pin * mux_bits % 32;
unsigned reg = SG_PINCTRL_BASE + pin * mux_bits / 32 * reg_stride;
u32 mask = (1U << mux_bits) - 1;
u32 tmp;
tmp = readl(reg);
tmp &= ~(mask << shift);
tmp |= (mask & muxval) << shift;
writel(tmp, reg);
}
#endif /* __ASSEMBLY__ */

4
arch/arm/mach-uniphier/ph1-ld4/lowlevel_debug.S
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@ -17,8 +17,8 @@ ENTRY(setup_lowlevel_debug)
init_debug_uart r0, r1, r2
/* UART Port 0 */
set_pinsel 85, 1, r0, r1
set_pinsel 88, 1, r0, r1
sg_set_pinsel 85, 1, 8, 4, r0, r1
sg_set_pinsel 88, 1, 8, 4, r0, r1
ldr r0, =SG_IECTRL
ldr r1, [r0]

46
arch/arm/mach-uniphier/ph1-ld4/pinctrl.c
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@ -14,32 +14,32 @@ void pin_init(void)
/* Comment format: PAD Name -> Function Name */
#ifdef CONFIG_NAND_DENALI
sg_set_pinsel(158, 0); /* XNFRE -> XNFRE_GB */
sg_set_pinsel(159, 0); /* XNFWE -> XNFWE_GB */
sg_set_pinsel(160, 0); /* XFALE -> NFALE_GB */
sg_set_pinsel(161, 0); /* XFCLE -> NFCLE_GB */
sg_set_pinsel(162, 0); /* XNFWP -> XFNWP_GB */
sg_set_pinsel(163, 0); /* XNFCE0 -> XNFCE0_GB */
sg_set_pinsel(164, 0); /* NANDRYBY0 -> NANDRYBY0_GB */
sg_set_pinsel(22, 0); /* MMCCLK -> XFNCE1_GB */
sg_set_pinsel(23, 0); /* MMCCMD -> NANDRYBY1_GB */
sg_set_pinsel(24, 0); /* MMCDAT0 -> NFD0_GB */
sg_set_pinsel(25, 0); /* MMCDAT1 -> NFD1_GB */
sg_set_pinsel(26, 0); /* MMCDAT2 -> NFD2_GB */
sg_set_pinsel(27, 0); /* MMCDAT3 -> NFD3_GB */
sg_set_pinsel(28, 0); /* MMCDAT4 -> NFD4_GB */
sg_set_pinsel(29, 0); /* MMCDAT5 -> NFD5_GB */
sg_set_pinsel(30, 0); /* MMCDAT6 -> NFD6_GB */
sg_set_pinsel(31, 0); /* MMCDAT7 -> NFD7_GB */
sg_set_pinsel(158, 0, 8, 4); /* XNFRE -> XNFRE_GB */
sg_set_pinsel(159, 0, 8, 4); /* XNFWE -> XNFWE_GB */
sg_set_pinsel(160, 0, 8, 4); /* XFALE -> NFALE_GB */
sg_set_pinsel(161, 0, 8, 4); /* XFCLE -> NFCLE_GB */
sg_set_pinsel(162, 0, 8, 4); /* XNFWP -> XFNWP_GB */
sg_set_pinsel(163, 0, 8, 4); /* XNFCE0 -> XNFCE0_GB */
sg_set_pinsel(164, 0, 8, 4); /* NANDRYBY0 -> NANDRYBY0_GB */
sg_set_pinsel(22, 0, 8, 4); /* MMCCLK -> XFNCE1_GB */
sg_set_pinsel(23, 0, 8, 4); /* MMCCMD -> NANDRYBY1_GB */
sg_set_pinsel(24, 0, 8, 4); /* MMCDAT0 -> NFD0_GB */
sg_set_pinsel(25, 0, 8, 4); /* MMCDAT1 -> NFD1_GB */
sg_set_pinsel(26, 0, 8, 4); /* MMCDAT2 -> NFD2_GB */
sg_set_pinsel(27, 0, 8, 4); /* MMCDAT3 -> NFD3_GB */
sg_set_pinsel(28, 0, 8, 4); /* MMCDAT4 -> NFD4_GB */
sg_set_pinsel(29, 0, 8, 4); /* MMCDAT5 -> NFD5_GB */
sg_set_pinsel(30, 0, 8, 4); /* MMCDAT6 -> NFD6_GB */
sg_set_pinsel(31, 0, 8, 4); /* MMCDAT7 -> NFD7_GB */
#endif
#ifdef CONFIG_USB_EHCI_UNIPHIER
sg_set_pinsel(53, 0); /* USB0VBUS -> USB0VBUS */
sg_set_pinsel(54, 0); /* USB0OD -> USB0OD */
sg_set_pinsel(55, 0); /* USB1VBUS -> USB1VBUS */
sg_set_pinsel(56, 0); /* USB1OD -> USB1OD */
/* sg_set_pinsel(67, 23); */ /* PCOE -> USB2VBUS */
/* sg_set_pinsel(68, 23); */ /* PCWAIT -> USB2OD */
sg_set_pinsel(53, 0, 8, 4); /* USB0VBUS -> USB0VBUS */
sg_set_pinsel(54, 0, 8, 4); /* USB0OD -> USB0OD */
sg_set_pinsel(55, 0, 8, 4); /* USB1VBUS -> USB1VBUS */
sg_set_pinsel(56, 0, 8, 4); /* USB1OD -> USB1OD */
/* sg_set_pinsel(67, 23, 8, 4); */ /* PCOE -> USB2VBUS */
/* sg_set_pinsel(68, 23, 8, 4); */ /* PCWAIT -> USB2OD */
#endif
tmp = readl(SG_IECTRL);

4
arch/arm/mach-uniphier/ph1-pro4/lowlevel_debug.S
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@ -23,8 +23,8 @@ ENTRY(setup_lowlevel_debug)
init_debug_uart r0, r1, r2
/* UART Port 0 */
set_pinsel 127, 0, r0, r1
set_pinsel 128, 0, r0, r1
sg_set_pinsel 127, 0, 4, 8, r0, r1
sg_set_pinsel 128, 0, 4, 8, r0, r1
ldr r0, =SG_LOADPINCTRL
mov r1, #1

50
arch/arm/mach-uniphier/ph1-pro4/pinctrl.c
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@ -12,37 +12,37 @@ void pin_init(void)
/* Comment format: PAD Name -> Function Name */
#ifdef CONFIG_NAND_DENALI
sg_set_pinsel(40, 0); /* NFD0 -> NFD0 */
sg_set_pinsel(41, 0); /* NFD1 -> NFD1 */
sg_set_pinsel(42, 0); /* NFD2 -> NFD2 */
sg_set_pinsel(43, 0); /* NFD3 -> NFD3 */
sg_set_pinsel(44, 0); /* NFD4 -> NFD4 */
sg_set_pinsel(45, 0); /* NFD5 -> NFD5 */
sg_set_pinsel(46, 0); /* NFD6 -> NFD6 */
sg_set_pinsel(47, 0); /* NFD7 -> NFD7 */
sg_set_pinsel(48, 0); /* NFALE -> NFALE */
sg_set_pinsel(49, 0); /* NFCLE -> NFCLE */
sg_set_pinsel(50, 0); /* XNFRE -> XNFRE */
sg_set_pinsel(51, 0); /* XNFWE -> XNFWE */
sg_set_pinsel(52, 0); /* XNFWP -> XNFWP */
sg_set_pinsel(53, 0); /* XNFCE0 -> XNFCE0 */
sg_set_pinsel(54, 0); /* NRYBY0 -> NRYBY0 */
/* sg_set_pinsel(131, 1); */ /* RXD2 -> NRYBY1 */
/* sg_set_pinsel(132, 1); */ /* TXD2 -> XNFCE1 */
sg_set_pinsel(40, 0, 4, 8); /* NFD0 -> NFD0 */
sg_set_pinsel(41, 0, 4, 8); /* NFD1 -> NFD1 */
sg_set_pinsel(42, 0, 4, 8); /* NFD2 -> NFD2 */
sg_set_pinsel(43, 0, 4, 8); /* NFD3 -> NFD3 */
sg_set_pinsel(44, 0, 4, 8); /* NFD4 -> NFD4 */
sg_set_pinsel(45, 0, 4, 8); /* NFD5 -> NFD5 */
sg_set_pinsel(46, 0, 4, 8); /* NFD6 -> NFD6 */
sg_set_pinsel(47, 0, 4, 8); /* NFD7 -> NFD7 */
sg_set_pinsel(48, 0, 4, 8); /* NFALE -> NFALE */
sg_set_pinsel(49, 0, 4, 8); /* NFCLE -> NFCLE */
sg_set_pinsel(50, 0, 4, 8); /* XNFRE -> XNFRE */
sg_set_pinsel(51, 0, 4, 8); /* XNFWE -> XNFWE */
sg_set_pinsel(52, 0, 4, 8); /* XNFWP -> XNFWP */
sg_set_pinsel(53, 0, 4, 8); /* XNFCE0 -> XNFCE0 */
sg_set_pinsel(54, 0, 4, 8); /* NRYBY0 -> NRYBY0 */
/* sg_set_pinsel(131, 1, 4, 8); */ /* RXD2 -> NRYBY1 */
/* sg_set_pinsel(132, 1, 4, 8); */ /* TXD2 -> XNFCE1 */
#endif
#ifdef CONFIG_USB_XHCI_UNIPHIER
sg_set_pinsel(180, 0); /* USB0VBUS -> USB0VBUS */
sg_set_pinsel(181, 0); /* USB0OD -> USB0OD */
sg_set_pinsel(182, 0); /* USB1VBUS -> USB1VBUS */
sg_set_pinsel(183, 0); /* USB1OD -> USB1OD */
sg_set_pinsel(180, 0, 4, 8); /* USB0VBUS -> USB0VBUS */
sg_set_pinsel(181, 0, 4, 8); /* USB0OD -> USB0OD */
sg_set_pinsel(182, 0, 4, 8); /* USB1VBUS -> USB1VBUS */
sg_set_pinsel(183, 0, 4, 8); /* USB1OD -> USB1OD */
#endif
#ifdef CONFIG_USB_EHCI_UNIPHIER
sg_set_pinsel(184, 0); /* USB2VBUS -> USB2VBUS */
sg_set_pinsel(185, 0); /* USB2OD -> USB2OD */
sg_set_pinsel(187, 0); /* USB3VBUS -> USB3VBUS */
sg_set_pinsel(188, 0); /* USB3OD -> USB3OD */
sg_set_pinsel(184, 0, 4, 8); /* USB2VBUS -> USB2VBUS */
sg_set_pinsel(185, 0, 4, 8); /* USB2OD -> USB2OD */
sg_set_pinsel(187, 0, 4, 8); /* USB3VBUS -> USB3VBUS */
sg_set_pinsel(188, 0, 4, 8); /* USB3OD -> USB3OD */
#endif
writel(1, SG_LOADPINCTRL);

12
arch/arm/mach-uniphier/ph1-sld3/early_pinctrl.c
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@ -11,13 +11,13 @@ void early_pin_init(void)
/* Comment format: PAD Name -> Function Name */
#ifdef CONFIG_UNIPHIER_SERIAL
sg_set_pinsel(63, 0); /* RXD0 */
sg_set_pinsel(64, 1); /* TXD0 */
sg_set_pinsel(63, 0, 4, 4); /* RXD0 */
sg_set_pinsel(64, 1, 4, 4); /* TXD0 */
sg_set_pinsel(65, 0); /* RXD1 */
sg_set_pinsel(66, 1); /* TXD1 */
sg_set_pinsel(65, 0, 4, 4); /* RXD1 */
sg_set_pinsel(66, 1, 4, 4); /* TXD1 */
sg_set_pinsel(96, 2); /* RXD2 */
sg_set_pinsel(102, 2); /* TXD2 */
sg_set_pinsel(96, 2, 4, 4); /* RXD2 */
sg_set_pinsel(102, 2, 4, 4); /* TXD2 */
#endif
}

4
arch/arm/mach-uniphier/ph1-sld3/lowlevel_debug.S
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@ -26,8 +26,8 @@ ENTRY(setup_lowlevel_debug)
init_debug_uart r0, r1, r2
set_pinsel 63, 0, r0, r1
set_pinsel 64, 1, r0, r1
sg_set_pinsel 63, 0, 4, 4, r0, r1
sg_set_pinsel 64, 1, 4, 4, r0, r1
mov pc, lr
ENDPROC(setup_lowlevel_debug)

16
arch/arm/mach-uniphier/ph1-sld3/pinctrl.c
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@ -9,16 +9,16 @@
void pin_init(void)
{
#ifdef CONFIG_USB_EHCI_UNIPHIER
sg_set_pinsel(13, 0); /* USB0OC */
sg_set_pinsel(14, 1); /* USB0VBUS */
sg_set_pinsel(13, 0, 4, 4); /* USB0OC */
sg_set_pinsel(14, 1, 4, 4); /* USB0VBUS */
sg_set_pinsel(15, 0); /* USB1OC */
sg_set_pinsel(16, 1); /* USB1VBUS */
sg_set_pinsel(15, 0, 4, 4); /* USB1OC */
sg_set_pinsel(16, 1, 4, 4); /* USB1VBUS */
sg_set_pinsel(17, 0); /* USB2OC */
sg_set_pinsel(18, 1); /* USB2VBUS */
sg_set_pinsel(17, 0, 4, 4); /* USB2OC */
sg_set_pinsel(18, 1, 4, 4); /* USB2VBUS */
sg_set_pinsel(19, 0); /* USB3OC */
sg_set_pinsel(20, 1); /* USB3VBUS */
sg_set_pinsel(19, 0, 4, 4); /* USB3OC */
sg_set_pinsel(20, 1, 4, 4); /* USB3VBUS */
#endif
}

2
arch/arm/mach-uniphier/ph1-sld3/sbc_init.c
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@ -41,5 +41,5 @@ void sbc_init(void)
writel(0x0200be01, SBBASE1);
}
sg_set_pinsel(99, 1); /* GPIO26 -> EA24 */
sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */
}

4
arch/arm/mach-uniphier/ph1-sld8/lowlevel_debug.S
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@ -17,8 +17,8 @@ ENTRY(setup_lowlevel_debug)
init_debug_uart r0, r1, r2
/* UART Port 0 */
set_pinsel 70, 3, r0, r1
set_pinsel 71, 3, r0, r1
sg_set_pinsel 70, 3, 8, 4, r0, r1
sg_set_pinsel 71, 3, 8, 4, r0, r1
ldr r0, =SG_IECTRL
ldr r1, [r0]

46
arch/arm/mach-uniphier/ph1-sld8/pinctrl.c
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@ -12,31 +12,31 @@ void pin_init(void)
/* Comment format: PAD Name -> Function Name */
#ifdef CONFIG_NAND_DENALI
sg_set_pinsel(15, 0); /* XNFRE_GB -> XNFRE_GB */
sg_set_pinsel(16, 0); /* XNFWE_GB -> XNFWE_GB */
sg_set_pinsel(17, 0); /* XFALE_GB -> NFALE_GB */
sg_set_pinsel(18, 0); /* XFCLE_GB -> NFCLE_GB */
sg_set_pinsel(19, 0); /* XNFWP_GB -> XFNWP_GB */
sg_set_pinsel(20, 0); /* XNFCE0_GB -> XNFCE0_GB */
sg_set_pinsel(21, 0); /* NANDRYBY0_GB -> NANDRYBY0_GB */
sg_set_pinsel(22, 0); /* XFNCE1_GB -> XFNCE1_GB */
sg_set_pinsel(23, 0); /* NANDRYBY1_GB -> NANDRYBY1_GB */
sg_set_pinsel(24, 0); /* NFD0_GB -> NFD0_GB */
sg_set_pinsel(25, 0); /* NFD1_GB -> NFD1_GB */
sg_set_pinsel(26, 0); /* NFD2_GB -> NFD2_GB */
sg_set_pinsel(27, 0); /* NFD3_GB -> NFD3_GB */
sg_set_pinsel(28, 0); /* NFD4_GB -> NFD4_GB */
sg_set_pinsel(29, 0); /* NFD5_GB -> NFD5_GB */
sg_set_pinsel(30, 0); /* NFD6_GB -> NFD6_GB */
sg_set_pinsel(31, 0); /* NFD7_GB -> NFD7_GB */
sg_set_pinsel(15, 0, 8, 4); /* XNFRE_GB -> XNFRE_GB */
sg_set_pinsel(16, 0, 8, 4); /* XNFWE_GB -> XNFWE_GB */
sg_set_pinsel(17, 0, 8, 4); /* XFALE_GB -> NFALE_GB */
sg_set_pinsel(18, 0, 8, 4); /* XFCLE_GB -> NFCLE_GB */
sg_set_pinsel(19, 0, 8, 4); /* XNFWP_GB -> XFNWP_GB */
sg_set_pinsel(20, 0, 8, 4); /* XNFCE0_GB -> XNFCE0_GB */
sg_set_pinsel(21, 0, 8, 4); /* NANDRYBY0_GB -> NANDRYBY0_GB */
sg_set_pinsel(22, 0, 8, 4); /* XFNCE1_GB -> XFNCE1_GB */
sg_set_pinsel(23, 0, 8, 4); /* NANDRYBY1_GB -> NANDRYBY1_GB */
sg_set_pinsel(24, 0, 8, 4); /* NFD0_GB -> NFD0_GB */
sg_set_pinsel(25, 0, 8, 4); /* NFD1_GB -> NFD1_GB */
sg_set_pinsel(26, 0, 8, 4); /* NFD2_GB -> NFD2_GB */
sg_set_pinsel(27, 0, 8, 4); /* NFD3_GB -> NFD3_GB */
sg_set_pinsel(28, 0, 8, 4); /* NFD4_GB -> NFD4_GB */
sg_set_pinsel(29, 0, 8, 4); /* NFD5_GB -> NFD5_GB */
sg_set_pinsel(30, 0, 8, 4); /* NFD6_GB -> NFD6_GB */
sg_set_pinsel(31, 0, 8, 4); /* NFD7_GB -> NFD7_GB */
#endif
#ifdef CONFIG_USB_EHCI_UNIPHIER
sg_set_pinsel(41, 0); /* USB0VBUS -> USB0VBUS */
sg_set_pinsel(42, 0); /* USB0OD -> USB0OD */
sg_set_pinsel(43, 0); /* USB1VBUS -> USB1VBUS */
sg_set_pinsel(44, 0); /* USB1OD -> USB1OD */
/* sg_set_pinsel(114, 1); */ /* TXD1 -> USB2VBUS (shared with UART) */
/* sg_set_pinsel(115, 1); */ /* RXD1 -> USB2OD */
sg_set_pinsel(41, 0, 8, 4); /* USB0VBUS -> USB0VBUS */
sg_set_pinsel(42, 0, 8, 4); /* USB0OD -> USB0OD */
sg_set_pinsel(43, 0, 8, 4); /* USB1VBUS -> USB1VBUS */
sg_set_pinsel(44, 0, 8, 4); /* USB1OD -> USB1OD */
/* sg_set_pinsel(114, 1, 8, 4); */ /* TXD1 -> USB2VBUS (shared with UART) */
/* sg_set_pinsel(115, 1, 8, 4); */ /* RXD1 -> USB2OD */
#endif
}

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