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arm926ejs/at91/lowlevel_init.S: fix defines

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atmel rework changed define names which broke this file

Signed-off-by: Eric Bénard <eric@eukrea.com>
master
Eric Benard 14 years ago committed by Albert ARIBAUD
parent 576e7a10c4
commit 96fd99067f
5 changed files with 22 additions and 19 deletions
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  1. 24
      arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
  2. 14
      arch/arm/include/asm/arch-at91/at91_pio.h
  3. 1
      arch/arm/include/asm/arch-at91/at91sam9260.h
  4. 1
      arch/arm/include/asm/arch-at91/at91sam9261.h
  5. 1
      arch/arm/include/asm/arch-at91/at91sam9263.h

24
arch/arm/cpu/arm926ejs/at91/lowlevel_init.S
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@ -230,37 +230,37 @@ SMRDATA1:
.word CONFIG_SYS_SDRC_MDR_VAL
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL2
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL1
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL3
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL2
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL3
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL4
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL5
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL6
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL7
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL8
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL9
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL4
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL10
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL5
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL11
.word AT91_ASM_SDRAMC_TR
.word CONFIG_SYS_SDRC_TR_VAL2
.word AT91_SDRAM_BASE
.word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL12
/* User reset enable*/
.word AT91_ASM_RSTC_MR

14
arch/arm/include/asm/arch-at91/at91_pio.h
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@ -20,20 +20,20 @@
#define AT91_ASM_PIO_RANGE 0x200
#define AT91_ASM_PIOC_ASR \
(AT91_PIO_BASE + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x70)
(ATMEL_BASE_PIO + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x70)
#define AT91_ASM_PIOC_BSR \
(AT91_PIO_BASE + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x74)
(ATMEL_BASE_PIO + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x74)
#define AT91_ASM_PIOC_PDR \
(AT91_PIO_BASE + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x04)
(ATMEL_BASE_PIO + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x04)
#define AT91_ASM_PIOC_PUDR \
(AT91_PIO_BASE + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x60)
(ATMEL_BASE_PIO + AT91_PIO_PORTC * AT91_ASM_PIO_RANGE + 0x60)
#define AT91_ASM_PIOD_PDR \
(AT91_PIO_BASE + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x04)
(ATMEL_BASE_PIO + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x04)
#define AT91_ASM_PIOD_PUDR \
(AT91_PIO_BASE + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x60)
(ATMEL_BASE_PIO + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x60)
#define AT91_ASM_PIOD_ASR \
(AT91_PIO_BASE + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x70)
(ATMEL_BASE_PIO + AT91_PIO_PORTD * AT91_ASM_PIO_RANGE + 0x70)
#ifndef __ASSEMBLY__

1
arch/arm/include/asm/arch-at91/at91sam9260.h
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@ -141,6 +141,7 @@
*/
#define ATMEL_PIO_PORTS 3 /* these SoCs have 3 PIO */
#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
#define ATMEL_BASE_PIO ATMEL_BASE_PIOA
/*
* SoC specific defines

1
arch/arm/include/asm/arch-at91/at91sam9261.h
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@ -125,6 +125,7 @@
* Other misc defines
*/
#define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */
#define ATMEL_BASE_PIO ATMEL_BASE_PIOA
/*
* SoC specific defines

1
arch/arm/include/asm/arch-at91/at91sam9263.h
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@ -128,6 +128,7 @@
* Other misc defines
*/
#define ATMEL_PIO_PORTS 5 /* this SoCs has 5 PIO */
#define ATMEL_BASE_PIO ATMEL_BASE_PIOA
/*
* Cpu Name

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