The intention has always been (and boards are to support) an i2c EEPROM that will identify what hardware they are, allowing a single binary to support multiple boards. As such, remove the 'evm.c' file as there is nothing EVM centric in it currently, only SoC peripheral configuration. Signed-off-by: Tom Rini <trini@ti.com>master
Tom Rini
12 years ago
committed by
Albert ARIBAUD
parent
d4898ea896
commit
973b663820
@ -1,199 +0,0 @@ |
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/*
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* evm.c |
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* |
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation version 2. |
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* |
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any |
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* kind, whether express or implied; without even the implied warranty |
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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*/ |
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#include <common.h> |
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#include <errno.h> |
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#include <asm/io.h> |
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#include <asm/arch/cpu.h> |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/common_def.h> |
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#include <i2c.h> |
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#include <miiphy.h> |
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#include <cpsw.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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#define UART_RESET (0x1 << 1) |
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#define UART_CLK_RUNNING_MASK 0x1 |
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#define UART_SMART_IDLE_EN (0x1 << 0x3) |
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/* MII mode defines */ |
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#define MII_MODE_ENABLE 0x0 |
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#define RGMII_MODE_ENABLE 0xA |
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struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; |
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/*
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* I2C Address of on-board EEPROM |
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*/ |
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#define I2C_BASE_BOARD_ADDR 0x50 |
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#define NO_OF_MAC_ADDR 3 |
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#define ETH_ALEN 6 |
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#define NAME_LEN 8 |
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struct am335x_baseboard_id { |
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unsigned int magic; |
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char name[NAME_LEN]; |
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char version[4]; |
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char serial[12]; |
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char config[32]; |
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char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN]; |
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}; |
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static struct am335x_baseboard_id header; |
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static inline int board_is_bone(void) |
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{ |
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return !strncmp(header.name, "A335BONE", NAME_LEN); |
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} |
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/*
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* Read header information from EEPROM into global structure. |
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*/ |
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int read_eeprom(void) |
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{ |
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/* Check if baseboard eeprom is available */ |
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if (i2c_probe(I2C_BASE_BOARD_ADDR)) { |
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printf("Could not probe the EEPROM; something fundamentally " |
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"wrong on the I2C bus.\n"); |
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return -ENODEV; |
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} |
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/* read the eeprom using i2c */ |
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if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 2, (uchar *)&header, |
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sizeof(header))) { |
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printf("Could not read the EEPROM; something fundamentally" |
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" wrong on the I2C bus.\n"); |
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return -EIO; |
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} |
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if (header.magic != 0xEE3355AA) { |
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/*
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* read the eeprom using i2c again, |
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* but use only a 1 byte address |
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*/ |
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if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 1, (uchar *)&header, |
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sizeof(header))) { |
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printf("Could not read the EEPROM; something " |
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"fundamentally wrong on the I2C bus.\n"); |
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return -EIO; |
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} |
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if (header.magic != 0xEE3355AA) { |
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printf("Incorrect magic number in EEPROM\n"); |
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return -EINVAL; |
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} |
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} |
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return 0; |
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} |
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/*
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* Basic board specific setup |
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*/ |
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int board_init(void) |
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{ |
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enable_uart0_pin_mux(); |
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enable_i2c0_pin_mux(); |
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enable_i2c1_pin_mux(); |
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
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if (read_eeprom() < 0) |
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printf("Could not get board ID.\n"); |
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gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100; |
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return 0; |
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} |
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#ifdef CONFIG_DRIVER_TI_CPSW |
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static void cpsw_control(int enabled) |
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{ |
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/* VTP can be added here */ |
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return; |
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} |
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static struct cpsw_slave_data cpsw_slaves[] = { |
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{ |
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.slave_reg_ofs = 0x208, |
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.sliver_reg_ofs = 0xd80, |
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.phy_id = 0, |
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}, |
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{ |
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.slave_reg_ofs = 0x308, |
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.sliver_reg_ofs = 0xdc0, |
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.phy_id = 1, |
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}, |
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}; |
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static struct cpsw_platform_data cpsw_data = { |
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.mdio_base = AM335X_CPSW_MDIO_BASE, |
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.cpsw_base = AM335X_CPSW_BASE, |
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.mdio_div = 0xff, |
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.channels = 8, |
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.cpdma_reg_ofs = 0x800, |
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.slaves = 1, |
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.slave_data = cpsw_slaves, |
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.ale_reg_ofs = 0xd00, |
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.ale_entries = 1024, |
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.host_port_reg_ofs = 0x108, |
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.hw_stats_reg_ofs = 0x900, |
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.mac_control = (1 << 5), |
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.control = cpsw_control, |
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.host_port_num = 0, |
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.version = CPSW_CTRL_VERSION_2, |
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}; |
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int board_eth_init(bd_t *bis) |
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{ |
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uint8_t mac_addr[6]; |
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uint32_t mac_hi, mac_lo; |
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if (!eth_getenv_enetaddr("ethaddr", mac_addr)) { |
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debug("<ethaddr> not set. Reading from E-fuse\n"); |
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/* try reading mac address from efuse */ |
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mac_lo = readl(&cdev->macid0l); |
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mac_hi = readl(&cdev->macid0h); |
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mac_addr[0] = mac_hi & 0xFF; |
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mac_addr[1] = (mac_hi & 0xFF00) >> 8; |
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mac_addr[2] = (mac_hi & 0xFF0000) >> 16; |
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mac_addr[3] = (mac_hi & 0xFF000000) >> 24; |
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mac_addr[4] = mac_lo & 0xFF; |
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mac_addr[5] = (mac_lo & 0xFF00) >> 8; |
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if (is_valid_ether_addr(mac_addr)) |
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eth_setenv_enetaddr("ethaddr", mac_addr); |
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else |
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return -1; |
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} |
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if (board_is_bone()) { |
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enable_mii1_pin_mux(); |
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writel(MII_MODE_ENABLE, &cdev->miisel); |
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cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
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PHY_INTERFACE_MODE_MII; |
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} else { |
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enable_rgmii1_pin_mux(); |
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writel(RGMII_MODE_ENABLE, &cdev->miisel); |
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cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
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PHY_INTERFACE_MODE_RGMII; |
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} |
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return cpsw_register(&cpsw_data); |
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} |
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#endif |
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