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@ -565,6 +565,7 @@ |
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#define CONFIG_SYS_GPIO_PHY1_RST 12 |
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#define CONFIG_SYS_GPIO_FLASH_WP 14 |
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#define CONFIG_SYS_GPIO_PHY0_RST 22 |
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#define CONFIG_SYS_GPIO_PERM_VOLT_FEED 49 |
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#define CONFIG_SYS_GPIO_DSPIC_READY 51 |
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#define CONFIG_SYS_GPIO_CAN_ENABLE 53 |
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#define CONFIG_SYS_GPIO_LSB_ENABLE 54 |
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@ -577,6 +578,13 @@ |
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#define CONFIG_SYS_GPIO_SYSMON_STATUS 62 |
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#define CONFIG_SYS_GPIO_WATCHDOG 63 |
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/* On LCD4, GPIO49 has to be configured to 0 instead of 1 */ |
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#ifdef CONFIG_LCD4_LWMON5 |
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#define GPIO49_VAL 0 |
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#else |
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#define GPIO49_VAL 1 |
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#endif |
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/*
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* PPC440 GPIO Configuration |
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*/ |
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@ -635,7 +643,7 @@ |
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{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO46 UIC_IRQ(7) DMA_REQ(0) */ \
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{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO47 UIC_IRQ(8) DMA_ACK(0) */ \
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{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO48 UIC_IRQ(9) DMA_EOT/TC(0) */ \
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{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO49 Unselect via TraceSelect Bit */ \
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{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO49_VAL}, /* GPIO49 Unselect via TraceSelect Bit */ \
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{GPIO1_BASE, GPIO_IN, GPIO_SEL , GPIO_OUT_0}, /* GPIO50 Unselect via TraceSelect Bit */ \
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{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO51 Unselect via TraceSelect Bit */ \
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{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO52 Unselect via TraceSelect Bit */ \
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