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ARM: uniphier: split u-boot,dm-pre-reloc out to uniphier-v7-u-boot.dtsi

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UniPhier 32-bit SoCs use CONFIG_SPL_OF_CONTROL.  So, many nodes must
be marked as dm-pre-reloc to prevent fdtgrep from stripping them off.

Sprinkling U-Boot-specific properties all over the place is painful
because DT files are synced with Linux from time to time.

Split u-boot,dm-pre-reloc out to uniphier-v7-u-boot.dtsi, which is
appended to UniPhier V7 DTS before the build.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
master
Masahiro Yamada 7 years ago
parent d0df9588e8
commit 9ac0e7b37a
16 changed files with 63 additions and 135 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 9
      arch/arm/dts/uniphier-ld4-ref.dts
  2. 3
      arch/arm/dts/uniphier-ld4.dtsi
  3. 9
      arch/arm/dts/uniphier-ld6b-ref.dts
  4. 9
      arch/arm/dts/uniphier-pro4-ace.dts
  5. 9
      arch/arm/dts/uniphier-pro4-ref.dts
  6. 21
      arch/arm/dts/uniphier-pro4-sanji.dts
  7. 4
      arch/arm/dts/uniphier-pro4.dtsi
  8. 9
      arch/arm/dts/uniphier-pro5-4kbox.dts
  9. 4
      arch/arm/dts/uniphier-pro5.dtsi
  10. 21
      arch/arm/dts/uniphier-pxs2-gentil.dts
  11. 21
      arch/arm/dts/uniphier-pxs2-vodka.dts
  12. 4
      arch/arm/dts/uniphier-pxs2.dtsi
  13. 9
      arch/arm/dts/uniphier-sld8-ref.dts
  14. 3
      arch/arm/dts/uniphier-sld8.dtsi
  15. 61
      arch/arm/dts/uniphier-v7-u-boot.dtsi
  16. 2
      arch/arm/mach-uniphier/Kconfig

9
arch/arm/dts/uniphier-ld4-ref.dts
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@ -68,12 +68,3 @@
&usb1 {
status = "okay";
};
/* for U-Boot only */
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

3
arch/arm/dts/uniphier-ld4.dtsi
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@ -50,7 +50,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@ -295,11 +294,9 @@
compatible = "socionext,uniphier-ld4-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-ld4-pinctrl";
u-boot,dm-pre-reloc;
};
};

9
arch/arm/dts/uniphier-ld6b-ref.dts
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@ -70,12 +70,3 @@
&usb1 {
status = "okay";
};
/* for U-Boot only */
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

9
arch/arm/dts/uniphier-pro4-ace.dts
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@ -90,12 +90,3 @@
&usb3 {
status = "okay";
};
/* for U-Boot only */
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

9
arch/arm/dts/uniphier-pro4-ref.dts
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@ -83,12 +83,3 @@
&usb1 {
status = "okay";
};
/* for U-Boot only */
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

21
arch/arm/dts/uniphier-pro4-sanji.dts
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@ -85,24 +85,3 @@
&usb3 {
status = "okay";
};
/* for U-Boot only */
&serial0 {
u-boot,dm-pre-reloc;
};
&mio_clk {
u-boot,dm-pre-reloc;
};
&emmc {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};
&pinctrl_emmc {
u-boot,dm-pre-reloc;
};

4
arch/arm/dts/uniphier-pro4.dtsi
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@ -58,7 +58,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@ -224,7 +223,6 @@
compatible = "socionext,uniphier-pro4-mioctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;
u-boot,dm-pre-reloc;
mio_clk: clock {
compatible = "socionext,uniphier-pro4-mio-clock";
@ -333,11 +331,9 @@
compatible = "socionext,uniphier-pro4-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pro4-pinctrl";
u-boot,dm-pre-reloc;
};
};

9
arch/arm/dts/uniphier-pro5-4kbox.dts
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@ -55,12 +55,3 @@
&sd {
status = "okay";
};
/* for U-Boot only */
&serial1 {
u-boot,dm-pre-reloc;
};
&pinctrl_uart1 {
u-boot,dm-pre-reloc;
};

4
arch/arm/dts/uniphier-pro5.dtsi
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@ -132,7 +132,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@ -311,7 +310,6 @@
compatible = "socionext,uniphier-pro5-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
u-boot,dm-pre-reloc;
sd_clk: clock {
compatible = "socionext,uniphier-pro5-sd-clock";
@ -344,11 +342,9 @@
compatible = "socionext,uniphier-pro5-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pro5-pinctrl";
u-boot,dm-pre-reloc;
};
};

21
arch/arm/dts/uniphier-pxs2-gentil.dts
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@ -66,24 +66,3 @@
&usb1 {
status = "okay";
};
/* for U-Boot only */
&serial2 {
u-boot,dm-pre-reloc;
};
&sd_clk {
u-boot,dm-pre-reloc;
};
&emmc {
u-boot,dm-pre-reloc;
};
&pinctrl_uart2 {
u-boot,dm-pre-reloc;
};
&pinctrl_emmc {
u-boot,dm-pre-reloc;
};

21
arch/arm/dts/uniphier-pxs2-vodka.dts
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@ -49,24 +49,3 @@
&usb0 {
status = "okay";
};
/* for U-Boot only */
&serial2 {
u-boot,dm-pre-reloc;
};
&sd_clk {
u-boot,dm-pre-reloc;
};
&emmc {
u-boot,dm-pre-reloc;
};
&pinctrl_uart2 {
u-boot,dm-pre-reloc;
};
&pinctrl_emmc {
u-boot,dm-pre-reloc;
};

4
arch/arm/dts/uniphier-pxs2.dtsi
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@ -120,7 +120,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@ -297,7 +296,6 @@
compatible = "socionext,uniphier-pxs2-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
u-boot,dm-pre-reloc;
sd_clk: clock {
compatible = "socionext,uniphier-pxs2-sd-clock";
@ -365,11 +363,9 @@
compatible = "socionext,uniphier-pxs2-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pxs2-pinctrl";
u-boot,dm-pre-reloc;
};
};

9
arch/arm/dts/uniphier-sld8-ref.dts
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@ -72,12 +72,3 @@
&usb2 {
status = "okay";
};
/* for U-Boot only */
&serial0 {
u-boot,dm-pre-reloc;
};
&pinctrl_uart0 {
u-boot,dm-pre-reloc;
};

3
arch/arm/dts/uniphier-sld8.dtsi
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@ -50,7 +50,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@ -299,11 +298,9 @@
compatible = "socionext,uniphier-sld8-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-sld8-pinctrl";
u-boot,dm-pre-reloc;
};
};

61
arch/arm/dts/uniphier-v7-u-boot.dtsi
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@ -0,0 +1,61 @@
/ {
soc {
u-boot,dm-pre-reloc;
serial@54006800 {
u-boot,dm-pre-reloc;
};
serial@54006900 {
u-boot,dm-pre-reloc;
};
serial@54006a00 {
u-boot,dm-pre-reloc;
};
mioctrl@59810000 {
u-boot,dm-pre-reloc;
clock {
u-boot,dm-pre-reloc;
};
};
sdctrl@59810000 {
u-boot,dm-pre-reloc;
clock {
u-boot,dm-pre-reloc;
};
};
soc-glue@5f800000 {
u-boot,dm-pre-reloc;
pinctrl {
u-boot,dm-pre-reloc;
emmc_grp {
u-boot,dm-pre-reloc;
};
uart0_grp {
u-boot,dm-pre-reloc;
};
uart1_grp {
u-boot,dm-pre-reloc;
};
uart2_grp {
u-boot,dm-pre-reloc;
};
};
};
};
};
&emmc {
u-boot,dm-pre-reloc;
};

2
arch/arm/mach-uniphier/Kconfig
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@ -117,4 +117,6 @@ config CMD_DDRMPHY_DUMP
The command "ddrmphy" shows the resulting parameters of DDR Multi PHY
training; it is useful for the evaluation of DDR Multi PHY training.
config SYS_SOC
default "uniphier-v7" if ARCH_UNIPHIER_LD4_SLD8 || ARCH_UNIPHIER_V7_MULTI
endif

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