x86: ivybridge: Remove NORTHBRIDGE_INTEL_SANDYBRIDGE

NORTHBRIDGE_INTEL_SANDYBRIDGE is for sandybridge, not ivybridge.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
master
Bin Meng 9 years ago
parent 2317cf0970
commit 9bf76c21e0
  1. 1
      arch/x86/cpu/Makefile
  2. 33
      arch/x86/cpu/ivybridge/Kconfig

@ -22,7 +22,6 @@ obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
obj-$(CONFIG_SYS_COREBOOT) += coreboot/
obj-$(CONFIG_EFI_APP) += efi/
obj-$(CONFIG_QEMU) += qemu/
obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/
obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
obj-$(CONFIG_INTEL_QUARK) += quark/
obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/

@ -5,37 +5,11 @@
#
# SPDX-License-Identifier: GPL-2.0
config NORTHBRIDGE_INTEL_SANDYBRIDGE
bool
select CACHE_MRC_BIN
select CPU_INTEL_MODEL_206AX
config NORTHBRIDGE_INTEL_IVYBRIDGE
bool
select CACHE_MRC_BIN
select CPU_INTEL_MODEL_306AX
if NORTHBRIDGE_INTEL_SANDYBRIDGE
config VGA_BIOS_ID
string
default "8086,0106"
config CACHE_MRC_SIZE_KB
int
default 256
config DCACHE_RAM_BASE
hex
default 0xff7f0000
config DCACHE_RAM_SIZE
hex
default 0x10000
endif
if NORTHBRIDGE_INTEL_IVYBRIDGE
config VGA_BIOS_ID
@ -58,10 +32,6 @@ config DCACHE_RAM_SIZE
hex
default 0x20000
endif
if NORTHBRIDGE_INTEL_SANDYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE
config HAVE_MRC
bool "Add a System Agent binary"
help
@ -83,8 +53,7 @@ config DCACHE_RAM_MRC_VAR_SIZE
config MRC_FILE
string "Intel System Agent path and filename"
depends on HAVE_MRC
default "systemagent-ivybridge.bin" if NORTHBRIDGE_INTEL_IVYBRIDGE
default "systemagent-sandybridge.bin" if NORTHBRIDGE_INTEL_SANDYBRIDGE
default "systemagent-ivybridge.bin"
help
The path and filename of the file to use as System Agent
binary.

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