siemens,am33x: remove ddr3 delay workaround

Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Heiko Schocher <hs@denx.de>
master
Egli, Samuel 9 years ago committed by Tom Rini
parent 69b918b65d
commit 9d5108d8be
  1. 5
      board/siemens/draco/board.c

@ -196,11 +196,6 @@ struct ctrl_ioregs draco_ddr3_ioregs = {
config_ddr(DDR_PLL_FREQ, &draco_ddr3_ioregs, &draco_ddr3_data,
&draco_ddr3_cmd_ctrl_data, &draco_ddr3_emif_reg_data, 0);
/* For Samsung 2Gbit RAM we need this delay otherwise config fails after
* soft reset.
*/
udelay(2000);
}
static void spl_siemens_board_init(void)

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