From 822d43a6d90223db043d1610895c8e8b82e5ba5b Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 4 Nov 2014 13:27:52 +0100 Subject: [PATCH 1/2] microblaze: Enable hardware exception by default Enable hardware exception by default to be able to handle it. Signed-off-by: Michal Simek --- arch/microblaze/cpu/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 1757bbf..f466031 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -130,7 +130,7 @@ flush: bralid r15, flush_cache /* enable instruction and data cache */ mfs r12, rmsr - ori r12, r12, 0xa0 + ori r12, r12, 0x1a0 mts rmsr, r12 clear_bss: From da931af1b5eaae36dd9e3fb2eaf6b62201ed3a43 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 4 Nov 2014 13:30:14 +0100 Subject: [PATCH 2/2] microblaze: Support stack protection feature Ensure that stack didn't rewrite important part of u-boot. Signed-off-by: Michal Simek --- arch/microblaze/cpu/start.S | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index f466031..84c29e5 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -23,11 +23,15 @@ _start: mts rmsr, r0 /* disable cache */ + addi r8, r0, __end + mts rslr, r8 #if defined(CONFIG_SPL_BUILD) addi r1, r0, CONFIG_SPL_STACK_ADDR + mts rshr, r1 addi r1, r1, -4 /* Decrement SP to top of memory */ #else addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET + mts rshr, r1 addi r1, r1, -4 /* Decrement SP to top of memory */ /* Find-out if u-boot is running on BIG/LITTLE endian platform