dm: x86: Add a uclass for an Low Pin Count (LPC) device

On x86 systems this device is commonly used to provide legacy port access.
It is sort-of a replacement for the old ISA bus.

Add a uclass for this, and allow it to have child devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
master
Simon Glass 9 years ago
parent 452f548753
commit a274e9cac5
  1. 1
      arch/x86/lib/Makefile
  2. 28
      arch/x86/lib/lpc-uclass.c
  3. 1
      include/dm/uclass-id.h

@ -14,6 +14,7 @@ obj-$(CONFIG_HAVE_FSP) += cmd_hob.o
obj-y += gcc.o
obj-y += init_helpers.o
obj-y += interrupts.o
obj-y += lpc-uclass.o
obj-y += cmd_mtrr.o
obj-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
obj-$(CONFIG_SYS_PCAT_TIMER) += pcat_timer.o

@ -0,0 +1,28 @@
/*
* Copyright (c) 2015 Google, Inc
* Written by Simon Glass <sjg@chromium.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <dm/root.h>
static int lpc_uclass_post_bind(struct udevice *bus)
{
/*
* Scan the device tree for devices
*
* Before relocation, only bind devices marked for pre-relocation
* use.
*/
return dm_scan_fdt_node(bus, gd->fdt_blob, bus->of_offset,
gd->flags & GD_FLG_RELOC ? false : true);
}
UCLASS_DRIVER(lpc) = {
.id = UCLASS_LPC,
.name = "lpc",
.post_bind = lpc_uclass_post_bind,
};

@ -39,6 +39,7 @@ enum uclass_id {
UCLASS_PCI_GENERIC, /* Generic PCI bus device */
UCLASS_PCH, /* x86 platform controller hub */
UCLASS_ETH, /* Ethernet device */
UCLASS_LPC, /* x86 'low pin count' interface */
UCLASS_COUNT,
UCLASS_INVALID = -1,

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