Tom Rini
8 years ago
commit
a2cb31086f
@ -0,0 +1,5 @@ |
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/*
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <generated/asm-offsets.h> |
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@ -0,0 +1,61 @@ |
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/*
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* offset.c: Calculate pt_regs and task_struct offsets. |
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* |
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* Copyright (C) 1996 David S. Miller |
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* Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Ralf Baechle |
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
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* |
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* Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com |
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* Copyright (C) 2000 MIPS Technologies, Inc. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <asm/ptrace.h> |
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#include <linux/stddef.h> |
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#include <linux/kbuild.h> |
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void output_ptreg_defines(void) |
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{ |
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COMMENT("MIPS pt_regs offsets."); |
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OFFSET(PT_R0, pt_regs, regs[0]); |
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OFFSET(PT_R1, pt_regs, regs[1]); |
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OFFSET(PT_R2, pt_regs, regs[2]); |
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OFFSET(PT_R3, pt_regs, regs[3]); |
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OFFSET(PT_R4, pt_regs, regs[4]); |
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OFFSET(PT_R5, pt_regs, regs[5]); |
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OFFSET(PT_R6, pt_regs, regs[6]); |
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OFFSET(PT_R7, pt_regs, regs[7]); |
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OFFSET(PT_R8, pt_regs, regs[8]); |
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OFFSET(PT_R9, pt_regs, regs[9]); |
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OFFSET(PT_R10, pt_regs, regs[10]); |
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OFFSET(PT_R11, pt_regs, regs[11]); |
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OFFSET(PT_R12, pt_regs, regs[12]); |
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OFFSET(PT_R13, pt_regs, regs[13]); |
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OFFSET(PT_R14, pt_regs, regs[14]); |
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OFFSET(PT_R15, pt_regs, regs[15]); |
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OFFSET(PT_R16, pt_regs, regs[16]); |
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OFFSET(PT_R17, pt_regs, regs[17]); |
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OFFSET(PT_R18, pt_regs, regs[18]); |
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OFFSET(PT_R19, pt_regs, regs[19]); |
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OFFSET(PT_R20, pt_regs, regs[20]); |
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OFFSET(PT_R21, pt_regs, regs[21]); |
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OFFSET(PT_R22, pt_regs, regs[22]); |
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OFFSET(PT_R23, pt_regs, regs[23]); |
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OFFSET(PT_R24, pt_regs, regs[24]); |
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OFFSET(PT_R25, pt_regs, regs[25]); |
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OFFSET(PT_R26, pt_regs, regs[26]); |
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OFFSET(PT_R27, pt_regs, regs[27]); |
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OFFSET(PT_R28, pt_regs, regs[28]); |
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OFFSET(PT_R29, pt_regs, regs[29]); |
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OFFSET(PT_R30, pt_regs, regs[30]); |
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OFFSET(PT_R31, pt_regs, regs[31]); |
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OFFSET(PT_LO, pt_regs, lo); |
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OFFSET(PT_HI, pt_regs, hi); |
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OFFSET(PT_EPC, pt_regs, cp0_epc); |
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OFFSET(PT_BVADDR, pt_regs, cp0_badvaddr); |
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OFFSET(PT_STATUS, pt_regs, cp0_status); |
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OFFSET(PT_CAUSE, pt_regs, cp0_cause); |
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DEFINE(PT_SIZE, sizeof(struct pt_regs)); |
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BLANK(); |
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} |
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@ -0,0 +1,224 @@ |
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/* |
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* Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle |
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
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* Copyright (C) 2002, 2007 Maciej W. Rozycki |
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* Copyright (C) 2001, 2012 MIPS Technologies, Inc. All rights reserved. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <asm/asm.h> |
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#include <asm/regdef.h> |
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#include <asm/mipsregs.h> |
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#include <asm/asm-offsets.h> |
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#define STATMASK 0x1f |
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.set noreorder
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/* |
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* Macros copied and adapted from Linux MIPS |
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*/ |
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.macro SAVE_AT
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.set push
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.set noat
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LONG_S $1, PT_R1(sp) |
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.set pop
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.endm |
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.macro SAVE_TEMP
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#if __mips_isa_rev < 6 |
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mfhi v1 |
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#endif |
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#ifdef CONFIG_32BIT |
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LONG_S $8, PT_R8(sp) |
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LONG_S $9, PT_R9(sp) |
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#endif |
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LONG_S $10, PT_R10(sp) |
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LONG_S $11, PT_R11(sp) |
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LONG_S $12, PT_R12(sp) |
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#if __mips_isa_rev < 6 |
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LONG_S v1, PT_HI(sp) |
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mflo v1 |
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#endif |
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LONG_S $13, PT_R13(sp) |
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LONG_S $14, PT_R14(sp) |
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LONG_S $15, PT_R15(sp) |
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LONG_S $24, PT_R24(sp) |
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#if __mips_isa_rev < 6 |
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LONG_S v1, PT_LO(sp) |
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#endif |
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.endm |
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.macro SAVE_STATIC
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LONG_S $16, PT_R16(sp) |
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LONG_S $17, PT_R17(sp) |
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LONG_S $18, PT_R18(sp) |
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LONG_S $19, PT_R19(sp) |
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LONG_S $20, PT_R20(sp) |
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LONG_S $21, PT_R21(sp) |
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LONG_S $22, PT_R22(sp) |
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LONG_S $23, PT_R23(sp) |
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LONG_S $30, PT_R30(sp) |
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.endm |
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.macro SAVE_SOME
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.set push
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.set noat
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PTR_SUBU k1, sp, PT_SIZE |
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LONG_S sp, PT_R29(k1) |
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move sp, k1 |
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LONG_S $3, PT_R3(sp) |
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LONG_S $0, PT_R0(sp) |
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mfc0 v1, CP0_STATUS |
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LONG_S $2, PT_R2(sp) |
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LONG_S v1, PT_STATUS(sp) |
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LONG_S $4, PT_R4(sp) |
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mfc0 v1, CP0_CAUSE |
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LONG_S $5, PT_R5(sp) |
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LONG_S v1, PT_CAUSE(sp) |
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LONG_S $6, PT_R6(sp) |
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MFC0 v1, CP0_EPC |
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LONG_S $7, PT_R7(sp) |
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#ifdef CONFIG_64BIT |
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LONG_S $8, PT_R8(sp) |
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LONG_S $9, PT_R9(sp) |
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#endif |
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LONG_S v1, PT_EPC(sp) |
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LONG_S $25, PT_R25(sp) |
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LONG_S $28, PT_R28(sp) |
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LONG_S $31, PT_R31(sp) |
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.set pop
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.endm |
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.macro RESTORE_AT
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.set push
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.set noat
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LONG_L $1, PT_R1(sp) |
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.set pop
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.endm |
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.macro RESTORE_TEMP
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#if __mips_isa_rev < 6 |
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LONG_L $24, PT_LO(sp) |
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mtlo $24 |
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LONG_L $24, PT_HI(sp) |
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mthi $24 |
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#endif |
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#ifdef CONFIG_32BIT |
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LONG_L $8, PT_R8(sp) |
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LONG_L $9, PT_R9(sp) |
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#endif |
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LONG_L $10, PT_R10(sp) |
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LONG_L $11, PT_R11(sp) |
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LONG_L $12, PT_R12(sp) |
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LONG_L $13, PT_R13(sp) |
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LONG_L $14, PT_R14(sp) |
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LONG_L $15, PT_R15(sp) |
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LONG_L $24, PT_R24(sp) |
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.endm |
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.macro RESTORE_STATIC
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LONG_L $16, PT_R16(sp) |
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LONG_L $17, PT_R17(sp) |
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LONG_L $18, PT_R18(sp) |
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LONG_L $19, PT_R19(sp) |
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LONG_L $20, PT_R20(sp) |
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LONG_L $21, PT_R21(sp) |
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LONG_L $22, PT_R22(sp) |
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LONG_L $23, PT_R23(sp) |
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LONG_L $30, PT_R30(sp) |
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.endm |
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.macro RESTORE_SOME
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.set push
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.set reorder
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.set noat
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mfc0 a0, CP0_STATUS |
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ori a0, STATMASK |
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xori a0, STATMASK |
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mtc0 a0, CP0_STATUS |
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li v1, ST0_CU1 | ST0_FR | ST0_IM |
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and a0, v1 |
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LONG_L v0, PT_STATUS(sp) |
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nor v1, $0, v1 |
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and v0, v1 |
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or v0, a0 |
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mtc0 v0, CP0_STATUS |
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LONG_L v1, PT_EPC(sp) |
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MTC0 v1, CP0_EPC |
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LONG_L $31, PT_R31(sp) |
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LONG_L $28, PT_R28(sp) |
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LONG_L $25, PT_R25(sp) |
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#ifdef CONFIG_64BIT |
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LONG_L $8, PT_R8(sp) |
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LONG_L $9, PT_R9(sp) |
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#endif |
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LONG_L $7, PT_R7(sp) |
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LONG_L $6, PT_R6(sp) |
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LONG_L $5, PT_R5(sp) |
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LONG_L $4, PT_R4(sp) |
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LONG_L $3, PT_R3(sp) |
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LONG_L $2, PT_R2(sp) |
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.set pop
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.endm |
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.macro RESTORE_SP
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LONG_L sp, PT_R29(sp) |
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.endm |
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NESTED(except_vec3_generic, 0, sp) |
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PTR_LA k1, handle_reserved |
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jr k1 |
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nop |
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END(except_vec3_generic) |
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NESTED(except_vec_ejtag_debug, 0, sp) |
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PTR_LA k1, handle_ejtag_debug |
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jr k1 |
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nop |
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END(except_vec_ejtag_debug) |
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NESTED(handle_reserved, PT_SIZE, sp) |
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SAVE_SOME |
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SAVE_AT |
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SAVE_TEMP |
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SAVE_STATIC |
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PTR_LA t9, do_reserved |
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jr t9 |
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move a0, sp |
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END(handle_reserved) |
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NESTED(handle_ejtag_debug, PT_SIZE, sp) |
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.set push
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.set noat
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MTC0 k1, CP0_DESAVE |
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/* Check for SDBBP */ |
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MFC0 k1, CP0_DEBUG |
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sll k1, k1, 30 |
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bgez k1, ejtag_return |
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nop |
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SAVE_SOME |
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SAVE_AT |
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SAVE_TEMP |
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SAVE_STATIC |
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PTR_LA t9, do_ejtag_debug |
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jalr t9 |
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move a0, sp |
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RESTORE_TEMP |
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RESTORE_STATIC |
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RESTORE_AT |
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RESTORE_SOME |
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RESTORE_SP |
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ejtag_return: |
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MFC0 k1, CP0_DESAVE |
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deret |
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.set pop
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END(handle_ejtag_debug) |
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@ -0,0 +1,19 @@ |
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/*
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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int arch_reserve_stacks(void) |
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{ |
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/* reserve space for exception vector table */ |
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gd->start_addr_sp -= 0x500; |
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gd->start_addr_sp &= ~0xFFF; |
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gd->irq_sp = gd->start_addr_sp; |
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debug("Reserving %d Bytes for exception vector at: %08lx\n", |
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0x500, gd->start_addr_sp); |
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return 0; |
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} |
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@ -0,0 +1,106 @@ |
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/*
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* Copyright (C) 1994 - 1999, 2000, 01, 06 Ralf Baechle |
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* Copyright (C) 1995, 1996 Paul M. Antoine |
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* Copyright (C) 1998 Ulf Carlsson |
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* Copyright (C) 1999 Silicon Graphics, Inc. |
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* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com |
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* Copyright (C) 2002, 2003, 2004, 2005, 2007 Maciej W. Rozycki |
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* Copyright (C) 2000, 2001, 2012 MIPS Technologies, Inc. All rights reserved. |
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* Copyright (C) 2014, Imagination Technologies Ltd. |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/mipsregs.h> |
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#include <asm/addrspace.h> |
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#include <asm/system.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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static void show_regs(const struct pt_regs *regs) |
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{ |
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const int field = 2 * sizeof(unsigned long); |
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unsigned int cause = regs->cp0_cause; |
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unsigned int exccode; |
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int i; |
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/*
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* Saved main processor registers |
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*/ |
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for (i = 0; i < 32; ) { |
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if ((i % 4) == 0) |
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printf("$%2d :", i); |
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if (i == 0) |
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printf(" %0*lx", field, 0UL); |
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else if (i == 26 || i == 27) |
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printf(" %*s", field, ""); |
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else |
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printf(" %0*lx", field, regs->regs[i]); |
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i++; |
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if ((i % 4) == 0) |
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puts("\n"); |
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} |
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printf("Hi : %0*lx\n", field, regs->hi); |
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printf("Lo : %0*lx\n", field, regs->lo); |
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/*
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* Saved cp0 registers |
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*/ |
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printf("epc : %0*lx (text %0*lx)\n", field, regs->cp0_epc, |
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field, regs->cp0_epc - gd->reloc_off); |
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printf("ra : %0*lx (text %0*lx)\n", field, regs->regs[31], |
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field, regs->regs[31] - gd->reloc_off); |
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printf("Status: %08x\n", (uint32_t) regs->cp0_status); |
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exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE; |
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printf("Cause : %08x (ExcCode %02x)\n", cause, exccode); |
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if (1 <= exccode && exccode <= 5) |
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printf("BadVA : %0*lx\n", field, regs->cp0_badvaddr); |
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printf("PrId : %08x\n", read_c0_prid()); |
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} |
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void do_reserved(const struct pt_regs *regs) |
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{ |
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puts("\nOoops:\n"); |
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show_regs(regs); |
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hang(); |
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} |
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void do_ejtag_debug(const struct pt_regs *regs) |
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{ |
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const int field = 2 * sizeof(unsigned long); |
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unsigned long depc; |
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unsigned int debug; |
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depc = read_c0_depc(); |
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debug = read_c0_debug(); |
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printf("SDBBP EJTAG debug exception: c0_depc = %0*lx, DEBUG = %08x\n", |
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field, depc, debug); |
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} |
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static void set_handler(unsigned long offset, void *addr, unsigned long size) |
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{ |
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unsigned long ebase = gd->irq_sp; |
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memcpy((void *)(ebase + offset), addr, size); |
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flush_cache(ebase + offset, size); |
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} |
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void trap_init(ulong reloc_addr) |
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{ |
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unsigned long ebase = gd->irq_sp; |
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set_handler(0x180, &except_vec3_generic, 0x80); |
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set_handler(0x280, &except_vec_ejtag_debug, 0x80); |
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write_c0_ebase(ebase); |
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clear_c0_status(ST0_BEV); |
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execution_hazard_barrier(); |
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} |
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