From f00273a3a300d4f67bd4fa65cfc3da7b3e23819a Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 23 Aug 2018 11:01:08 +0800 Subject: [PATCH 1/9] rockchip: make_fit_atf: fix warning unit_address_vs_reg Patch fix warning: /builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \ arch/arm/dts/rk3399-firefly.dtb > u-boot.its ./tools/mkimage -f u-boot.its -E u-boot.itb >/dev/null && cat /dev/null u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /configurations/config@1 has a unit name, but no reg property make[1]: Leaving directory '/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399' Reported-by: Peter Robinson Signed-off-by: Kever Yang Tested-by: Peter Robinson Reviewed-by: Philipp Tomsich Acked-by: Philipp Tomsich --- arch/arm/mach-rockchip/make_fit_atf.py | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py index 6b3d920..62b9cae 100755 --- a/arch/arm/mach-rockchip/make_fit_atf.py +++ b/arch/arm/mach-rockchip/make_fit_atf.py @@ -34,7 +34,7 @@ DT_HEADER="""// SPDX-License-Identifier: GPL-2.0+ OR X11 #address-cells = <1>; images { - uboot@1 { + uboot { description = "U-Boot (64-bit)"; data = /incbin/("u-boot-nodtb.bin"); type = "standalone"; @@ -58,7 +58,7 @@ def append_atf_node(file, atf_index, phy_addr): Append ATF DT node to input FIT dts file. """ data = 'bl31_0x%08x.bin' % phy_addr - print >> file, '\t\tatf@%d {' % atf_index + print >> file, '\t\tatf_%d {' % atf_index print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";' print >> file, '\t\t\tdata = /incbin/("%s");' % data print >> file, '\t\t\ttype = "firmware";' @@ -78,7 +78,7 @@ def append_fdt_node(file, dtbs): cnt = 1 for dtb in dtbs: dtname = os.path.basename(dtb) - print >> file, '\t\tfdt@%d {' % cnt + print >> file, '\t\tfdt_%d {' % cnt print >> file, '\t\t\tdescription = "%s";' % dtname print >> file, '\t\t\tdata = /incbin/("%s");' % dtb print >> file, '\t\t\ttype = "flat_dt";' @@ -88,17 +88,17 @@ def append_fdt_node(file, dtbs): cnt = cnt + 1 def append_conf_section(file, cnt, dtname, atf_cnt): - print >> file, '\t\tconfig@%d {' % cnt + print >> file, '\t\tconfig_%d {' % cnt print >> file, '\t\t\tdescription = "%s";' % dtname - print >> file, '\t\t\tfirmware = "atf@1";' - print >> file, '\t\t\tloadables = "uboot@1",', + print >> file, '\t\t\tfirmware = "atf_1";' + print >> file, '\t\t\tloadables = "uboot",', for i in range(1, atf_cnt): - print >> file, '"atf@%d"' % (i+1), + print >> file, '"atf_%d"' % (i+1), if i != (atf_cnt - 1): print >> file, ',', else: print >> file, ';' - print >> file, '\t\t\tfdt = "fdt@1";' + print >> file, '\t\t\tfdt = "fdt_1";' print >> file, '\t\t};' print >> file, '' @@ -108,7 +108,7 @@ def append_conf_node(file, dtbs, atf_cnt): """ cnt = 1 print >> file, '\tconfigurations {' - print >> file, '\t\tdefault = "config@1";' + print >> file, '\t\tdefault = "config_1";' for dtb in dtbs: dtname = os.path.basename(dtb) append_conf_section(file, cnt, dtname, atf_cnt) From 70fe2876352939194ccd9091379453a5ddb64ddb Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 23 Aug 2018 17:17:59 +0800 Subject: [PATCH 2/9] spl: add support to booting with OP-TEE OP-TEE is an open source trusted OS, in armv7, its loading and running are like this: loading: - SPL load both OP-TEE and U-Boot running: - SPL run into OP-TEE in secure mode; - OP-TEE run into U-Boot in non-secure mode; To make code simple, it would be fine to use IH_OS_TEE for the os tyle in TPL(just like IH_OS_LINUX is using both in SPL and U-Boot). Here is the diagram for SPL loading OP-TEE, IH_OS_TEE:(make u-boot.itb for SPL) Non-Secure Secure BootROM | v SPL | v --------- OP-TEE | v U-Boot | V Linux For other two king of OP-TEE loading/booting, see commit message: 45b55712d4 image: Add IH_OS_TEE for TEE chain-load boot More detail: https://github.com/OP-TEE/optee_os and search for 'boot arguments' for detail entry parameter in: core/arch/arm/kernel/generic_entry_a32.S Signed-off-by: Kever Yang Cc: Bryan O'Donoghue Reviewed-by: Philipp Tomsich --- common/spl/Kconfig | 7 +++++++ common/spl/Makefile | 1 + common/spl/spl.c | 7 +++++++ common/spl/spl_optee.S | 12 ++++++++++++ include/spl.h | 13 +++++++++++++ 5 files changed, 40 insertions(+) create mode 100644 common/spl/spl_optee.S diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 18dbc23..d056462 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -832,6 +832,13 @@ config SPL_AM33XX_ENABLE_RTC32K_OSC Enable access to the AM33xx RTC and select the external 32kHz clock source. +config SPL_OPTEE + bool "Support OP-TEE Trusted OS" + depends on ARM + help + OP-TEE is an open source Trusted OS which is loaded by SPL. + More detail at: https://github.com/OP-TEE/optee_os + config TPL bool depends on SUPPORT_TPL diff --git a/common/spl/Makefile b/common/spl/Makefile index 814081f..a130a5b 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_$(SPL_TPL_)UBI) += spl_ubi.o obj-$(CONFIG_$(SPL_TPL_)NET_SUPPORT) += spl_net.o obj-$(CONFIG_$(SPL_TPL_)MMC_SUPPORT) += spl_mmc.o obj-$(CONFIG_$(SPL_TPL_)ATF) += spl_atf.o +obj-$(CONFIG_$(SPL_TPL_)OPTEE) += spl_optee.o obj-$(CONFIG_$(SPL_TPL_)USB_SUPPORT) += spl_usb.o obj-$(CONFIG_$(SPL_TPL_)FAT_SUPPORT) += spl_fat.o obj-$(CONFIG_$(SPL_TPL_)EXT_SUPPORT) += spl_ext.o diff --git a/common/spl/spl.c b/common/spl/spl.c index 038f2b0..292e659 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -536,6 +536,13 @@ void board_init_r(gd_t *dummy1, ulong dummy2) spl_invoke_atf(&spl_image); break; #endif +#if CONFIG_IS_ENABLED(OPTEE) + case IH_OS_TEE: + debug("Jumping to U-Boot via OP-TEE\n"); + spl_optee_entry(NULL, NULL, spl_image.fdt_addr, + (void *)spl_image.entry_point); + break; +#endif #ifdef CONFIG_SPL_OS_BOOT case IH_OS_LINUX: debug("Jumping to Linux\n"); diff --git a/common/spl/spl_optee.S b/common/spl/spl_optee.S new file mode 100644 index 0000000..86fc398 --- /dev/null +++ b/common/spl/spl_optee.S @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017 Rockchip Electronic Co.,Ltd + */ + +#include +#include + +ENTRY(spl_optee_entry) + ldr lr, =CONFIG_SYS_TEXT_BASE + mov pc, r3 +ENDPROC(spl_optee_entry) diff --git a/include/spl.h b/include/spl.h index b42683c..9a439f4 100644 --- a/include/spl.h +++ b/include/spl.h @@ -289,6 +289,19 @@ int spl_mmc_load_image(struct spl_image_info *spl_image, void spl_invoke_atf(struct spl_image_info *spl_image); /** + * spl_optee_entry - entry function for optee + * + * args defind in op-tee project + * https://github.com/OP-TEE/optee_os/ + * core/arch/arm/kernel/generic_entry_a32.S + * @arg0: pagestore + * @arg1: (ARMv7 standard bootarg #1) + * @arg2: device tree address, (ARMv7 standard bootarg #2) + * @arg3: non-secure entry address (ARMv7 bootarg #0) + */ +void spl_optee_entry(void *arg0, void *arg1, void *arg2, void *arg3); + +/** * board_return_to_bootrom - allow for boards to continue with the boot ROM * * If a board (e.g. the Rockchip RK3368 boards) provide some From aabb51da59ef6d6841e41212b4d6cc883ca71858 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 23 Aug 2018 17:18:00 +0800 Subject: [PATCH 3/9] rockchip: add fit source file for pack itb with op-tee We package U-Boot and OP-TEE into one itb file for SPL, so that we can support OP-TEE in SPL. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- arch/arm/mach-rockchip/fit_spl_optee.its | 50 ++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 arch/arm/mach-rockchip/fit_spl_optee.its diff --git a/arch/arm/mach-rockchip/fit_spl_optee.its b/arch/arm/mach-rockchip/fit_spl_optee.its new file mode 100644 index 0000000..9be4b3c --- /dev/null +++ b/arch/arm/mach-rockchip/fit_spl_optee.its @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2017 Rockchip Electronic Co.,Ltd + * + * Simple U-boot fit source file containing U-Boot, dtb and optee + */ + +/dts-v1/; + +/ { + description = "Simple image with OP-TEE support"; + #address-cells = <1>; + + images { + uboot@1 { + description = "U-Boot"; + data = /incbin/("../../../u-boot-nodtb.bin"); + type = "standalone"; + os = "U-Boot"; + arch = "arm"; + compression = "none"; + load = <0x61000000>; + }; + optee@1 { + description = "OP-TEE"; + data = /incbin/("../../../tee.bin"); + type = "firmware"; + arch = "arm"; + os = "tee"; + compression = "none"; + load = <0x68400000>; + entry = <0x68400000>; + }; + fdt@1 { + description = "dtb"; + data = /incbin/("../../../u-boot.dtb"); + type = "flat_dt"; + compression = "none"; + }; + }; + + configurations { + default = "conf@1"; + conf@1 { + description = "Rockchip armv7 with OP-TEE"; + firmware = "optee@1"; + loadables = "uboot@1"; + fdt = "fdt@1"; + }; + }; +}; From e4011e8daa2b9832b4d4a396d6e14024da586277 Mon Sep 17 00:00:00 2001 From: Mian Yousaf Kaukab Date: Fri, 8 Jun 2018 10:47:09 +0200 Subject: [PATCH 4/9] rockchip: make_fit_atf: use elf entry point make_fit_atf.py uses physical address of first segment as the entry point to bl31. It is incorrect and causes following abort when bl31_entry() is called: U-Boot SPL board initTrying to boot from MMC1 "Synchronous Abort" handler, esr 0x02000000 elr: 0000000000000000 lr : 00000000ff8c7e8c x 0: 00000000ff8e0000 x 1: 0000000000000000 x 2: 0000000000000000 x 3: 00000000ff8e0180 x 4: 0000000000000000 x 5: 0000000000000000 x 6: 0000000000000030 x 7: 00000000ff8e0188 x 8: 00000000000001e0 x 9: 0000000000000000 x10: 000000000007fcdc x11: 00000000002881b8 x12: 00000000000001a2 x13: 0000000000000198 x14: 000000000007fdcc x15: 00000000002881b8 x16: 00000000003c0724 x17: 00000000003c0718 x18: 000000000007fe80 x19: 00000000ff8e0000 x20: 0000000000200000 x21: 00000000ff8e0000 x22: 0000000000000000 x23: 000000000007fe30 x24: 00000000ff8d1c3c x25: 00000000ff8d5000 x26: 00000000deadbeef x27: 00000000000004a0 x28: 000000000000009c x29: 000000000007fd90 Fix it by using the entry point from the elf header. Signed-off-by: Mian Yousaf Kaukab Reviewed-by: Philipp Tomsich --- arch/arm/mach-rockchip/make_fit_atf.py | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py index 62b9cae..571369b 100755 --- a/arch/arm/mach-rockchip/make_fit_atf.py +++ b/arch/arm/mach-rockchip/make_fit_atf.py @@ -53,7 +53,7 @@ DT_END=""" }; """ -def append_atf_node(file, atf_index, phy_addr): +def append_atf_node(file, atf_index, phy_addr, elf_entry): """ Append ATF DT node to input FIT dts file. """ @@ -67,7 +67,7 @@ def append_atf_node(file, atf_index, phy_addr): print >> file, '\t\t\tcompression = "none";' print >> file, '\t\t\tload = <0x%08x>;' % phy_addr if atf_index == 1: - print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr + print >> file, '\t\t\tentry = <0x%08x>;' % elf_entry print >> file, '\t\t};' print >> file, '' @@ -141,12 +141,13 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_fi with open(bl31_file_name) as bl31_file: bl31 = ELFFile(bl31_file) + elf_entry = bl31.header['e_entry'] for i in range(bl31.num_segments()): seg = bl31.get_segment(i) if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)): paddr = seg.__getitem__(ELF_SEG_P_PADDR) p= seg.__getitem__(ELF_SEG_P_PADDR) - append_atf_node(fit_file, i+1, paddr) + append_atf_node(fit_file, i+1, paddr, elf_entry) atf_cnt = i+1 append_fdt_node(fit_file, dtbs_file_name) print >> fit_file, '%s' % DT_IMAGES_NODE_END From 7009eae89053ee84d1b522097cb99264357c39ff Mon Sep 17 00:00:00 2001 From: Mian Yousaf Kaukab Date: Fri, 8 Jun 2018 10:47:10 +0200 Subject: [PATCH 5/9] rockchip: make_fit_atf: make python3 compatible Make script python3 compatible. No functional changes intended. Signed-off-by: Mian Yousaf Kaukab Reviewed-by: Philipp Tomsich --- arch/arm/mach-rockchip/make_fit_atf.py | 89 +++++++++++++++++----------------- 1 file changed, 45 insertions(+), 44 deletions(-) diff --git a/arch/arm/mach-rockchip/make_fit_atf.py b/arch/arm/mach-rockchip/make_fit_atf.py index 571369b..d1faff1 100755 --- a/arch/arm/mach-rockchip/make_fit_atf.py +++ b/arch/arm/mach-rockchip/make_fit_atf.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python2 +#!/usr/bin/env python """ A script to generate FIT image source for rockchip boards with ARM Trusted Firmware @@ -43,6 +43,7 @@ DT_HEADER="""// SPDX-License-Identifier: GPL-2.0+ OR X11 compression = "none"; load = <0x%08x>; }; + """ DT_IMAGES_NODE_END=""" @@ -58,18 +59,18 @@ def append_atf_node(file, atf_index, phy_addr, elf_entry): Append ATF DT node to input FIT dts file. """ data = 'bl31_0x%08x.bin' % phy_addr - print >> file, '\t\tatf_%d {' % atf_index - print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";' - print >> file, '\t\t\tdata = /incbin/("%s");' % data - print >> file, '\t\t\ttype = "firmware";' - print >> file, '\t\t\tarch = "arm64";' - print >> file, '\t\t\tos = "arm-trusted-firmware";' - print >> file, '\t\t\tcompression = "none";' - print >> file, '\t\t\tload = <0x%08x>;' % phy_addr + file.write('\t\tatf_%d {\n' % atf_index) + file.write('\t\t\tdescription = \"ARM Trusted Firmware\";\n') + file.write('\t\t\tdata = /incbin/("%s");\n' % data) + file.write('\t\t\ttype = "firmware";\n') + file.write('\t\t\tarch = "arm64";\n') + file.write('\t\t\tos = "arm-trusted-firmware";\n') + file.write('\t\t\tcompression = "none";\n') + file.write('\t\t\tload = <0x%08x>;\n' % phy_addr) if atf_index == 1: - print >> file, '\t\t\tentry = <0x%08x>;' % elf_entry - print >> file, '\t\t};' - print >> file, '' + file.write('\t\t\tentry = <0x%08x>;\n' % elf_entry) + file.write('\t\t};\n') + file.write('\n') def append_fdt_node(file, dtbs): """ @@ -78,43 +79,43 @@ def append_fdt_node(file, dtbs): cnt = 1 for dtb in dtbs: dtname = os.path.basename(dtb) - print >> file, '\t\tfdt_%d {' % cnt - print >> file, '\t\t\tdescription = "%s";' % dtname - print >> file, '\t\t\tdata = /incbin/("%s");' % dtb - print >> file, '\t\t\ttype = "flat_dt";' - print >> file, '\t\t\tcompression = "none";' - print >> file, '\t\t};' - print >> file, '' + file.write('\t\tfdt_%d {\n' % cnt) + file.write('\t\t\tdescription = "%s";\n' % dtname) + file.write('\t\t\tdata = /incbin/("%s");\n' % dtb) + file.write('\t\t\ttype = "flat_dt";\n') + file.write('\t\t\tcompression = "none";\n') + file.write('\t\t};\n') + file.write('\n') cnt = cnt + 1 def append_conf_section(file, cnt, dtname, atf_cnt): - print >> file, '\t\tconfig_%d {' % cnt - print >> file, '\t\t\tdescription = "%s";' % dtname - print >> file, '\t\t\tfirmware = "atf_1";' - print >> file, '\t\t\tloadables = "uboot",', + file.write('\t\tconfig_%d {\n' % cnt) + file.write('\t\t\tdescription = "%s";\n' % dtname) + file.write('\t\t\tfirmware = "atf_1";\n') + file.write('\t\t\tloadables = "uboot",') for i in range(1, atf_cnt): - print >> file, '"atf_%d"' % (i+1), + file.write('"atf_%d"' % (i+1)) if i != (atf_cnt - 1): - print >> file, ',', + file.write(',') else: - print >> file, ';' - print >> file, '\t\t\tfdt = "fdt_1";' - print >> file, '\t\t};' - print >> file, '' + file.write(';\n') + file.write('\t\t\tfdt = "fdt_1";\n') + file.write('\t\t};\n') + file.write('\n') def append_conf_node(file, dtbs, atf_cnt): """ Append configeration nodes. """ cnt = 1 - print >> file, '\tconfigurations {' - print >> file, '\t\tdefault = "config_1";' + file.write('\tconfigurations {\n') + file.write('\t\tdefault = "config_1";\n') for dtb in dtbs: dtname = os.path.basename(dtb) append_conf_section(file, cnt, dtname, atf_cnt) cnt = cnt + 1 - print >> file, '\t};' - print >> file, '' + file.write('\t};\n') + file.write('\n') def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_file_name): """ @@ -127,7 +128,7 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_fi num_load_seg = 0 p_paddr = 0xFFFFFFFF - with open(uboot_file_name) as uboot_file: + with open(uboot_file_name, 'rb') as uboot_file: uboot = ELFFile(uboot_file) for i in range(uboot.num_segments()): seg = uboot.get_segment(i) @@ -137,9 +138,9 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_fi assert (p_paddr != 0xFFFFFFFF and num_load_seg == 1) - print >> fit_file, DT_HEADER % p_paddr + fit_file.write(DT_HEADER % p_paddr) - with open(bl31_file_name) as bl31_file: + with open(bl31_file_name, 'rb') as bl31_file: bl31 = ELFFile(bl31_file) elf_entry = bl31.header['e_entry'] for i in range(bl31.num_segments()): @@ -150,15 +151,15 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name, dtbs_fi append_atf_node(fit_file, i+1, paddr, elf_entry) atf_cnt = i+1 append_fdt_node(fit_file, dtbs_file_name) - print >> fit_file, '%s' % DT_IMAGES_NODE_END + fit_file.write('%s\n' % DT_IMAGES_NODE_END) append_conf_node(fit_file, dtbs_file_name, atf_cnt) - print >> fit_file, '%s' % DT_END + fit_file.write('%s\n' % DT_END) if fit_file_name != sys.stdout: fit_file.close() def generate_atf_binary(bl31_file_name): - with open(bl31_file_name) as bl31_file: + with open(bl31_file_name, 'rb') as bl31_file: bl31 = ELFFile(bl31_file) num = bl31.num_segments() @@ -179,17 +180,17 @@ def get_bl31_segments_info(bl31_file_name): bl31 = ELFFile(bl31_file) num = bl31.num_segments() - print 'Number of Segments : %d' % bl31.num_segments() + print('Number of Segments : %d' % bl31.num_segments()) for i in range(num): - print 'Segment %d' % i + print('Segment %d' % i) seg = bl31.get_segment(i) ptype = seg[ELF_SEG_P_TYPE] poffset = seg[ELF_SEG_P_OFFSET] pmemsz = seg[ELF_SEG_P_MEMSZ] pfilesz = seg[ELF_SEG_P_FILESZ] - print 'type: %s\nfilesz: %08x\nmemsz: %08x\noffset: %08x' % (ptype, pfilesz, pmemsz, poffset) + print('type: %s\nfilesz: %08x\nmemsz: %08x\noffset: %08x' % (ptype, pfilesz, pmemsz, poffset)) paddr = seg[ELF_SEG_P_PADDR] - print 'paddr: %08x' % paddr + print('paddr: %08x' % paddr) def main(): uboot_elf="./u-boot" @@ -205,7 +206,7 @@ def main(): elif opt == "-b": bl31_elf=val elif opt == "-h": - print __doc__ + print(__doc__) sys.exit(2) dtbs = args From 04acabd22c2473c7dd65c3a5f900cb80d9619cc0 Mon Sep 17 00:00:00 2001 From: Janine Hagemann Date: Tue, 28 Aug 2018 08:25:04 +0200 Subject: [PATCH 6/9] net: gmac_rockchip: Fix a register write in rk3328_gmac_set_to_rgmii We have to use RK3328_RXCLK_DLY_ENA_GMAC_ENABLE instead of RK3328_RXCLK_DLY_ENA_GMAC_MASK in rk3328_gmac_set_to_rgmii() to enable the RX delay. The MASK was used in a wrong way. Signed-off-by: Janine Hagemann Reviewed-by: Philipp Tomisch Acked-by: Joe Hershberger --- drivers/net/gmac_rockchip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c index 30a24d1..0f91731 100644 --- a/drivers/net/gmac_rockchip.c +++ b/drivers/net/gmac_rockchip.c @@ -350,7 +350,7 @@ static void rk3328_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata) RK3328_RXCLK_DLY_ENA_GMAC_MASK | RK3328_TXCLK_DLY_ENA_GMAC_MASK, RK3328_GMAC_PHY_INTF_SEL_RGMII | - RK3328_RXCLK_DLY_ENA_GMAC_MASK | + RK3328_RXCLK_DLY_ENA_GMAC_ENABLE | RK3328_TXCLK_DLY_ENA_GMAC_ENABLE); rk_clrsetreg(&grf->mac_con[0], From 3d1bd5b5908db002a7d52a43bca744bc33790453 Mon Sep 17 00:00:00 2001 From: Janine Hagemann Date: Tue, 28 Aug 2018 08:25:05 +0200 Subject: [PATCH 7/9] net: gmac_rockchip: Add handling for RGMII_ID/RXID/TXID Using PHY internal delays in combination with the phy-mode rgmii-id/rxid/txid was not possible. Only rgmii was supported. Now we can disable rockchip's gmac delay lines and also use rgmii-id/rxid/txid. Based on commit eaf70ad14cbb ("net: stmmac: dwmac-rk: Add handling for RGMII_ID/RXID/TXID") for mainline linux kernel. Signed-off-by: Janine Hagemann Acked-by: Joe Hershberger Reviewed-by: David Wu Reviewed-by: Philipp Tomsich --- drivers/net/gmac_rockchip.c | 80 +++++++++++++++++++++++++++++++++++---------- 1 file changed, 63 insertions(+), 17 deletions(-) diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c index 0f91731..c01ae75 100644 --- a/drivers/net/gmac_rockchip.c +++ b/drivers/net/gmac_rockchip.c @@ -24,6 +24,11 @@ #include #include "designware.h" +DECLARE_GLOBAL_DATA_PTR; +#define DELAY_ENABLE(soc, tx, rx) \ + (((tx) ? soc##_TXCLK_DLY_ENA_GMAC_ENABLE : soc##_TXCLK_DLY_ENA_GMAC_DISABLE) | \ + ((rx) ? soc##_RXCLK_DLY_ENA_GMAC_ENABLE : soc##_RXCLK_DLY_ENA_GMAC_DISABLE)) + /* * Platform data for the gmac * @@ -286,8 +291,7 @@ static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata) RK3228_RXCLK_DLY_ENA_GMAC_MASK | RK3228_TXCLK_DLY_ENA_GMAC_MASK, RK3228_GMAC_PHY_INTF_SEL_RGMII | - RK3228_RXCLK_DLY_ENA_GMAC_ENABLE | - RK3228_TXCLK_DLY_ENA_GMAC_ENABLE); + DELAY_ENABLE(RK3228, pdata->tx_delay, pdata->rx_delay)); rk_clrsetreg(&grf->mac_con[0], RK3228_CLK_RX_DL_CFG_GMAC_MASK | @@ -310,8 +314,7 @@ static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata) RK3288_TXCLK_DLY_ENA_GMAC_MASK | RK3288_CLK_RX_DL_CFG_GMAC_MASK | RK3288_CLK_TX_DL_CFG_GMAC_MASK, - RK3288_RXCLK_DLY_ENA_GMAC_ENABLE | - RK3288_TXCLK_DLY_ENA_GMAC_ENABLE | + DELAY_ENABLE(RK3288, pdata->rx_delay, pdata->tx_delay) | pdata->rx_delay << RK3288_CLK_RX_DL_CFG_GMAC_SHIFT | pdata->tx_delay << RK3288_CLK_TX_DL_CFG_GMAC_SHIFT); } @@ -350,8 +353,7 @@ static void rk3328_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata) RK3328_RXCLK_DLY_ENA_GMAC_MASK | RK3328_TXCLK_DLY_ENA_GMAC_MASK, RK3328_GMAC_PHY_INTF_SEL_RGMII | - RK3328_RXCLK_DLY_ENA_GMAC_ENABLE | - RK3328_TXCLK_DLY_ENA_GMAC_ENABLE); + DELAY_ENABLE(RK3328, pdata->tx_delay, pdata->rx_delay)); rk_clrsetreg(&grf->mac_con[0], RK3328_CLK_RX_DL_CFG_GMAC_MASK | @@ -392,8 +394,7 @@ static void rk3368_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata) RK3368_TXCLK_DLY_ENA_GMAC_MASK | RK3368_CLK_RX_DL_CFG_GMAC_MASK | RK3368_CLK_TX_DL_CFG_GMAC_MASK, - RK3368_RXCLK_DLY_ENA_GMAC_ENABLE | - RK3368_TXCLK_DLY_ENA_GMAC_ENABLE | + DELAY_ENABLE(RK3368, pdata->tx_delay, pdata->rx_delay) | pdata->rx_delay << RK3368_CLK_RX_DL_CFG_GMAC_SHIFT | pdata->tx_delay << RK3368_CLK_TX_DL_CFG_GMAC_SHIFT); } @@ -413,8 +414,7 @@ static void rk3399_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata) RK3399_TXCLK_DLY_ENA_GMAC_MASK | RK3399_CLK_RX_DL_CFG_GMAC_MASK | RK3399_CLK_TX_DL_CFG_GMAC_MASK, - RK3399_RXCLK_DLY_ENA_GMAC_ENABLE | - RK3399_TXCLK_DLY_ENA_GMAC_ENABLE | + DELAY_ENABLE(RK3399, pdata->tx_delay, pdata->rx_delay) | pdata->rx_delay << RK3399_CLK_RX_DL_CFG_GMAC_SHIFT | pdata->tx_delay << RK3399_CLK_TX_DL_CFG_GMAC_SHIFT); } @@ -451,40 +451,86 @@ static int gmac_rockchip_probe(struct udevice *dev) switch (eth_pdata->phy_interface) { case PHY_INTERFACE_MODE_RGMII: + /* Set to RGMII mode */ + if (ops->set_to_rgmii) + ops->set_to_rgmii(pdata); + else + return -EPERM; + /* * If the gmac clock is from internal pll, need to set and * check the return value for gmac clock at RGMII mode. If * the gmac clock is from external source, the clock rate * is not set, because of it is bypassed. */ + if (!pdata->clock_input) { rate = clk_set_rate(&clk, 125000000); if (rate != 125000000) return -EINVAL; } + break; + case PHY_INTERFACE_MODE_RGMII_ID: /* Set to RGMII mode */ - if (ops->set_to_rgmii) + if (ops->set_to_rgmii) { + pdata->tx_delay = 0; + pdata->rx_delay = 0; ops->set_to_rgmii(pdata); - else + } else return -EPERM; - break; - case PHY_INTERFACE_MODE_RMII: - /* The commet is the same as RGMII mode */ if (!pdata->clock_input) { - rate = clk_set_rate(&clk, 50000000); - if (rate != 50000000) + rate = clk_set_rate(&clk, 125000000); + if (rate != 125000000) return -EINVAL; } + break; + case PHY_INTERFACE_MODE_RMII: /* Set to RMII mode */ if (ops->set_to_rmii) ops->set_to_rmii(pdata); else return -EPERM; + if (!pdata->clock_input) { + rate = clk_set_rate(&clk, 50000000); + if (rate != 50000000) + return -EINVAL; + } + break; + + case PHY_INTERFACE_MODE_RGMII_RXID: + /* Set to RGMII_RXID mode */ + if (ops->set_to_rgmii) { + pdata->tx_delay = 0; + ops->set_to_rgmii(pdata); + } else + return -EPERM; + + if (!pdata->clock_input) { + rate = clk_set_rate(&clk, 125000000); + if (rate != 125000000) + return -EINVAL; + } break; + + case PHY_INTERFACE_MODE_RGMII_TXID: + /* Set to RGMII_TXID mode */ + if (ops->set_to_rgmii) { + pdata->rx_delay = 0; + ops->set_to_rgmii(pdata); + } else + return -EPERM; + + if (!pdata->clock_input) { + rate = clk_set_rate(&clk, 125000000); + if (rate != 125000000) + return -EINVAL; + } + break; + default: debug("NO interface defined!\n"); return -ENXIO; From c29c1e611e634587210c5a801df04256e21c0442 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 3 Jun 2018 07:23:58 +0200 Subject: [PATCH 8/9] rockchip: make_fit_atf.py depends on u-boot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit u-boot.itb depends on u-boot-nodtb.bin, which in turn depends on u-boot. u-boot.its from Rockchip make_fit_atf.py (used by {evb,firefly}-rk3399) wants to read u-boot but is lacking this dependency, so that u-boot.itb cannot be built in one go. Detect its use and add the missing dependency. Reported-by: Yousaf Kaukab Signed-off-by: Andreas Färber Reviewed-by: Philipp Tomsich --- Makefile | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 73a080c..1d7d5f2 100644 --- a/Makefile +++ b/Makefile @@ -1074,7 +1074,10 @@ U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT_SOURCE)) else ifneq ($(CONFIG_SPL_FIT_GENERATOR),"") U_BOOT_ITS := u-boot.its -$(U_BOOT_ITS): FORCE +ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-rockchip/make_fit_atf.py") +U_BOOT_ITS_DEPS += u-boot +endif +$(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE $(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \ $(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@ endif From f25c1755a715d0d1794bd0827549367c20182501 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20Gr=C3=B6ber?= Date: Thu, 4 Oct 2018 15:32:42 +0200 Subject: [PATCH 9/9] rockchip: Fix rkimage format for SPL boot over USB MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The 'rkimage' format used for booting rockchip boards over USB seems to have been broken since commit 7bf274b9caab ("rockchip: mkimage: use imagename to select spl hdr & spl size"). That commit adds an offset of RK_SPL_HDR_START(=2048) to the location the 'RKxx' header is written at. However the bootrom expects this header to be the first four bytes of the image, not at offset 2048. This appears to have been a copy paste error since the 'rksd' and 'rkspi' image types do require this offset. Furthermore commit 111bcc4fb6cb ("rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399"), commit 3d54eabcafec9 ("rockchip: spl: RK3399: use boot0 hook to create space for SPL magic") and commit 308277569229 ("rockchip: mkimage: update rkimage to support pre-padded payloads") changed the way the space for the 'RKxx' header is allocated and written to the image without adjusting 'rkimage'. This commit fixes those mistakes and makes it possible to load u-boot SPL over USB once more. (Tested on RK3399) Signed-off-by: Daniel Gröber Reviewed-by: Philipp Tomsich --- tools/rkimage.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/tools/rkimage.c b/tools/rkimage.c index a0a3185..ae50de5 100644 --- a/tools/rkimage.c +++ b/tools/rkimage.c @@ -15,8 +15,7 @@ static uint32_t header; static void rkimage_set_header(void *buf, struct stat *sbuf, int ifd, struct image_tool_params *params) { - memcpy(buf + RK_SPL_HDR_START, rkcommon_get_spl_hdr(params), - RK_SPL_HDR_SIZE); + memcpy(buf, rkcommon_get_spl_hdr(params), RK_SPL_HDR_SIZE); if (rkcommon_need_rc4_spl(params)) rkcommon_rc4_encode_spl(buf, 4, params->file_size); @@ -36,7 +35,7 @@ static int rkimage_check_image_type(uint8_t type) U_BOOT_IMAGE_TYPE( rkimage, "Rockchip Boot Image support", - 4, + 0, &header, rkcommon_check_params, NULL,