commit
a5a5882611
@ -0,0 +1,105 @@ |
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/* |
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* Keyboard dts fragment for devices that use cros-ec-keyboard |
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* |
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* Copyright (c) 2014 Google, Inc |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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|
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#include <dt-bindings/input/input.h> |
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|
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&cros_ec { |
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keyboard-controller { |
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compatible = "google,cros-ec-keyb"; |
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keypad,num-rows = <8>; |
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keypad,num-columns = <13>; |
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google,needs-ghost-filter; |
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|
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linux,keymap = < |
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MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA) |
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MATRIX_KEY(0x00, 0x02, KEY_F1) |
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MATRIX_KEY(0x00, 0x03, KEY_B) |
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MATRIX_KEY(0x00, 0x04, KEY_F10) |
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MATRIX_KEY(0x00, 0x06, KEY_N) |
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MATRIX_KEY(0x00, 0x08, KEY_EQUAL) |
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MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT) |
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|
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MATRIX_KEY(0x01, 0x01, KEY_ESC) |
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MATRIX_KEY(0x01, 0x02, KEY_F4) |
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MATRIX_KEY(0x01, 0x03, KEY_G) |
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MATRIX_KEY(0x01, 0x04, KEY_F7) |
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MATRIX_KEY(0x01, 0x06, KEY_H) |
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MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE) |
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MATRIX_KEY(0x01, 0x09, KEY_F9) |
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MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE) |
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|
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MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL) |
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MATRIX_KEY(0x02, 0x01, KEY_TAB) |
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MATRIX_KEY(0x02, 0x02, KEY_F3) |
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MATRIX_KEY(0x02, 0x03, KEY_T) |
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MATRIX_KEY(0x02, 0x04, KEY_F6) |
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MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE) |
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MATRIX_KEY(0x02, 0x06, KEY_Y) |
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MATRIX_KEY(0x02, 0x07, KEY_102ND) |
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MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE) |
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MATRIX_KEY(0x02, 0x09, KEY_F8) |
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|
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MATRIX_KEY(0x03, 0x01, KEY_GRAVE) |
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MATRIX_KEY(0x03, 0x02, KEY_F2) |
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MATRIX_KEY(0x03, 0x03, KEY_5) |
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MATRIX_KEY(0x03, 0x04, KEY_F5) |
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MATRIX_KEY(0x03, 0x06, KEY_6) |
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MATRIX_KEY(0x03, 0x08, KEY_MINUS) |
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MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH) |
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|
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MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL) |
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MATRIX_KEY(0x04, 0x01, KEY_A) |
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MATRIX_KEY(0x04, 0x02, KEY_D) |
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MATRIX_KEY(0x04, 0x03, KEY_F) |
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MATRIX_KEY(0x04, 0x04, KEY_S) |
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MATRIX_KEY(0x04, 0x05, KEY_K) |
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MATRIX_KEY(0x04, 0x06, KEY_J) |
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MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON) |
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MATRIX_KEY(0x04, 0x09, KEY_L) |
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MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH) |
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MATRIX_KEY(0x04, 0x0b, KEY_ENTER) |
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|
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MATRIX_KEY(0x05, 0x01, KEY_Z) |
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MATRIX_KEY(0x05, 0x02, KEY_C) |
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MATRIX_KEY(0x05, 0x03, KEY_V) |
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MATRIX_KEY(0x05, 0x04, KEY_X) |
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MATRIX_KEY(0x05, 0x05, KEY_COMMA) |
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MATRIX_KEY(0x05, 0x06, KEY_M) |
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MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT) |
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MATRIX_KEY(0x05, 0x08, KEY_SLASH) |
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MATRIX_KEY(0x05, 0x09, KEY_DOT) |
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MATRIX_KEY(0x05, 0x0b, KEY_SPACE) |
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|
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MATRIX_KEY(0x06, 0x01, KEY_1) |
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MATRIX_KEY(0x06, 0x02, KEY_3) |
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MATRIX_KEY(0x06, 0x03, KEY_4) |
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MATRIX_KEY(0x06, 0x04, KEY_2) |
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MATRIX_KEY(0x06, 0x05, KEY_8) |
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MATRIX_KEY(0x06, 0x06, KEY_7) |
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MATRIX_KEY(0x06, 0x08, KEY_0) |
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MATRIX_KEY(0x06, 0x09, KEY_9) |
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MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT) |
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MATRIX_KEY(0x06, 0x0b, KEY_DOWN) |
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MATRIX_KEY(0x06, 0x0c, KEY_RIGHT) |
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|
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MATRIX_KEY(0x07, 0x01, KEY_Q) |
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MATRIX_KEY(0x07, 0x02, KEY_E) |
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MATRIX_KEY(0x07, 0x03, KEY_R) |
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MATRIX_KEY(0x07, 0x04, KEY_W) |
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MATRIX_KEY(0x07, 0x05, KEY_I) |
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MATRIX_KEY(0x07, 0x06, KEY_U) |
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MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT) |
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MATRIX_KEY(0x07, 0x08, KEY_P) |
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MATRIX_KEY(0x07, 0x09, KEY_O) |
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MATRIX_KEY(0x07, 0x0b, KEY_UP) |
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MATRIX_KEY(0x07, 0x0c, KEY_LEFT) |
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>; |
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}; |
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}; |
@ -0,0 +1,365 @@ |
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/dts-v1/; |
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|
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#include <dt-bindings/input/input.h> |
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#include "tegra124.dtsi" |
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|
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/ { |
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model = "Acer Chromebook 13 CB5-311"; |
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compatible = "google,nyan-big", "nvidia,tegra124"; |
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|
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aliases { |
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console = &uarta; |
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i2c0 = "/i2c@7000d000"; |
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i2c1 = "/i2c@7000c000"; |
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i2c2 = "/i2c@7000c400"; |
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i2c3 = "/i2c@7000c500"; |
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i2c4 = "/i2c@7000c700"; |
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i2c5 = "/i2c@7000d100"; |
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rtc0 = "/i2c@0,7000d000/pmic@40"; |
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rtc1 = "/rtc@0,7000e000"; |
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sdhci0 = "/sdhci@700b0600"; |
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sdhci1 = "/sdhci@700b0400"; |
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spi0 = "/spi@7000d400"; |
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spi1 = "/spi@7000da00"; |
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usb0 = "/usb@7d000000"; |
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usb1 = "/usb@7d008000"; |
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}; |
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|
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memory { |
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reg = <0x80000000 0x80000000>; |
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}; |
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|
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serial@70006000 { |
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/* Debug connector on the bottom of the board near SD card. */ |
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status = "okay"; |
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}; |
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|
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pwm@7000a000 { |
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status = "okay"; |
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}; |
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|
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i2c@7000c000 { |
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status = "okay"; |
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clock-frequency = <100000>; |
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acodec: audio-codec@10 { |
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compatible = "maxim,max98090"; |
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reg = <0x10>; |
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interrupt-parent = <&gpio>; |
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interrupts = <TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; |
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}; |
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|
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temperature-sensor@4c { |
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compatible = "ti,tmp451"; |
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reg = <0x4c>; |
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interrupt-parent = <&gpio>; |
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interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; |
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|
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#thermal-sensor-cells = <1>; |
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}; |
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}; |
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|
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i2c@7000c400 { |
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status = "okay"; |
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clock-frequency = <100000>; |
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}; |
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|
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i2c@7000c500 { |
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status = "okay"; |
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clock-frequency = <400000>; |
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|
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tpm@20 { |
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compatible = "infineon,slb9645tt"; |
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reg = <0x20>; |
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}; |
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}; |
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|
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hdmi_ddc: i2c@7000c700 { |
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status = "okay"; |
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clock-frequency = <100000>; |
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}; |
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|
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i2c@7000d000 { |
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status = "okay"; |
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clock-frequency = <400000>; |
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|
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pmic: pmic@40 { |
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compatible = "ams,as3722"; |
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reg = <0x40>; |
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interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; |
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|
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ams,system-power-controller; |
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|
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#interrupt-cells = <2>; |
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interrupt-controller; |
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|
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gpio-controller; |
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#gpio-cells = <2>; |
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|
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pinctrl-names = "default"; |
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pinctrl-0 = <&as3722_default>; |
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|
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as3722_default: pinmux { |
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gpio0 { |
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pins = "gpio0"; |
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function = "gpio"; |
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bias-pull-down; |
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}; |
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|
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gpio1 { |
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pins = "gpio1"; |
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function = "gpio"; |
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bias-pull-up; |
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}; |
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|
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gpio2_4_7 { |
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pins = "gpio2", "gpio4", "gpio7"; |
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function = "gpio"; |
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bias-pull-up; |
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}; |
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|
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gpio3_6 { |
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pins = "gpio3", "gpio6"; |
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bias-high-impedance; |
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}; |
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|
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gpio5 { |
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pins = "gpio5"; |
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function = "clk32k-out"; |
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bias-pull-down; |
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}; |
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}; |
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}; |
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}; |
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|
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spi@7000d400 { |
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status = "okay"; |
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|
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cros_ec: cros-ec@0 { |
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compatible = "google,cros-ec-spi"; |
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spi-max-frequency = <3000000>; |
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interrupt-parent = <&gpio>; |
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interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; |
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reg = <0>; |
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|
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google,cros-ec-spi-msg-delay = <2000>; |
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|
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i2c-tunnel { |
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compatible = "google,cros-ec-i2c-tunnel"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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|
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google,remote-bus = <0>; |
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|
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charger: bq24735@9 { |
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compatible = "ti,bq24735"; |
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reg = <0x9>; |
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interrupt-parent = <&gpio>; |
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interrupts = <TEGRA_GPIO(J, 0) |
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GPIO_ACTIVE_HIGH>; |
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ti,ac-detect-gpios = <&gpio |
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TEGRA_GPIO(J, 0) |
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GPIO_ACTIVE_HIGH>; |
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}; |
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|
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battery: sbs-battery@b { |
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compatible = "sbs,sbs-battery"; |
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reg = <0xb>; |
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sbs,i2c-retry-count = <2>; |
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sbs,poll-retry-count = <10>; |
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power-supplies = <&charger>; |
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}; |
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}; |
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}; |
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}; |
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|
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spi@7000da00 { |
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status = "okay"; |
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spi-max-frequency = <25000000>; |
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|
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flash@0 { |
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compatible = "winbond,w25q32dw"; |
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reg = <0>; |
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}; |
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}; |
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|
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pmc@7000e400 { |
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nvidia,invert-interrupt; |
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nvidia,suspend-mode = <0>; |
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nvidia,cpu-pwr-good-time = <500>; |
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nvidia,cpu-pwr-off-time = <300>; |
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nvidia,core-pwr-good-time = <641 3845>; |
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nvidia,core-pwr-off-time = <61036>; |
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nvidia,core-power-req-active-high; |
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nvidia,sys-clock-req-active-high; |
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}; |
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|
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hda@70030000 { |
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status = "okay"; |
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}; |
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|
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sdhci@700b0000 { /* WiFi/BT on this bus */ |
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status = "okay"; |
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power-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>; |
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bus-width = <4>; |
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no-1-8-v; |
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non-removable; |
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}; |
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|
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sdhci@700b0400 { /* SD Card on this bus */ |
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status = "okay"; |
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cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; |
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power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; |
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wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>; |
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bus-width = <4>; |
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no-1-8-v; |
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}; |
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|
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sdhci@700b0600 { /* eMMC on this bus */ |
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status = "okay"; |
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bus-width = <8>; |
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no-1-8-v; |
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non-removable; |
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}; |
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|
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ahub@70300000 { |
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i2s@70301100 { |
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status = "okay"; |
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}; |
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}; |
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|
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usb@7d000000 { /* Rear external USB port. */ |
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status = "okay"; |
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}; |
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|
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usb-phy@7d000000 { |
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status = "okay"; |
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}; |
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|
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usb@7d004000 { /* Internal webcam. */ |
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status = "okay"; |
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}; |
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|
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usb-phy@7d004000 { |
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status = "okay"; |
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}; |
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|
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usb@7d008000 { /* Left external USB port. */ |
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status = "okay"; |
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}; |
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|
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usb-phy@7d008000 { |
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status = "okay"; |
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}; |
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|
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backlight: backlight { |
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compatible = "pwm-backlight"; |
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|
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enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; |
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pwms = <&pwm 1 1000000>; |
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|
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default-brightness-level = <224>; |
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brightness-levels = |
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< 0 1 2 3 4 5 6 7 |
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8 9 10 11 12 13 14 15 |
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16 17 18 19 20 21 22 23 |
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24 25 26 27 28 29 30 31 |
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32 33 34 35 36 37 38 39 |
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40 41 42 43 44 45 46 47 |
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48 49 50 51 52 53 54 55 |
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56 57 58 59 60 61 62 63 |
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64 65 66 67 68 69 70 71 |
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72 73 74 75 76 77 78 79 |
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80 81 82 83 84 85 86 87 |
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88 89 90 91 92 93 94 95 |
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96 97 98 99 100 101 102 103 |
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104 105 106 107 108 109 110 111 |
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112 113 114 115 116 117 118 119 |
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120 121 122 123 124 125 126 127 |
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128 129 130 131 132 133 134 135 |
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136 137 138 139 140 141 142 143 |
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144 145 146 147 148 149 150 151 |
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152 153 154 155 156 157 158 159 |
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160 161 162 163 164 165 166 167 |
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168 169 170 171 172 173 174 175 |
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176 177 178 179 180 181 182 183 |
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184 185 186 187 188 189 190 191 |
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192 193 194 195 196 197 198 199 |
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200 201 202 203 204 205 206 207 |
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208 209 210 211 212 213 214 215 |
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216 217 218 219 220 221 222 223 |
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224 225 226 227 228 229 230 231 |
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232 233 234 235 236 237 238 239 |
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240 241 242 243 244 245 246 247 |
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248 249 250 251 252 253 254 255 |
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256>; |
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}; |
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|
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clocks { |
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compatible = "simple-bus"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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|
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clk32k_in: clock@0 { |
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compatible = "fixed-clock"; |
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reg = <0>; |
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#clock-cells = <0>; |
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clock-frequency = <32768>; |
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}; |
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}; |
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|
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gpio-keys { |
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compatible = "gpio-keys"; |
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|
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lid { |
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label = "Lid"; |
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gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>; |
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linux,input-type = <5>; |
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linux,code = <KEY_RESERVED>; |
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debounce-interval = <1>; |
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gpio-key,wakeup; |
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}; |
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|
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power { |
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label = "Power"; |
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gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; |
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linux,code = <KEY_POWER>; |
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debounce-interval = <30>; |
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gpio-key,wakeup; |
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}; |
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}; |
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|
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panel: panel { |
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compatible = "auo,b133xtn01"; |
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|
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backlight = <&backlight>; |
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}; |
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|
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sound { |
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compatible = "nvidia,tegra-audio-max98090-nyan-big", |
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"nvidia,tegra-audio-max98090"; |
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nvidia,model = "Acer Chromebook 13"; |
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|
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nvidia,audio-routing = |
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"Headphones", "HPR", |
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"Headphones", "HPL", |
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"Speakers", "SPKR", |
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"Speakers", "SPKL", |
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"Mic Jack", "MICBIAS", |
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"DMICL", "Int Mic", |
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"DMICR", "Int Mic", |
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"IN34", "Mic Jack"; |
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|
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nvidia,i2s-controller = <&tegra_i2s1>; |
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nvidia,audio-codec = <&acodec>; |
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|
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clocks = <&tegra_car TEGRA124_CLK_PLL_A>, |
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<&tegra_car TEGRA124_CLK_PLL_A_OUT0>, |
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<&tegra_car TEGRA124_CLK_EXTERN1>; |
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clock-names = "pll_a", "pll_a_out0", "mclk"; |
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|
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nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>; |
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}; |
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}; |
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|
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#include "cros-ec-keyboard.dtsi" |
@ -0,0 +1,26 @@ |
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/*
|
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* Test-related constants for sandbox |
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* |
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* Copyright (c) 2014 Google, Inc |
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* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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|
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#ifndef __ASM_TEST_H |
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#define __ASM_TEST_H |
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|
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/* The sandbox driver always permits an I2C device with this address */ |
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#define SANDBOX_I2C_TEST_ADDR 0x59 |
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|
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enum sandbox_i2c_eeprom_test_mode { |
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SIE_TEST_MODE_NONE, |
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/* Permits read/write of only one byte per I2C transaction */ |
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SIE_TEST_MODE_SINGLE_BYTE, |
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}; |
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|
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void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev, |
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enum sandbox_i2c_eeprom_test_mode mode); |
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|
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void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len); |
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|
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#endif |
@ -0,0 +1,24 @@ |
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if TARGET_NYAN_BIG |
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|
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config SYS_CPU |
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string |
||||
default "arm720t" if SPL_BUILD |
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default "armv7" if !SPL_BUILD |
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|
||||
config SYS_BOARD |
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string |
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default "nyan-big" |
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|
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config SYS_VENDOR |
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string |
||||
default "nvidia" |
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|
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config SYS_SOC |
||||
string |
||||
default "tegra124" |
||||
|
||||
config SYS_CONFIG_NAME |
||||
string |
||||
default "nyan-big" |
||||
|
||||
endif |
@ -0,0 +1,6 @@ |
||||
NORRIN BOARD |
||||
M: Allen Martin <amartin@nvidia.com> |
||||
S: Maintained |
||||
F: board/nvidia/nyan-big/ |
||||
F: include/configs/nyan-big.h |
||||
F: configs/nyan-big_defconfig |
@ -0,0 +1,9 @@ |
||||
#
|
||||
# (C) Copyright 2014
|
||||
# NVIDIA Corporation <www.nvidia.com>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += ../venice2/as3722_init.o
|
||||
obj-y += nyan-big.o
|
@ -0,0 +1,27 @@ |
||||
/*
|
||||
* (C) Copyright 2014 |
||||
* NVIDIA Corporation <www.nvidia.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/pinmux.h> |
||||
#include "pinmux-config-nyan-big.h" |
||||
|
||||
/*
|
||||
* Routine: pinmux_init |
||||
* Description: Do individual peripheral pinmux configs |
||||
*/ |
||||
void pinmux_init(void) |
||||
{ |
||||
gpio_config_table(nyan_big_gpio_inits, |
||||
ARRAY_SIZE(nyan_big_gpio_inits)); |
||||
|
||||
pinmux_config_pingrp_table(nyan_big_pingrps, |
||||
ARRAY_SIZE(nyan_big_pingrps)); |
||||
|
||||
pinmux_config_drvgrp_table(nyan_big_drvgrps, |
||||
ARRAY_SIZE(nyan_big_drvgrps)); |
||||
} |
@ -0,0 +1,287 @@ |
||||
/*
|
||||
* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef _PINMUX_CONFIG_NYAN_BIG_H_ |
||||
#define _PINMUX_CONFIG_NYAN_BIG_H_ |
||||
|
||||
#define GPIO_INIT(_gpio, _init) \ |
||||
{ \
|
||||
.gpio = GPIO_P##_gpio, \
|
||||
.init = TEGRA_GPIO_INIT_##_init, \
|
||||
} |
||||
|
||||
static const struct tegra_gpio_config nyan_big_gpio_inits[] = { |
||||
/* gpio, init_val */ |
||||
GPIO_INIT(A0, IN), |
||||
GPIO_INIT(C7, IN), |
||||
GPIO_INIT(G0, IN), |
||||
GPIO_INIT(G1, IN), |
||||
GPIO_INIT(G2, IN), |
||||
GPIO_INIT(G3, IN), |
||||
GPIO_INIT(H2, IN), |
||||
GPIO_INIT(H4, IN), |
||||
GPIO_INIT(H6, IN), |
||||
GPIO_INIT(H7, OUT1), |
||||
GPIO_INIT(I0, IN), |
||||
GPIO_INIT(I1, IN), |
||||
GPIO_INIT(I5, OUT1), |
||||
GPIO_INIT(I6, IN), |
||||
GPIO_INIT(I7, IN), |
||||
GPIO_INIT(J0, IN), |
||||
GPIO_INIT(J7, IN), |
||||
GPIO_INIT(K1, OUT0), |
||||
GPIO_INIT(K2, IN), |
||||
GPIO_INIT(K4, OUT0), |
||||
GPIO_INIT(K6, OUT0), |
||||
GPIO_INIT(K7, IN), |
||||
GPIO_INIT(N7, IN), |
||||
GPIO_INIT(P2, OUT0), |
||||
GPIO_INIT(Q0, IN), |
||||
GPIO_INIT(Q2, IN), |
||||
GPIO_INIT(Q3, IN), |
||||
GPIO_INIT(Q6, IN), |
||||
GPIO_INIT(Q7, IN), |
||||
GPIO_INIT(R0, OUT0), |
||||
GPIO_INIT(R1, IN), |
||||
GPIO_INIT(R4, IN), |
||||
GPIO_INIT(R7, IN), |
||||
GPIO_INIT(S3, OUT0), |
||||
GPIO_INIT(S4, OUT0), |
||||
GPIO_INIT(S7, IN), |
||||
GPIO_INIT(T1, IN), |
||||
GPIO_INIT(U4, IN), |
||||
GPIO_INIT(U5, IN), |
||||
GPIO_INIT(U6, IN), |
||||
GPIO_INIT(V0, IN), |
||||
GPIO_INIT(W3, IN), |
||||
GPIO_INIT(X1, IN), |
||||
GPIO_INIT(X4, IN), |
||||
GPIO_INIT(X7, OUT0), |
||||
}; |
||||
|
||||
#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _rcv_sel) \ |
||||
{ \
|
||||
.pingrp = PMUX_PINGRP_##_pingrp, \
|
||||
.func = PMUX_FUNC_##_mux, \
|
||||
.pull = PMUX_PULL_##_pull, \
|
||||
.tristate = PMUX_TRI_##_tri, \
|
||||
.io = PMUX_PIN_##_io, \
|
||||
.od = PMUX_PIN_OD_##_od, \
|
||||
.rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \
|
||||
.lock = PMUX_PIN_LOCK_DEFAULT, \
|
||||
.ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
|
||||
} |
||||
|
||||
static const struct pmux_pingrp_config nyan_big_pingrps[] = { |
||||
/* pingrp, mux, pull, tri, e_input, od, rcv_sel */ |
||||
PINCFG(CLK_32K_OUT_PA0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(UART3_CTS_N_PA1, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP2_DIN_PA4, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PB0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PB1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(UART3_RTS_N_PC0, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(UART2_TXD_PC2, IRDA, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(UART2_RXD_PC3, IRDA, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), |
||||
PINCFG(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), |
||||
PINCFG(PC7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PG0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PG1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PG2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PG3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PG4, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PG5, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PG6, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PG7, SPI4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PH0, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PH1, PWM1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PH2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PH3, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PH4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PH5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PH6, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PI0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PI1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PI2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PI3, SPI4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PI4, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PI5, DEFAULT, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PI6, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PI7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PJ0, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PJ2, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(UART2_CTS_N_PJ5, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(UART2_RTS_N_PJ6, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PJ7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PK0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PK1, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PK2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PK3, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PK4, DEFAULT, UP, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SPDIF_OUT_PK5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SPDIF_IN_PK6, DEFAULT, DOWN, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PK7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP1_FS_PN0, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP1_DIN_PN1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP1_DOUT_PN2, I2S0, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP1_SCLK_PN3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), |
||||
PINCFG(USB_VBUS_EN1_PN5, USB, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), |
||||
PINCFG(HDMI_INT_PN7, DEFAULT, DOWN, NORMAL, INPUT, DEFAULT, NORMAL), |
||||
PINCFG(ULPI_DATA7_PO0, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_DATA0_PO1, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_DATA1_PO2, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_DATA2_PO3, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_DATA3_PO4, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_DATA4_PO5, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_DATA5_PO6, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_DATA6_PO7, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP3_FS_PP0, I2S2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP3_DIN_PP1, I2S2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP3_DOUT_PP2, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP3_SCLK_PP3, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP4_FS_PP4, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP4_DIN_PP5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP4_DOUT_PP6, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP4_SCLK_PP7, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_COL0_PQ0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_COL1_PQ1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_COL2_PQ2, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_COL3_PQ3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_COL4_PQ4, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_COL5_PQ5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_COL6_PQ6, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_COL7_PQ7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW0_PR0, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW1_PR1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW2_PR2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW3_PR3, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW4_PR4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW5_PR5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW6_PR6, KBC, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW7_PR7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW8_PS0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW9_PS1, UARTA, DOWN, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW10_PS2, UARTA, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW11_PS3, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW12_PS4, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW13_PS5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW14_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW15_PS7, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW16_PT0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(KB_ROW17_PT1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), |
||||
PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), |
||||
PINCFG(SDMMC4_CMD_PT7, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PU0, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PU1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PU3, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PU4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PU5, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PU6, DEFAULT, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PV0, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PV1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC3_CD_N_PV2, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC1_WP_N_PV3, SDMMC1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL), |
||||
PINCFG(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL), |
||||
PINCFG(GPIO_W2_AUD_PW2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(GPIO_W3_AUD_PW3, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(CLK2_OUT_PW5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(UART3_TXD_PW6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(UART3_RXD_PW7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(GPIO_X1_AUD_PX1, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(GPIO_X3_AUD_PX3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(GPIO_X4_AUD_PX4, DEFAULT, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(GPIO_X5_AUD_PX5, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(GPIO_X6_AUD_PX6, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(GPIO_X7_AUD_PX7, DEFAULT, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_CLK_PY0, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_DIR_PY1, SPI1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_NXT_PY2, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(ULPI_STP_PY3, SPI1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), |
||||
PINCFG(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), |
||||
PINCFG(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PBB0, VGP6, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(CAM_I2C_SCL_PBB1, RSVD3, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), |
||||
PINCFG(CAM_I2C_SDA_PBB2, RSVD3, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), |
||||
PINCFG(PBB3, VGP3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PBB4, VGP4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PBB5, RSVD3, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PBB6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PBB7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(CAM_MCLK_PCC0, VI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PCC1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PCC2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(CLK2_REQ_PCC5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PEX_L0_RST_N_PDD1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PEX_L0_CLKREQ_N_PDD2, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PEX_WAKE_N_PDD3, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PEX_L1_RST_N_PDD5, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PEX_L1_CLKREQ_N_PDD6, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(CLK3_OUT_PEE0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(CLK3_REQ_PEE1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DAP_MCLK1_REQ_PEE2, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT), |
||||
PINCFG(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(SDMMC3_CLK_LB_IN_PEE5, SDMMC3, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(DP_HPD_PFF0, DP, UP, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(USB_VBUS_EN2_PFF1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), |
||||
PINCFG(PFF2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT), |
||||
PINCFG(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(PWR_INT_N, PMI, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
PINCFG(OWR, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, NORMAL), |
||||
PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT), |
||||
PINCFG(JTAG_RTCK, RTCK, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT), |
||||
}; |
||||
|
||||
#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \ |
||||
{ \
|
||||
.drvgrp = PMUX_DRVGRP_##_drvgrp, \
|
||||
.slwf = _slwf, \
|
||||
.slwr = _slwr, \
|
||||
.drvup = _drvup, \
|
||||
.drvdn = _drvdn, \
|
||||
.lpmd = PMUX_LPMD_##_lpmd, \
|
||||
.schmt = PMUX_SCHMT_##_schmt, \
|
||||
.hsm = PMUX_HSM_##_hsm, \
|
||||
} |
||||
|
||||
static const struct pmux_drvgrp_config nyan_big_drvgrps[] = { |
||||
}; |
||||
|
||||
#endif /* PINMUX_CONFIG_NYAN_BIG_H */ |
@ -0,0 +1,5 @@ |
||||
+S:CONFIG_ARM=y |
||||
+S:CONFIG_TEGRA=y |
||||
+S:CONFIG_TEGRA124=y |
||||
+S:CONFIG_TARGET_NYAN_BIG=y |
||||
CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" |
@ -0,0 +1,14 @@ |
||||
/*
|
||||
* Copyright (c) 2014 Google, Inc |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <dm.h> |
||||
#include <i2c.h> |
||||
|
||||
UCLASS_DRIVER(i2c_emul) = { |
||||
.id = UCLASS_I2C_EMUL, |
||||
.name = "i2c_emul", |
||||
}; |
@ -0,0 +1,466 @@ |
||||
/*
|
||||
* Copyright (c) 2014 Google, Inc |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <dm.h> |
||||
#include <errno.h> |
||||
#include <fdtdec.h> |
||||
#include <i2c.h> |
||||
#include <malloc.h> |
||||
#include <dm/device-internal.h> |
||||
#include <dm/lists.h> |
||||
#include <dm/root.h> |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
#define I2C_MAX_OFFSET_LEN 4 |
||||
|
||||
/**
|
||||
* i2c_setup_offset() - Set up a new message with a chip offset |
||||
* |
||||
* @chip: Chip to use |
||||
* @offset: Byte offset within chip |
||||
* @offset_buf: Place to put byte offset |
||||
* @msg: Message buffer |
||||
* @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the |
||||
* message is still set up but will not contain an offset. |
||||
*/ |
||||
static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset, |
||||
uint8_t offset_buf[], struct i2c_msg *msg) |
||||
{ |
||||
int offset_len; |
||||
|
||||
msg->addr = chip->chip_addr; |
||||
msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; |
||||
msg->len = chip->offset_len; |
||||
msg->buf = offset_buf; |
||||
if (!chip->offset_len) |
||||
return -EADDRNOTAVAIL; |
||||
assert(chip->offset_len <= I2C_MAX_OFFSET_LEN); |
||||
offset_len = chip->offset_len; |
||||
while (offset_len--) |
||||
*offset_buf++ = offset >> (8 * offset_len); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int i2c_read_bytewise(struct udevice *dev, uint offset, |
||||
uint8_t *buffer, int len) |
||||
{ |
||||
struct dm_i2c_chip *chip = dev_get_parentdata(dev); |
||||
struct udevice *bus = dev_get_parent(dev); |
||||
struct dm_i2c_ops *ops = i2c_get_ops(bus); |
||||
struct i2c_msg msg[2], *ptr; |
||||
uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; |
||||
int ret; |
||||
int i; |
||||
|
||||
for (i = 0; i < len; i++) { |
||||
if (i2c_setup_offset(chip, offset + i, offset_buf, msg)) |
||||
return -EINVAL; |
||||
ptr = msg + 1; |
||||
ptr->addr = chip->chip_addr; |
||||
ptr->flags = msg->flags | I2C_M_RD; |
||||
ptr->len = 1; |
||||
ptr->buf = &buffer[i]; |
||||
ptr++; |
||||
|
||||
ret = ops->xfer(bus, msg, ptr - msg); |
||||
if (ret) |
||||
return ret; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int i2c_write_bytewise(struct udevice *dev, uint offset, |
||||
const uint8_t *buffer, int len) |
||||
{ |
||||
struct dm_i2c_chip *chip = dev_get_parentdata(dev); |
||||
struct udevice *bus = dev_get_parent(dev); |
||||
struct dm_i2c_ops *ops = i2c_get_ops(bus); |
||||
struct i2c_msg msg[1]; |
||||
uint8_t buf[I2C_MAX_OFFSET_LEN + 1]; |
||||
int ret; |
||||
int i; |
||||
|
||||
for (i = 0; i < len; i++) { |
||||
if (i2c_setup_offset(chip, offset + i, buf, msg)) |
||||
return -EINVAL; |
||||
buf[msg->len++] = buffer[i]; |
||||
|
||||
ret = ops->xfer(bus, msg, 1); |
||||
if (ret) |
||||
return ret; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len) |
||||
{ |
||||
struct dm_i2c_chip *chip = dev_get_parentdata(dev); |
||||
struct udevice *bus = dev_get_parent(dev); |
||||
struct dm_i2c_ops *ops = i2c_get_ops(bus); |
||||
struct i2c_msg msg[2], *ptr; |
||||
uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; |
||||
int msg_count; |
||||
|
||||
if (!ops->xfer) |
||||
return -ENOSYS; |
||||
if (chip->flags & DM_I2C_CHIP_RD_ADDRESS) |
||||
return i2c_read_bytewise(dev, offset, buffer, len); |
||||
ptr = msg; |
||||
if (!i2c_setup_offset(chip, offset, offset_buf, ptr)) |
||||
ptr++; |
||||
|
||||
if (len) { |
||||
ptr->addr = chip->chip_addr; |
||||
ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; |
||||
ptr->flags |= I2C_M_RD; |
||||
ptr->len = len; |
||||
ptr->buf = buffer; |
||||
ptr++; |
||||
} |
||||
msg_count = ptr - msg; |
||||
|
||||
return ops->xfer(bus, msg, msg_count); |
||||
} |
||||
|
||||
int i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, int len) |
||||
{ |
||||
struct dm_i2c_chip *chip = dev_get_parentdata(dev); |
||||
struct udevice *bus = dev_get_parent(dev); |
||||
struct dm_i2c_ops *ops = i2c_get_ops(bus); |
||||
struct i2c_msg msg[1]; |
||||
|
||||
if (!ops->xfer) |
||||
return -ENOSYS; |
||||
|
||||
if (chip->flags & DM_I2C_CHIP_WR_ADDRESS) |
||||
return i2c_write_bytewise(dev, offset, buffer, len); |
||||
/*
|
||||
* The simple approach would be to send two messages here: one to |
||||
* set the offset and one to write the bytes. However some drivers |
||||
* will not be expecting this, and some chips won't like how the |
||||
* driver presents this on the I2C bus. |
||||
* |
||||
* The API does not support separate offset and data. We could extend |
||||
* it with a flag indicating that there is data in the next message |
||||
* that needs to be processed in the same transaction. We could |
||||
* instead add an additional buffer to each message. For now, handle |
||||
* this in the uclass since it isn't clear what the impact on drivers |
||||
* would be with this extra complication. Unfortunately this means |
||||
* copying the message. |
||||
* |
||||
* Use the stack for small messages, malloc() for larger ones. We |
||||
* need to allow space for the offset (up to 4 bytes) and the message |
||||
* itself. |
||||
*/ |
||||
if (len < 64) { |
||||
uint8_t buf[I2C_MAX_OFFSET_LEN + len]; |
||||
|
||||
i2c_setup_offset(chip, offset, buf, msg); |
||||
msg->len += len; |
||||
memcpy(buf + chip->offset_len, buffer, len); |
||||
|
||||
return ops->xfer(bus, msg, 1); |
||||
} else { |
||||
uint8_t *buf; |
||||
int ret; |
||||
|
||||
buf = malloc(I2C_MAX_OFFSET_LEN + len); |
||||
if (!buf) |
||||
return -ENOMEM; |
||||
i2c_setup_offset(chip, offset, buf, msg); |
||||
msg->len += len; |
||||
memcpy(buf + chip->offset_len, buffer, len); |
||||
|
||||
ret = ops->xfer(bus, msg, 1); |
||||
free(buf); |
||||
return ret; |
||||
} |
||||
} |
||||
|
||||
/**
|
||||
* i2c_probe_chip() - probe for a chip on a bus |
||||
* |
||||
* @bus: Bus to probe |
||||
* @chip_addr: Chip address to probe |
||||
* @flags: Flags for the chip |
||||
* @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip |
||||
* does not respond to probe |
||||
*/ |
||||
static int i2c_probe_chip(struct udevice *bus, uint chip_addr, |
||||
enum dm_i2c_chip_flags chip_flags) |
||||
{ |
||||
struct dm_i2c_ops *ops = i2c_get_ops(bus); |
||||
struct i2c_msg msg[1]; |
||||
int ret; |
||||
|
||||
if (ops->probe_chip) { |
||||
ret = ops->probe_chip(bus, chip_addr, chip_flags); |
||||
if (!ret || ret != -ENOSYS) |
||||
return ret; |
||||
} |
||||
|
||||
if (!ops->xfer) |
||||
return -ENOSYS; |
||||
|
||||
/* Probe with a zero-length message */ |
||||
msg->addr = chip_addr; |
||||
msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; |
||||
msg->len = 0; |
||||
msg->buf = NULL; |
||||
|
||||
return ops->xfer(bus, msg, 1); |
||||
} |
||||
|
||||
static int i2c_bind_driver(struct udevice *bus, uint chip_addr, |
||||
struct udevice **devp) |
||||
{ |
||||
struct dm_i2c_chip chip; |
||||
char name[30], *str; |
||||
struct udevice *dev; |
||||
int ret; |
||||
|
||||
snprintf(name, sizeof(name), "generic_%x", chip_addr); |
||||
str = strdup(name); |
||||
ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev); |
||||
debug("%s: device_bind_driver: ret=%d\n", __func__, ret); |
||||
if (ret) |
||||
goto err_bind; |
||||
|
||||
/* Tell the device what we know about it */ |
||||
memset(&chip, '\0', sizeof(chip)); |
||||
chip.chip_addr = chip_addr; |
||||
chip.offset_len = 1; /* we assume */ |
||||
ret = device_probe_child(dev, &chip); |
||||
debug("%s: device_probe_child: ret=%d\n", __func__, ret); |
||||
if (ret) |
||||
goto err_probe; |
||||
|
||||
*devp = dev; |
||||
return 0; |
||||
|
||||
err_probe: |
||||
device_unbind(dev); |
||||
err_bind: |
||||
free(str); |
||||
return ret; |
||||
} |
||||
|
||||
int i2c_get_chip(struct udevice *bus, uint chip_addr, struct udevice **devp) |
||||
{ |
||||
struct udevice *dev; |
||||
|
||||
debug("%s: Searching bus '%s' for address %02x: ", __func__, |
||||
bus->name, chip_addr); |
||||
for (device_find_first_child(bus, &dev); dev; |
||||
device_find_next_child(&dev)) { |
||||
struct dm_i2c_chip store; |
||||
struct dm_i2c_chip *chip = dev_get_parentdata(dev); |
||||
int ret; |
||||
|
||||
if (!chip) { |
||||
chip = &store; |
||||
i2c_chip_ofdata_to_platdata(gd->fdt_blob, |
||||
dev->of_offset, chip); |
||||
} |
||||
if (chip->chip_addr == chip_addr) { |
||||
ret = device_probe(dev); |
||||
debug("found, ret=%d\n", ret); |
||||
if (ret) |
||||
return ret; |
||||
*devp = dev; |
||||
return 0; |
||||
} |
||||
} |
||||
debug("not found\n"); |
||||
return i2c_bind_driver(bus, chip_addr, devp); |
||||
} |
||||
|
||||
int i2c_get_chip_for_busnum(int busnum, int chip_addr, struct udevice **devp) |
||||
{ |
||||
struct udevice *bus; |
||||
int ret; |
||||
|
||||
ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); |
||||
if (ret) { |
||||
debug("Cannot find I2C bus %d\n", busnum); |
||||
return ret; |
||||
} |
||||
ret = i2c_get_chip(bus, chip_addr, devp); |
||||
if (ret) { |
||||
debug("Cannot find I2C chip %02x on bus %d\n", chip_addr, |
||||
busnum); |
||||
return ret; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, |
||||
struct udevice **devp) |
||||
{ |
||||
int ret; |
||||
|
||||
*devp = NULL; |
||||
|
||||
/* First probe that chip */ |
||||
ret = i2c_probe_chip(bus, chip_addr, chip_flags); |
||||
debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, |
||||
chip_addr, ret); |
||||
if (ret) |
||||
return ret; |
||||
|
||||
/* The chip was found, see if we have a driver, and probe it */ |
||||
ret = i2c_get_chip(bus, chip_addr, devp); |
||||
debug("%s: i2c_get_chip: ret=%d\n", __func__, ret); |
||||
|
||||
return ret; |
||||
} |
||||
|
||||
int i2c_set_bus_speed(struct udevice *bus, unsigned int speed) |
||||
{ |
||||
struct dm_i2c_ops *ops = i2c_get_ops(bus); |
||||
struct dm_i2c_bus *i2c = bus->uclass_priv; |
||||
int ret; |
||||
|
||||
/*
|
||||
* If we have a method, call it. If not then the driver probably wants |
||||
* to deal with speed changes on the next transfer. It can easily read |
||||
* the current speed from this uclass |
||||
*/ |
||||
if (ops->set_bus_speed) { |
||||
ret = ops->set_bus_speed(bus, speed); |
||||
if (ret) |
||||
return ret; |
||||
} |
||||
i2c->speed_hz = speed; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
/*
|
||||
* i2c_get_bus_speed: |
||||
* |
||||
* Returns speed of selected I2C bus in Hz |
||||
*/ |
||||
int i2c_get_bus_speed(struct udevice *bus) |
||||
{ |
||||
struct dm_i2c_ops *ops = i2c_get_ops(bus); |
||||
struct dm_i2c_bus *i2c = bus->uclass_priv; |
||||
|
||||
if (!ops->get_bus_speed) |
||||
return i2c->speed_hz; |
||||
|
||||
return ops->get_bus_speed(bus); |
||||
} |
||||
|
||||
int i2c_set_chip_flags(struct udevice *dev, uint flags) |
||||
{ |
||||
struct udevice *bus = dev->parent; |
||||
struct dm_i2c_chip *chip = dev_get_parentdata(dev); |
||||
struct dm_i2c_ops *ops = i2c_get_ops(bus); |
||||
int ret; |
||||
|
||||
if (ops->set_flags) { |
||||
ret = ops->set_flags(dev, flags); |
||||
if (ret) |
||||
return ret; |
||||
} |
||||
chip->flags = flags; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int i2c_get_chip_flags(struct udevice *dev, uint *flagsp) |
||||
{ |
||||
struct dm_i2c_chip *chip = dev_get_parentdata(dev); |
||||
|
||||
*flagsp = chip->flags; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len) |
||||
{ |
||||
struct dm_i2c_chip *chip = dev_get_parentdata(dev); |
||||
|
||||
if (offset_len > I2C_MAX_OFFSET_LEN) |
||||
return -EINVAL; |
||||
chip->offset_len = offset_len; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
int i2c_deblock(struct udevice *bus) |
||||
{ |
||||
struct dm_i2c_ops *ops = i2c_get_ops(bus); |
||||
|
||||
/*
|
||||
* We could implement a software deblocking here if we could get |
||||
* access to the GPIOs used by I2C, and switch them to GPIO mode |
||||
* and then back to I2C. This is somewhat beyond our powers in |
||||
* driver model at present, so for now just fail. |
||||
* |
||||
* See https://patchwork.ozlabs.org/patch/399040/
|
||||
*/ |
||||
if (!ops->deblock) |
||||
return -ENOSYS; |
||||
|
||||
return ops->deblock(bus); |
||||
} |
||||
|
||||
int i2c_chip_ofdata_to_platdata(const void *blob, int node, |
||||
struct dm_i2c_chip *chip) |
||||
{ |
||||
chip->offset_len = 1; /* default */ |
||||
chip->flags = 0; |
||||
chip->chip_addr = fdtdec_get_int(gd->fdt_blob, node, "reg", -1); |
||||
if (chip->chip_addr == -1) { |
||||
debug("%s: I2C Node '%s' has no 'reg' property\n", __func__, |
||||
fdt_get_name(blob, node, NULL)); |
||||
return -EINVAL; |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int i2c_post_probe(struct udevice *dev) |
||||
{ |
||||
struct dm_i2c_bus *i2c = dev->uclass_priv; |
||||
|
||||
i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset, |
||||
"clock-frequency", 100000); |
||||
|
||||
return i2c_set_bus_speed(dev, i2c->speed_hz); |
||||
} |
||||
|
||||
int i2c_post_bind(struct udevice *dev) |
||||
{ |
||||
/* Scan the bus for devices */ |
||||
return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); |
||||
} |
||||
|
||||
UCLASS_DRIVER(i2c) = { |
||||
.id = UCLASS_I2C, |
||||
.name = "i2c", |
||||
.per_device_auto_alloc_size = sizeof(struct dm_i2c_bus), |
||||
.post_bind = i2c_post_bind, |
||||
.post_probe = i2c_post_probe, |
||||
}; |
||||
|
||||
UCLASS_DRIVER(i2c_generic) = { |
||||
.id = UCLASS_I2C_GENERIC, |
||||
.name = "i2c_generic", |
||||
}; |
||||
|
||||
U_BOOT_DRIVER(i2c_generic_chip_drv) = { |
||||
.name = "i2c_generic_chip_drv", |
||||
.id = UCLASS_I2C_GENERIC, |
||||
}; |
@ -0,0 +1,111 @@ |
||||
/*
|
||||
* Simulate an I2C port |
||||
* |
||||
* Copyright (c) 2014 Google, Inc |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <dm.h> |
||||
#include <errno.h> |
||||
#include <fdtdec.h> |
||||
#include <i2c.h> |
||||
#include <asm/test.h> |
||||
#include <dm/lists.h> |
||||
#include <dm/device-internal.h> |
||||
#include <dm/root.h> |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
struct dm_sandbox_i2c_emul_priv { |
||||
struct udevice *emul; |
||||
}; |
||||
|
||||
static int get_emul(struct udevice *dev, struct udevice **devp, |
||||
struct dm_i2c_ops **opsp) |
||||
{ |
||||
struct dm_i2c_chip *priv; |
||||
int ret; |
||||
|
||||
*devp = NULL; |
||||
*opsp = NULL; |
||||
priv = dev_get_parentdata(dev); |
||||
if (!priv->emul) { |
||||
ret = dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, |
||||
false); |
||||
if (ret) |
||||
return ret; |
||||
|
||||
ret = device_get_child(dev, 0, &priv->emul); |
||||
if (ret) |
||||
return ret; |
||||
} |
||||
*devp = priv->emul; |
||||
*opsp = i2c_get_ops(priv->emul); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int sandbox_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, |
||||
int nmsgs) |
||||
{ |
||||
struct dm_i2c_bus *i2c = bus->uclass_priv; |
||||
struct dm_i2c_ops *ops; |
||||
struct udevice *emul, *dev; |
||||
bool is_read; |
||||
int ret; |
||||
|
||||
/* Special test code to return success but with no emulation */ |
||||
if (msg->addr == SANDBOX_I2C_TEST_ADDR) |
||||
return 0; |
||||
|
||||
ret = i2c_get_chip(bus, msg->addr, &dev); |
||||
if (ret) |
||||
return ret; |
||||
|
||||
ret = get_emul(dev, &emul, &ops); |
||||
if (ret) |
||||
return ret; |
||||
|
||||
/*
|
||||
* For testing, don't allow writing above 100KHz for writes and |
||||
* 400KHz for reads |
||||
*/ |
||||
is_read = nmsgs > 1; |
||||
if (i2c->speed_hz > (is_read ? 400000 : 100000)) |
||||
return -EINVAL; |
||||
return ops->xfer(emul, msg, nmsgs); |
||||
} |
||||
|
||||
static const struct dm_i2c_ops sandbox_i2c_ops = { |
||||
.xfer = sandbox_i2c_xfer, |
||||
}; |
||||
|
||||
static int sandbox_i2c_child_pre_probe(struct udevice *dev) |
||||
{ |
||||
struct dm_i2c_chip *i2c_chip = dev_get_parentdata(dev); |
||||
|
||||
/* Ignore our test address */ |
||||
if (i2c_chip->chip_addr == SANDBOX_I2C_TEST_ADDR) |
||||
return 0; |
||||
if (dev->of_offset == -1) |
||||
return 0; |
||||
|
||||
return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, |
||||
i2c_chip); |
||||
} |
||||
|
||||
static const struct udevice_id sandbox_i2c_ids[] = { |
||||
{ .compatible = "sandbox,i2c" }, |
||||
{ } |
||||
}; |
||||
|
||||
U_BOOT_DRIVER(i2c_sandbox) = { |
||||
.name = "i2c_sandbox", |
||||
.id = UCLASS_I2C, |
||||
.of_match = sandbox_i2c_ids, |
||||
.per_child_auto_alloc_size = sizeof(struct dm_i2c_chip), |
||||
.child_pre_probe = sandbox_i2c_child_pre_probe, |
||||
.ops = &sandbox_i2c_ops, |
||||
}; |
@ -0,0 +1,51 @@ |
||||
/*
|
||||
* Copyright (c) 2014 Google, Inc |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <dm.h> |
||||
#include <i2c.h> |
||||
#include <i2c_eeprom.h> |
||||
|
||||
static int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf, |
||||
int size) |
||||
{ |
||||
return -ENODEV; |
||||
} |
||||
|
||||
static int i2c_eeprom_write(struct udevice *dev, int offset, |
||||
const uint8_t *buf, int size) |
||||
{ |
||||
return -ENODEV; |
||||
} |
||||
|
||||
struct i2c_eeprom_ops i2c_eeprom_std_ops = { |
||||
.read = i2c_eeprom_read, |
||||
.write = i2c_eeprom_write, |
||||
}; |
||||
|
||||
int i2c_eeprom_std_probe(struct udevice *dev) |
||||
{ |
||||
return 0; |
||||
} |
||||
|
||||
static const struct udevice_id i2c_eeprom_std_ids[] = { |
||||
{ .compatible = "i2c-eeprom" }, |
||||
{ } |
||||
}; |
||||
|
||||
U_BOOT_DRIVER(i2c_eeprom_std) = { |
||||
.name = "i2c_eeprom", |
||||
.id = UCLASS_I2C_EEPROM, |
||||
.of_match = i2c_eeprom_std_ids, |
||||
.probe = i2c_eeprom_std_probe, |
||||
.priv_auto_alloc_size = sizeof(struct i2c_eeprom), |
||||
.ops = &i2c_eeprom_std_ops, |
||||
}; |
||||
|
||||
UCLASS_DRIVER(i2c_eeprom) = { |
||||
.id = UCLASS_I2C_EEPROM, |
||||
.name = "i2c_eeprom", |
||||
}; |
@ -0,0 +1,168 @@ |
||||
/*
|
||||
* Simulate an I2C eeprom |
||||
* |
||||
* Copyright (c) 2014 Google, Inc |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <dm.h> |
||||
#include <fdtdec.h> |
||||
#include <i2c.h> |
||||
#include <malloc.h> |
||||
#include <asm/test.h> |
||||
|
||||
#ifdef DEBUG |
||||
#define debug_buffer print_buffer |
||||
#else |
||||
#define debug_buffer(x, ...) |
||||
#endif |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
struct sandbox_i2c_flash_plat_data { |
||||
enum sandbox_i2c_eeprom_test_mode test_mode; |
||||
const char *filename; |
||||
int offset_len; /* Length of an offset in bytes */ |
||||
int size; /* Size of data buffer */ |
||||
}; |
||||
|
||||
struct sandbox_i2c_flash { |
||||
uint8_t *data; |
||||
}; |
||||
|
||||
void sandbox_i2c_eeprom_set_test_mode(struct udevice *dev, |
||||
enum sandbox_i2c_eeprom_test_mode mode) |
||||
{ |
||||
struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev); |
||||
|
||||
plat->test_mode = mode; |
||||
} |
||||
|
||||
void sandbox_i2c_eeprom_set_offset_len(struct udevice *dev, int offset_len) |
||||
{ |
||||
struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev); |
||||
|
||||
plat->offset_len = offset_len; |
||||
} |
||||
|
||||
static int sandbox_i2c_eeprom_xfer(struct udevice *emul, struct i2c_msg *msg, |
||||
int nmsgs) |
||||
{ |
||||
struct sandbox_i2c_flash *priv = dev_get_priv(emul); |
||||
uint offset = 0; |
||||
|
||||
debug("\n%s\n", __func__); |
||||
debug_buffer(0, priv->data, 1, 16, 0); |
||||
for (; nmsgs > 0; nmsgs--, msg++) { |
||||
struct sandbox_i2c_flash_plat_data *plat = |
||||
dev_get_platdata(emul); |
||||
int len; |
||||
u8 *ptr; |
||||
|
||||
if (!plat->size) |
||||
return -ENODEV; |
||||
if (msg->addr + msg->len > plat->size) { |
||||
debug("%s: Address %x, len %x is outside range 0..%x\n", |
||||
__func__, msg->addr, msg->len, plat->size); |
||||
return -EINVAL; |
||||
} |
||||
len = msg->len; |
||||
debug(" %s: msg->len=%d", |
||||
msg->flags & I2C_M_RD ? "read" : "write", |
||||
msg->len); |
||||
if (msg->flags & I2C_M_RD) { |
||||
if (plat->test_mode == SIE_TEST_MODE_SINGLE_BYTE) |
||||
len = 1; |
||||
debug(", offset %x, len %x: ", offset, len); |
||||
memcpy(msg->buf, priv->data + offset, len); |
||||
memset(msg->buf + len, '\xff', msg->len - len); |
||||
debug_buffer(0, msg->buf, 1, msg->len, 0); |
||||
} else if (len >= plat->offset_len) { |
||||
int i; |
||||
|
||||
ptr = msg->buf; |
||||
for (i = 0; i < plat->offset_len; i++, len--) |
||||
offset = (offset << 8) | *ptr++; |
||||
debug(", set offset %x: ", offset); |
||||
debug_buffer(0, msg->buf, 1, msg->len, 0); |
||||
if (plat->test_mode == SIE_TEST_MODE_SINGLE_BYTE) |
||||
len = min(len, 1); |
||||
|
||||
/* For testing, map offsets into our limited buffer */ |
||||
for (i = 24; i > 0; i -= 8) { |
||||
if (offset > (1 << i)) { |
||||
offset = (offset >> i) | |
||||
(offset & ((1 << i) - 1)); |
||||
offset += i; |
||||
} |
||||
} |
||||
memcpy(priv->data + offset, ptr, len); |
||||
} |
||||
} |
||||
debug_buffer(0, priv->data, 1, 16, 0); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
struct dm_i2c_ops sandbox_i2c_emul_ops = { |
||||
.xfer = sandbox_i2c_eeprom_xfer, |
||||
}; |
||||
|
||||
static int sandbox_i2c_eeprom_ofdata_to_platdata(struct udevice *dev) |
||||
{ |
||||
struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev); |
||||
|
||||
plat->size = fdtdec_get_int(gd->fdt_blob, dev->of_offset, |
||||
"sandbox,size", 32); |
||||
plat->filename = fdt_getprop(gd->fdt_blob, dev->of_offset, |
||||
"sandbox,filename", NULL); |
||||
if (!plat->filename) { |
||||
debug("%s: No filename for device '%s'\n", __func__, |
||||
dev->name); |
||||
return -EINVAL; |
||||
} |
||||
plat->test_mode = SIE_TEST_MODE_NONE; |
||||
plat->offset_len = 1; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int sandbox_i2c_eeprom_probe(struct udevice *dev) |
||||
{ |
||||
struct sandbox_i2c_flash_plat_data *plat = dev_get_platdata(dev); |
||||
struct sandbox_i2c_flash *priv = dev_get_priv(dev); |
||||
|
||||
priv->data = calloc(1, plat->size); |
||||
if (!priv->data) |
||||
return -ENOMEM; |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int sandbox_i2c_eeprom_remove(struct udevice *dev) |
||||
{ |
||||
struct sandbox_i2c_flash *priv = dev_get_priv(dev); |
||||
|
||||
free(priv->data); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static const struct udevice_id sandbox_i2c_ids[] = { |
||||
{ .compatible = "sandbox,i2c-eeprom" }, |
||||
{ } |
||||
}; |
||||
|
||||
U_BOOT_DRIVER(sandbox_i2c_emul) = { |
||||
.name = "sandbox_i2c_eeprom_emul", |
||||
.id = UCLASS_I2C_EMUL, |
||||
.of_match = sandbox_i2c_ids, |
||||
.ofdata_to_platdata = sandbox_i2c_eeprom_ofdata_to_platdata, |
||||
.probe = sandbox_i2c_eeprom_probe, |
||||
.remove = sandbox_i2c_eeprom_remove, |
||||
.priv_auto_alloc_size = sizeof(struct sandbox_i2c_flash), |
||||
.platdata_auto_alloc_size = sizeof(struct sandbox_i2c_flash_plat_data), |
||||
.ops = &sandbox_i2c_emul_ops, |
||||
}; |
@ -0,0 +1,74 @@ |
||||
/*
|
||||
* (C) Copyright 2014 |
||||
* NVIDIA Corporation <www.nvidia.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
#include <linux/sizes.h> |
||||
|
||||
#include "tegra124-common.h" |
||||
|
||||
/* High-level configuration options */ |
||||
#define V_PROMPT "Tegra124 (Nyan-big) # " |
||||
#define CONFIG_TEGRA_BOARD_STRING "Google/NVIDIA Nyan-big" |
||||
|
||||
/* Board-specific serial config */ |
||||
#define CONFIG_SERIAL_MULTI |
||||
#define CONFIG_TEGRA_ENABLE_UARTA |
||||
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE |
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_F |
||||
|
||||
/* I2C */ |
||||
#define CONFIG_SYS_I2C_TEGRA |
||||
#define CONFIG_CMD_I2C |
||||
|
||||
/* SD/MMC */ |
||||
#define CONFIG_MMC |
||||
#define CONFIG_GENERIC_MMC |
||||
#define CONFIG_TEGRA_MMC |
||||
#define CONFIG_CMD_MMC |
||||
|
||||
/* Environment in eMMC, at the end of 2nd "boot sector" */ |
||||
#define CONFIG_ENV_IS_IN_MMC |
||||
#define CONFIG_SYS_MMC_ENV_DEV 0 |
||||
#define CONFIG_SYS_MMC_ENV_PART 2 |
||||
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) |
||||
|
||||
/* SPI */ |
||||
#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ |
||||
#define CONFIG_TEGRA114_SPI_CTRLS 6 |
||||
#define CONFIG_SPI_FLASH |
||||
#define CONFIG_SPI_FLASH_WINBOND |
||||
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 |
||||
#define CONFIG_SF_DEFAULT_SPEED 24000000 |
||||
#define CONFIG_CMD_SPI |
||||
#define CONFIG_CMD_SF |
||||
#define CONFIG_SPI_FLASH_SIZE (4 << 20) |
||||
|
||||
/* USB Host support */ |
||||
#define CONFIG_USB_EHCI |
||||
#define CONFIG_USB_EHCI_TEGRA |
||||
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
||||
#define CONFIG_USB_STORAGE |
||||
#define CONFIG_CMD_USB |
||||
|
||||
/* USB networking support */ |
||||
#define CONFIG_USB_HOST_ETHER |
||||
#define CONFIG_USB_ETHER_ASIX |
||||
|
||||
/* General networking support */ |
||||
#define CONFIG_CMD_NET |
||||
#define CONFIG_CMD_DHCP |
||||
|
||||
#define CONFIG_FIT |
||||
#define CONFIG_OF_LIBFDT |
||||
|
||||
#include "tegra-common-usb-gadget.h" |
||||
#include "tegra-common-post.h" |
||||
|
||||
#endif /* __CONFIG_H */ |
@ -0,0 +1,45 @@ |
||||
/*
|
||||
* This header provides constants for Tegra pinctrl bindings. |
||||
* |
||||
* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. |
||||
* |
||||
* Author: Laxman Dewangan <ldewangan@nvidia.com> |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify it |
||||
* under the terms and conditions of the GNU General Public License, |
||||
* version 2, as published by the Free Software Foundation. |
||||
* |
||||
* This program is distributed in the hope it will be useful, but WITHOUT |
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
||||
* more details. |
||||
*/ |
||||
|
||||
#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H |
||||
#define _DT_BINDINGS_PINCTRL_TEGRA_H |
||||
|
||||
/*
|
||||
* Enable/disable for diffeent dt properties. This is applicable for |
||||
* properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain, |
||||
* nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt. |
||||
*/ |
||||
#define TEGRA_PIN_DISABLE 0 |
||||
#define TEGRA_PIN_ENABLE 1 |
||||
|
||||
#define TEGRA_PIN_PULL_NONE 0 |
||||
#define TEGRA_PIN_PULL_DOWN 1 |
||||
#define TEGRA_PIN_PULL_UP 2 |
||||
|
||||
/* Low power mode driver */ |
||||
#define TEGRA_PIN_LP_DRIVE_DIV_8 0 |
||||
#define TEGRA_PIN_LP_DRIVE_DIV_4 1 |
||||
#define TEGRA_PIN_LP_DRIVE_DIV_2 2 |
||||
#define TEGRA_PIN_LP_DRIVE_DIV_1 3 |
||||
|
||||
/* Rising/Falling slew rate */ |
||||
#define TEGRA_PIN_SLEW_RATE_FASTEST 0 |
||||
#define TEGRA_PIN_SLEW_RATE_FAST 1 |
||||
#define TEGRA_PIN_SLEW_RATE_SLOW 2 |
||||
#define TEGRA_PIN_SLEW_RATE_SLOWEST 3 |
||||
|
||||
#endif |
@ -0,0 +1,19 @@ |
||||
/*
|
||||
* Copyright (c) 2014 Google, Inc |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __I2C_EEPROM |
||||
#define __I2C_EEPROM |
||||
|
||||
struct i2c_eeprom_ops { |
||||
int (*read)(struct udevice *dev, int offset, uint8_t *buf, int size); |
||||
int (*write)(struct udevice *dev, int offset, const uint8_t *buf, |
||||
int size); |
||||
}; |
||||
|
||||
struct i2c_eeprom { |
||||
}; |
||||
|
||||
#endif |
@ -0,0 +1,147 @@ |
||||
/*
|
||||
* Copyright (C) 2014 Samsung Electronics |
||||
* Przemyslaw Marczak <p.marczak@samsung.com> |
||||
* |
||||
* SDPX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
#include <common.h> |
||||
#include <errno.h> |
||||
|
||||
#define ERRNO_MSG(errno, msg) msg |
||||
#define SAME_AS(x) (const char *)&errno_message[x] |
||||
|
||||
static const char * const errno_message[] = { |
||||
ERRNO_MSG(0, "Success"), |
||||
ERRNO_MSG(EPERM, "Operation not permitted"), |
||||
ERRNO_MSG(ENOEN, "No such file or directory"), |
||||
ERRNO_MSG(ESRCH, "No such process"), |
||||
ERRNO_MSG(EINTR, "Interrupted system call"), |
||||
ERRNO_MSG(EIO, "I/O error"), |
||||
ERRNO_MSG(ENXIO, "No such device or address"), |
||||
ERRNO_MSG(E2BIG, "Argument list too long"), |
||||
ERRNO_MSG(ENOEXEC, "Exec format error"), |
||||
ERRNO_MSG(EBADF, "Bad file number"), |
||||
ERRNO_MSG(ECHILD, "No child processes"), |
||||
ERRNO_MSG(EAGAIN, "Try again"), |
||||
ERRNO_MSG(ENOMEM, "Out of memory"), |
||||
ERRNO_MSG(EACCES, "Permission denied"), |
||||
ERRNO_MSG(EFAULT, "Bad address"), |
||||
ERRNO_MSG(ENOTBL, "Block device required"), |
||||
ERRNO_MSG(EBUSY, "Device or resource busy"), |
||||
ERRNO_MSG(EEXIST, "File exists"), |
||||
ERRNO_MSG(EXDEV, "Cross-device link"), |
||||
ERRNO_MSG(ENODEV, "No such device"), |
||||
ERRNO_MSG(ENOTDIR, "Not a directory"), |
||||
ERRNO_MSG(EISDIR, "Is a directory"), |
||||
ERRNO_MSG(EINVAL, "Invalid argument"), |
||||
ERRNO_MSG(ENFILE, "File table overflow"), |
||||
ERRNO_MSG(EMFILE, "Too many open files"), |
||||
ERRNO_MSG(ENOTTY, "Not a typewriter"), |
||||
ERRNO_MSG(ETXTBSY, "Text file busy"), |
||||
ERRNO_MSG(EFBIG, "File too large"), |
||||
ERRNO_MSG(ENOSPC, "No space left on device"), |
||||
ERRNO_MSG(ESPIPE, "Illegal seek"), |
||||
ERRNO_MSG(EROFS, "Read-only file system"), |
||||
ERRNO_MSG(EMLINK, "Too many links"), |
||||
ERRNO_MSG(EPIPE, "Broken pipe"), |
||||
ERRNO_MSG(EDOM, "Math argument out of domain of func"), |
||||
ERRNO_MSG(ERANGE, "Math result not representable"), |
||||
ERRNO_MSG(EDEADLK, "Resource deadlock would occur"), |
||||
ERRNO_MSG(ENAMETOOLONG, "File name too long"), |
||||
ERRNO_MSG(ENOLCK, "No record locks available"), |
||||
ERRNO_MSG(ENOSYS, "Function not implemented"), |
||||
ERRNO_MSG(ENOTEMPTY, "Directory not empty"), |
||||
ERRNO_MSG(ELOOP, "Too many symbolic links encountered"), |
||||
ERRNO_MSG(EWOULDBLOCK, SAME_AS(EAGAIN)), |
||||
ERRNO_MSG(ENOMSG, "No message of desired type"), |
||||
ERRNO_MSG(EIDRM, "Identifier removed"), |
||||
ERRNO_MSG(ECHRNG, "Channel number out of range"), |
||||
ERRNO_MSG(EL2NSYNC, "Level 2 not synchronized"), |
||||
ERRNO_MSG(EL3HLT, "Level 3 halted"), |
||||
ERRNO_MSG(EL3RST, "Level 3 reset"), |
||||
ERRNO_MSG(ELNRNG, "Link number out of range"), |
||||
ERRNO_MSG(EUNATCH, "Protocol driver not attached"), |
||||
ERRNO_MSG(ENOCSI, "No CSI structure available"), |
||||
ERRNO_MSG(EL2HLT, "Level 2 halted"), |
||||
ERRNO_MSG(EBADE, "Invalid exchange"), |
||||
ERRNO_MSG(EBADR, "Invalid request descriptor"), |
||||
ERRNO_MSG(EXFULL, "Exchange full"), |
||||
ERRNO_MSG(ENOANO, "No anode"), |
||||
ERRNO_MSG(EBADRQC, "Invalid request code"), |
||||
ERRNO_MSG(EBADSLT, "Invalid slot"), |
||||
ERRNO_MSG(EDEADLOCK, SAME_AS(EDEADLK)), |
||||
ERRNO_MSG(EBFONT, "Bad font file format"), |
||||
ERRNO_MSG(ENOSTR, "Device not a stream"), |
||||
ERRNO_MSG(ENODATA, "No data available"), |
||||
ERRNO_MSG(ETIME, "Timer expired"), |
||||
ERRNO_MSG(ENOSR, "Out of streams resources"), |
||||
ERRNO_MSG(ENONET, "Machine is not on the network"), |
||||
ERRNO_MSG(ENOPKG, "Package not installed"), |
||||
ERRNO_MSG(EREMOTE, "Object is remote"), |
||||
ERRNO_MSG(ENOLINK, "Link has been severed"), |
||||
ERRNO_MSG(EADV, "Advertise error"), |
||||
ERRNO_MSG(ESRMNT, "Srmount error"), |
||||
ERRNO_MSG(ECOMM, "Communication error on send"), |
||||
ERRNO_MSG(EPROTO, "Protocol error"), |
||||
ERRNO_MSG(EMULTIHOP, "Multihop attempted"), |
||||
ERRNO_MSG(EDOTDOT, "RFS specific error"), |
||||
ERRNO_MSG(EBADMSG, "Not a data message"), |
||||
ERRNO_MSG(EOVERFLOW, "Value too large for defined data type"), |
||||
ERRNO_MSG(ENOTUNIQ, "Name not unique on network"), |
||||
ERRNO_MSG(EBADFD, "File descriptor in bad state"), |
||||
ERRNO_MSG(EREMCHG, "Remote address changed"), |
||||
ERRNO_MSG(ELIBACC, "Can not access a needed shared library"), |
||||
ERRNO_MSG(ELIBBAD, "Accessing a corrupted shared library"), |
||||
ERRNO_MSG(ELIBSCN, ".lib section in a.out corrupted"), |
||||
ERRNO_MSG(ELIBMAX, "Attempting to link in too many shared libraries"), |
||||
ERRNO_MSG(ELIBEXEC, "Cannot exec a shared library directly"), |
||||
ERRNO_MSG(EILSEQ, "Illegal byte sequence"), |
||||
ERRNO_MSG(ERESTART, "Interrupted system call should be restarted"), |
||||
ERRNO_MSG(ESTRPIPE, "Streams pipe error"), |
||||
ERRNO_MSG(EUSERS, "Too many users"), |
||||
ERRNO_MSG(ENOTSOCK, "Socket operation on non-socket"), |
||||
ERRNO_MSG(EDESTADDRREQ, "Destination address required"), |
||||
ERRNO_MSG(EMSGSIZE, "Message too long"), |
||||
ERRNO_MSG(EPROTOTYPE, "Protocol wrong type for socket"), |
||||
ERRNO_MSG(ENOPROTOOPT, "Protocol not available"), |
||||
ERRNO_MSG(EPROTONOSUPPORT, "Protocol not supported"), |
||||
ERRNO_MSG(ESOCKTNOSUPPORT, "Socket type not supported"), |
||||
ERRNO_MSG(EOPNOTSUPP, "Operation not supported on transport endpoint"), |
||||
ERRNO_MSG(EPFNOSUPPORT, "Protocol family not supported"), |
||||
ERRNO_MSG(AFNOSUPPORT, "Address family not supported by protocol"), |
||||
ERRNO_MSG(EADDRINUSE, "Address already in use"), |
||||
ERRNO_MSG(EADDRNOTAVAIL, "Cannot assign requested address"), |
||||
ERRNO_MSG(ENETDOWN, "Network is down"), |
||||
ERRNO_MSG(ENETUNREACH, "Network is unreachable"), |
||||
ERRNO_MSG(ENETRESET, "Network dropped connection because of reset"), |
||||
ERRNO_MSG(ECONNABORTED, "Software caused connection abort"), |
||||
ERRNO_MSG(ECONNRESET, "Connection reset by peer"), |
||||
ERRNO_MSG(ENOBUFS, "No buffer space available"), |
||||
ERRNO_MSG(EISCONN, "Transport endpoint is already connected"), |
||||
ERRNO_MSG(ENOTCONN, "Transport endpoint is not connected"), |
||||
ERRNO_MSG(ESHUTDOWN, "Cannot send after transport endpoint shutdown"), |
||||
ERRNO_MSG(ETOOMANYREFS, "Too many references: cannot splice"), |
||||
ERRNO_MSG(ETIMEDOUT, "Connection timed out"), |
||||
ERRNO_MSG(ECONNREFUSED, "Connection refused"), |
||||
ERRNO_MSG(EHOSTDOWN, "Host is down"), |
||||
ERRNO_MSG(EHOSTUNREACH, "No route to host"), |
||||
ERRNO_MSG(EALREADY, "Operation already in progress"), |
||||
ERRNO_MSG(EINPROGRESS, "Operation now in progress"), |
||||
ERRNO_MSG(ESTALE, "Stale NFS file handle"), |
||||
ERRNO_MSG(EUCLEAN, "Structure needs cleaning"), |
||||
ERRNO_MSG(ENOTNAM, "Not a XENIX named type file"), |
||||
ERRNO_MSG(ENAVAIL, "No XENIX semaphores available"), |
||||
ERRNO_MSG(EISNAM, "Is a named type file"), |
||||
ERRNO_MSG(EREMOTEIO, "Remote I/O error"), |
||||
ERRNO_MSG(EDQUOT, "Quota exceeded"), |
||||
ERRNO_MSG(ENOMEDIUM, "No medium found"), |
||||
ERRNO_MSG(EMEDIUMTYPE, "Wrong medium type"), |
||||
}; |
||||
|
||||
const char *errno_str(int errno) |
||||
{ |
||||
if (errno >= 0) |
||||
return errno_message[0]; |
||||
|
||||
return errno_message[abs(errno)]; |
||||
} |
@ -0,0 +1,216 @@ |
||||
/*
|
||||
* Copyright (C) 2013 Google, Inc |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
* |
||||
* Note: Test coverage does not include 10-bit addressing |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <dm.h> |
||||
#include <fdtdec.h> |
||||
#include <i2c.h> |
||||
#include <dm/device-internal.h> |
||||
#include <dm/test.h> |
||||
#include <dm/uclass-internal.h> |
||||
#include <dm/ut.h> |
||||
#include <dm/util.h> |
||||
#include <asm/state.h> |
||||
#include <asm/test.h> |
||||
|
||||
static const int busnum; |
||||
static const int chip = 0x2c; |
||||
|
||||
/* Test that we can find buses and chips */ |
||||
static int dm_test_i2c_find(struct dm_test_state *dms) |
||||
{ |
||||
struct udevice *bus, *dev; |
||||
const int no_chip = 0x10; |
||||
|
||||
ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum, |
||||
false, &bus)); |
||||
|
||||
/*
|
||||
* i2c_post_bind() will bind devices to chip selects. Check this then |
||||
* remove the emulation and the slave device. |
||||
*/ |
||||
ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus)); |
||||
ut_assertok(i2c_probe(bus, chip, 0, &dev)); |
||||
ut_asserteq(-ENODEV, i2c_probe(bus, no_chip, 0, &dev)); |
||||
ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus)); |
||||
|
||||
return 0; |
||||
} |
||||
DM_TEST(dm_test_i2c_find, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |
||||
|
||||
static int dm_test_i2c_read_write(struct dm_test_state *dms) |
||||
{ |
||||
struct udevice *bus, *dev; |
||||
uint8_t buf[5]; |
||||
|
||||
ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus)); |
||||
ut_assertok(i2c_get_chip(bus, chip, &dev)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf))); |
||||
ut_assertok(i2c_write(dev, 2, (uint8_t *)"AB", 2)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "\0\0AB\0", sizeof(buf))); |
||||
|
||||
return 0; |
||||
} |
||||
DM_TEST(dm_test_i2c_read_write, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |
||||
|
||||
static int dm_test_i2c_speed(struct dm_test_state *dms) |
||||
{ |
||||
struct udevice *bus, *dev; |
||||
uint8_t buf[5]; |
||||
|
||||
ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus)); |
||||
ut_assertok(i2c_get_chip(bus, chip, &dev)); |
||||
ut_assertok(i2c_set_bus_speed(bus, 100000)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(i2c_set_bus_speed(bus, 400000)); |
||||
ut_asserteq(400000, i2c_get_bus_speed(bus)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_asserteq(-EINVAL, i2c_write(dev, 0, buf, 5)); |
||||
|
||||
return 0; |
||||
} |
||||
DM_TEST(dm_test_i2c_speed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |
||||
|
||||
static int dm_test_i2c_offset_len(struct dm_test_state *dms) |
||||
{ |
||||
struct udevice *bus, *dev; |
||||
uint8_t buf[5]; |
||||
|
||||
ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus)); |
||||
ut_assertok(i2c_get_chip(bus, chip, &dev)); |
||||
ut_assertok(i2c_set_chip_offset_len(dev, 1)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
|
||||
/* This is not supported by the uclass */ |
||||
ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5)); |
||||
|
||||
return 0; |
||||
} |
||||
DM_TEST(dm_test_i2c_offset_len, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |
||||
|
||||
static int dm_test_i2c_probe_empty(struct dm_test_state *dms) |
||||
{ |
||||
struct udevice *bus, *dev; |
||||
|
||||
ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus)); |
||||
ut_assertok(i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev)); |
||||
|
||||
return 0; |
||||
} |
||||
DM_TEST(dm_test_i2c_probe_empty, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |
||||
|
||||
static int dm_test_i2c_bytewise(struct dm_test_state *dms) |
||||
{ |
||||
struct udevice *bus, *dev; |
||||
struct udevice *eeprom; |
||||
uint8_t buf[5]; |
||||
|
||||
ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus)); |
||||
ut_assertok(i2c_get_chip(bus, chip, &dev)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf))); |
||||
|
||||
/* Tell the EEPROM to only read/write one register at a time */ |
||||
ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom)); |
||||
ut_assertnonnull(eeprom); |
||||
sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE); |
||||
|
||||
/* Now we only get the first byte - the rest will be 0xff */ |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf))); |
||||
|
||||
/* If we do a separate transaction for each byte, it works */ |
||||
ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf))); |
||||
|
||||
/* This will only write A */ |
||||
ut_assertok(i2c_set_chip_flags(dev, 0)); |
||||
ut_assertok(i2c_write(dev, 2, (uint8_t *)"AB", 2)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf))); |
||||
|
||||
/* Check that the B was ignored */ |
||||
ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "\0\0A\0\0\0", sizeof(buf))); |
||||
|
||||
/* Now write it again with the new flags, it should work */ |
||||
ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS)); |
||||
ut_assertok(i2c_write(dev, 2, (uint8_t *)"AB", 2)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf))); |
||||
|
||||
ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS | |
||||
DM_I2C_CHIP_RD_ADDRESS)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "\0\0AB\0\0", sizeof(buf))); |
||||
|
||||
/* Restore defaults */ |
||||
sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE); |
||||
ut_assertok(i2c_set_chip_flags(dev, 0)); |
||||
|
||||
return 0; |
||||
} |
||||
DM_TEST(dm_test_i2c_bytewise, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |
||||
|
||||
static int dm_test_i2c_offset(struct dm_test_state *dms) |
||||
{ |
||||
struct udevice *eeprom; |
||||
struct udevice *dev; |
||||
uint8_t buf[5]; |
||||
|
||||
ut_assertok(i2c_get_chip_for_busnum(busnum, chip, &dev)); |
||||
|
||||
/* Do a transfer so we can find the emulator */ |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom)); |
||||
|
||||
/* Offset length 0 */ |
||||
sandbox_i2c_eeprom_set_offset_len(eeprom, 0); |
||||
ut_assertok(i2c_set_chip_offset_len(dev, 0)); |
||||
ut_assertok(i2c_write(dev, 10 /* ignored */, (uint8_t *)"AB", 2)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "AB\0\0\0\0", sizeof(buf))); |
||||
|
||||
/* Offset length 1 */ |
||||
sandbox_i2c_eeprom_set_offset_len(eeprom, 1); |
||||
ut_assertok(i2c_set_chip_offset_len(dev, 1)); |
||||
ut_assertok(i2c_write(dev, 2, (uint8_t *)"AB", 2)); |
||||
ut_assertok(i2c_read(dev, 0, buf, 5)); |
||||
ut_assertok(memcmp(buf, "ABAB\0", sizeof(buf))); |
||||
|
||||
/* Offset length 2 */ |
||||
sandbox_i2c_eeprom_set_offset_len(eeprom, 2); |
||||
ut_assertok(i2c_set_chip_offset_len(dev, 2)); |
||||
ut_assertok(i2c_write(dev, 0x210, (uint8_t *)"AB", 2)); |
||||
ut_assertok(i2c_read(dev, 0x210, buf, 5)); |
||||
ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf))); |
||||
|
||||
/* Offset length 3 */ |
||||
sandbox_i2c_eeprom_set_offset_len(eeprom, 2); |
||||
ut_assertok(i2c_set_chip_offset_len(dev, 2)); |
||||
ut_assertok(i2c_write(dev, 0x410, (uint8_t *)"AB", 2)); |
||||
ut_assertok(i2c_read(dev, 0x410, buf, 5)); |
||||
ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf))); |
||||
|
||||
/* Offset length 4 */ |
||||
sandbox_i2c_eeprom_set_offset_len(eeprom, 2); |
||||
ut_assertok(i2c_set_chip_offset_len(dev, 2)); |
||||
ut_assertok(i2c_write(dev, 0x420, (uint8_t *)"AB", 2)); |
||||
ut_assertok(i2c_read(dev, 0x420, buf, 5)); |
||||
ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf))); |
||||
|
||||
/* Restore defaults */ |
||||
sandbox_i2c_eeprom_set_offset_len(eeprom, 1); |
||||
|
||||
return 0; |
||||
} |
||||
DM_TEST(dm_test_i2c_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |
Loading…
Reference in new issue