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Forward port OLIMEX LIME2 Gbit ethernet patch

Required for ethernet to work on some LIME2 revisions.
Merlijn Wajer 4 years ago
parent
commit
a7944dcc11

+ 0 - 2
board/sunxi/gmac.c

@@ -24,8 +24,6 @@ void eth_init_board(void)
24 24
 #ifdef CONFIG_RGMII
25 25
 	setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
26 26
 		CCM_GMAC_CTRL_GPIT_RGMII);
27
-	setbits_le32(&ccm->gmac_clk_cfg,
28
-		     CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY));
29 27
 #else
30 28
 	setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_MII |
31 29
 		CCM_GMAC_CTRL_GPIT_MII);

+ 10 - 1
drivers/net/phy/micrel_ksz90x1.c

@@ -13,6 +13,8 @@
13 13
 #include <errno.h>
14 14
 #include <micrel.h>
15 15
 #include <phy.h>
16
+#include <asm/io.h>
17
+#include <asm/arch/clock.h>
16 18
 
17 19
 /*
18 20
  * KSZ9021 - KSZ9031 common
@@ -98,7 +100,7 @@ static const struct ksz90x1_reg_field ksz9031_ctl_grp[] = {
98 100
 };
99 101
 
100 102
 static const struct ksz90x1_reg_field ksz9031_clk_grp[] = {
101
-	{ "rxc-skew-ps", 5, 0, 0xf }, { "txc-skew-ps", 5, 5, 0xf }
103
+ 	{ "rxc-skew-ps", 5, 0, 0x7 }, { "txc-skew-ps", 5, 5, 0x17 }
102 104
 };
103 105
 
104 106
 static int ksz90x1_of_config_group(struct phy_device *phydev,
@@ -329,6 +331,13 @@ static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr,
329 331
 static int ksz9031_config(struct phy_device *phydev)
330 332
 {
331 333
 	int ret;
334
+	struct sunxi_ccm_reg *const ccm =
335
+		(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
336
+
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+#ifdef CONFIG_RGMII
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+		setbits_le32(&ccm->gmac_clk_cfg,
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+			CCM_GMAC_CTRL_TX_CLK_DELAY(4));
340
+#endif
332 341
 
333 342
 	ret = ksz9031_of_config(phydev);
334 343
 	if (ret)

+ 27 - 0
drivers/net/phy/realtek.c

@@ -9,6 +9,8 @@
9 9
 #include <common.h>
10 10
 #include <linux/bitops.h>
11 11
 #include <phy.h>
12
+#include <asm/io.h>
13
+#include <asm/arch/clock.h>
12 14
 
13 15
 #define PHY_RTL8211x_FORCE_MASTER BIT(1)
14 16
 #define PHY_RTL8211E_PINE64_GIGABIT_FIX BIT(2)
@@ -78,6 +80,9 @@ static int rtl8211e_probe(struct phy_device *phydev)
78 80
 /* RealTek RTL8211x */
79 81
 static int rtl8211x_config(struct phy_device *phydev)
80 82
 {
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+	struct sunxi_ccm_reg *const ccm =
84
+		(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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+
81 86
 	phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
82 87
 
83 88
 	/* mask interrupt at init; if the interrupt is
@@ -86,6 +91,27 @@ static int rtl8211x_config(struct phy_device *phydev)
86 91
 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER,
87 92
 		  MIIM_RTL8211x_PHY_INTR_DIS);
88 93
 
94
+	/* Check if device is RTL8211CL or RTL8211E */
95
+	if(phydev->drv->uid == 0x1cc912) {
96
+		/* On RTL8211E TX delay must be 0 and
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+		 * phy must be forced to be master
98
+		 */
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+		 setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_DELAY(0));
100
+
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+		 unsigned int reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
102
+		 /* force manual master/slave configuration */
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+		 reg |= MIIM_RTL8211x_CTRL1000T_MSCE;
104
+		 /* force master mode */
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+		 reg |= MIIM_RTL8211x_CTRL1000T_MASTER;
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+		 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, reg);
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+
108
+	} else {
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+		if(phydev->drv->uid == 0x1cc915) {
110
+			/* On RTL8211E make GMAC_TX_CLK_DELAY 2 */
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+			setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_DELAY(2));
112
+		}
113
+	}
114
+
89 115
 	if (phydev->flags & PHY_RTL8211x_FORCE_MASTER) {
90 116
 		unsigned int reg;
91 117
 
@@ -112,6 +138,7 @@ static int rtl8211x_config(struct phy_device *phydev)
112 138
 		phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211F_PAGE_SELECT,
113 139
 			  0);
114 140
 	}
141
+
115 142
 	/* read interrupt status just to clear it */
116 143
 	phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER);
117 144
 

+ 33 - 2
drivers/net/phy/smsc.c

@@ -11,6 +11,8 @@
11 11
  */
12 12
 #include <common.h>
13 13
 #include <miiphy.h>
14
+#include <asm/gpio.h>
15
+#include <asm/arch/gpio.h>
14 16
 
15 17
 /* This code does not check the partner abilities. */
16 18
 static int smsc_parse_status(struct phy_device *phydev)
@@ -43,6 +45,30 @@ static int smsc_startup(struct phy_device *phydev)
43 45
 	return smsc_parse_status(phydev);
44 46
 }
45 47
 
48
+#if 1
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+static int olinuxino_smsc_startup(struct phy_device *phydev)
50
+{
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+    int ret;
52
+
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+    ret = gpio_request(SUNXI_GPA(17), "lan8710-txerr");
54
+    if(ret)
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+        return ret;
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+    gpio_direction_output(SUNXI_GPA(17), 0);
57
+
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+    ret = genphy_update_link(phydev);
59
+    if (ret)
60
+        return ret;
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+
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+    return genphy_parse_link(phydev);
63
+}
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+
65
+static int olinuxino_smsc_shutdown(struct phy_device *phydev)
66
+{
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+    sunxi_gpio_set_cfgpin(SUNXI_GPA(17), SUNXI_GPIO_INPUT);
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+	return 0;
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+}
70
+#endif
71
+
46 72
 static struct phy_driver lan8700_driver = {
47 73
 	.name = "SMSC LAN8700",
48 74
 	.uid = 0x0007c0c0,
@@ -69,8 +95,13 @@ static struct phy_driver lan8710_driver = {
69 95
 	.mask = 0xffff0,
70 96
 	.features = PHY_BASIC_FEATURES,
71 97
 	.config = &genphy_config_aneg,
72
-	.startup = &genphy_startup,
73
-	.shutdown = &genphy_shutdown,
98
+#if 1
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+	.startup = &olinuxino_smsc_startup,
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+	.shutdown = &olinuxino_smsc_shutdown,
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+#else
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+    .startup = &genphy_startup,
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+    .shutdown = &genphy_shutdown,
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+#endif
74 105
 };
75 106
 
76 107
 static struct phy_driver lan8740_driver = {

+ 3 - 0
include/configs/sunxi-common.h

@@ -291,6 +291,9 @@ extern int soft_i2c_gpio_scl;
291 291
 
292 292
 #ifdef CONFIG_SUN7I_GMAC
293 293
 #define CONFIG_PHY_REALTEK
294
+#define CONFIG_PHY_MICREL
295
+#define CONFIG_PHY_MICREL_KSZ9031
296
+#define CONFIG_PHY_SMSC
294 297
 #endif
295 298
 
296 299
 #ifdef CONFIG_USB_EHCI_HCD