Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com> Signed-off by: John Rigby <jrigby@freescale.com>master
TsiChungLiew
17 years ago
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1ac559d4aa
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Freescale MCF5373EVB ColdFire Development Board |
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================================================ |
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|
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TsiChung Liew(Tsi-Chung.Liew@freescale.com) |
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Created 11/08/07 |
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=========================================== |
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Changed files: |
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============== |
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- board/freescale/m5373evb/m5373evb.c Dram setup |
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- board/freescale/m5373evb/mii.c Mii access |
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- board/freescale/m5373evb/Makefile Makefile |
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- board/freescale/m5373evb/config.mk config make |
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- board/freescale/m5373evb/u-boot.lds Linker description |
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|
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- cpu/mcf532x/cpu.c cpu specific code |
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- cpu/mcf532x/cpu_init.c FBCS, Mux pins, icache and RTC extra regs |
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- cpu/mcf532x/interrupts.c cpu specific interrupt support |
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- cpu/mcf532x/speed.c system, pci, flexbus, and cpu clock |
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- cpu/mcf532x/Makefile Makefile |
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- cpu/mcf532x/config.mk config make |
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- cpu/mcf532x/start.S start up assembly code |
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|
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- doc/README.m5373evb This readme file |
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|
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- drivers/net/mcffec.c ColdFire common FEC driver |
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- drivers/serial/mcfuart.c ColdFire common UART driver |
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- drivers/rtc/mcfrtc.c Realtime clock Driver |
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|
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- include/asm-m68k/bitops.h Bit operation function export |
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- include/asm-m68k/byteorder.h Byte order functions |
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- include/asm-m68k/fec.h FEC structure and definition |
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- include/asm-m68k/fsl_i2c.h I2C structure and definition |
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- include/asm-m68k/global_data.h Global data structure |
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- include/asm-m68k/immap.h ColdFire specific header file and driver macros |
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- include/asm-m68k/immap_532x.h mcf532x specific header file |
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- include/asm-m68k/io.h io functions |
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- include/asm-m68k/m532x.h mcf532x specific header file |
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- include/asm-m68k/posix_types.h Posix |
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- include/asm-m68k/processor.h header file |
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- include/asm-m68k/ptrace.h Exception structure |
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- include/asm-m68k/rtc.h Realtime clock header file |
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- include/asm-m68k/string.h String function export |
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- include/asm-m68k/timer.h Timer structure and definition |
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- include/asm-m68k/types.h Data types definition |
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- include/asm-m68k/uart.h Uart structure and definition |
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- include/asm-m68k/u-boot.h u-boot structure |
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- include/configs/M5373EVB.h Board specific configuration file |
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- lib_m68k/board.c board init function |
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- lib_m68k/cache.c |
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- lib_m68k/interrupts Coldfire common interrupt functions |
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- lib_m68k/m68k_linux.c |
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- lib_m68k/time.c Timer functions (Dma timer and PIT) |
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- lib_m68k/traps.c Exception init code |
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|
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1 MCF5373 specific Options/Settings |
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==================================== |
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1.1 pre-loader is no longer suppoer in thie coldfire family |
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1.2 Configuration settings for M5373EVB Development Board |
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CONFIG_MCF532x -- define for all MCF532x CPUs |
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CONFIG_M5373 -- define for all Freescale MCF5373 CPUs |
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CONFIG_M5373EVB -- define for M5373EVB board |
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|
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CONFIG_MCFUART -- define to use common CF Uart driver |
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CFG_UART_PORT -- define UART port number, start with 0, 1 and 2 |
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CONFIG_BAUDRATE -- define UART baudrate |
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|
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CONFIG_MCFRTC -- define to use common CF RTC driver |
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CFG_MCFRTC_BASE -- provide base address for RTC in immap.h |
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CFG_RTC_OSCILLATOR -- define RTC clock frequency |
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RTC_DEBUG -- define to show RTC debug message |
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CONFIG_CMD_DATE -- enable to use date feature in u-boot |
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|
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CONFIG_MCFFEC -- define to use common CF FEC driver |
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CONFIG_NET_MULTI -- define to use multi FEC in u-boot |
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CONFIG_MII -- enable to use MII driver |
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CONFIG_CF_DOMII -- enable to use MII feature in cmd_mii.c |
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CFG_DISCOVER_PHY -- enable PHY discovery |
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CFG_RX_ETH_BUFFER -- Set FEC Receive buffer |
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CFG_FAULT_ECHO_LINK_DOWN-- |
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CFG_FEC0_PINMUX -- Set FEC0 Pin configuration |
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CFG_FEC0_MIIBASE -- Set FEC0 MII base register |
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MCFFEC_TOUT_LOOP -- set FEC timeout loop |
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|
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CONFIG_MCFTMR -- define to use DMA timer |
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CONFIG_MCFPIT -- define to use PIT timer |
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CONFIG_FSL_I2C -- define to use FSL common I2C driver |
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CONFIG_HARD_I2C -- define for I2C hardware support |
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CONFIG_SOFT_I2C -- define for I2C bit-banged |
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CFG_I2C_SPEED -- define for I2C speed |
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CFG_I2C_SLAVE -- define for I2C slave address |
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CFG_I2C_OFFSET -- define for I2C base address offset |
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CFG_IMMR -- define for MBAR offset |
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CFG_MBAR -- define MBAR offset |
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CONFIG_MONITOR_IS_IN_RAM -- Not support |
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CFG_INIT_RAM_ADDR -- defines the base address of the MCF5373 internal SRAM |
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CFG_CSn_BASE -- defines the Chip Select Base register |
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CFG_CSn_MASK -- defines the Chip Select Mask register |
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CFG_CSn_CTRL -- defines the Chip Select Control register |
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CFG_SDRAM_BASE -- defines the DRAM Base |
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2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL |
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=========================================== |
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2.1. System memory map: |
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Flash: 0x00000000-0x3FFFFFFF (1024MB) |
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DDR: 0x40000000-0x7FFFFFFF (1024MB) |
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SRAM: 0x80000000-0x8FFFFFFF (256MB) |
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IP: 0xF0000000-0xFFFFFFFF (256MB) |
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2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and |
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linux kernel, you can customize it based on your system requirements: |
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Flash0: 0x00000000-0x00FFFFFF (16MB) |
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|
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DDR: 0x40000000-0x4FFFFFFF (256MB) |
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SRAM: 0x80000000-0x80007FFF (32KB) |
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IP: 0xFC000000-0xFC0FFFFF (64KB) |
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3. COMPILATION |
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============== |
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3.1 To create U-Boot the gcc-4.1-xx compiler set (ColdFire ELF or |
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uClinux version) from codesourcery.com was used. Download it from: |
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http://www.codesourcery.com/gnu_toolchains/coldfire/download.html |
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3.2 Compilation |
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export CROSS_COMPILE=cross-compile-prefix |
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cd u-boot-1.x.x |
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make distclean |
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make M5373EVB_config |
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make |
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4. SCREEN DUMP |
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============== |
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4.1 M5373EVB Development board |
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(NOTE: May not show exactly the same) |
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U-Boot 1.3.0 (Nov 8 2007 - 12:44:08) |
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CPU: Freescale MCF5373 (Mask:65 Version:1) |
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CPU CLK 240 Mhz BUS CLK 80 Mhz |
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Board: Freescale FireEngine 5373 EVB |
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I2C: ready |
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DRAM: 32 MB |
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FLASH: 2 MB |
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In: serial |
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Out: serial |
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Err: serial |
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NAND: 16 MiB |
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Net: FEC0 |
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-> print |
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bootdelay=1 |
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baudrate=115200 |
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ethaddr=00:e0:0c:bc:e5:60 |
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hostname=M5373EVB |
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netdev=eth0 |
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loadaddr=40010000 |
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load=tftp ${loadaddr) ${u-boot} |
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upd=run load; run prog |
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prog=prot off 0 2ffff;era 0 2ffff;cp.b ${loadaddr} 0 ${filesize};save |
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ethact=FEC0 |
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u-boot=u-boot.bin |
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gatewayip=192.168.1.1 |
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netmask=255.255.255.0 |
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ipaddr=192.168.1.3 |
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serverip=192.168.1.2 |
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stdin=serial |
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stdout=serial |
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stderr=serial |
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mem=261632k |
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Environment size: 401/8188 bytes |
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-> bdinfo |
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memstart = 0x40000000 |
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memsize = 0x02000000 |
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flashstart = 0x00000000 |
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flashsize = 0x00200000 |
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flashoffset = 0x00000000 |
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sramstart = 0x80000000 |
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sramsize = 0x00008000 |
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mbar = 0xFC000000 |
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busfreq = 80 MHz |
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ethaddr = 00:E0:0C:BC:E5:60 |
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ip_addr = 192.168.1.3 |
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baudrate = 115200 bps |
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-> |
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-> help |
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? - alias for 'help' |
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autoscr - run script from memory |
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base - print or set address offset |
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bdinfo - print Board Info structure |
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boot - boot default, i.e., run 'bootcmd' |
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bootd - boot default, i.e., run 'bootcmd' |
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bootelf - Boot from an ELF image in memory |
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bootm - boot application image from memory |
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bootp - boot image via network using BootP/TFTP protocol |
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bootvx - Boot vxWorks from an ELF image |
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cmp - memory compare |
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coninfo - print console devices and information |
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cp - memory copy |
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crc32 - checksum calculation |
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date - get/set/reset date & time |
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dcache - enable or disable data cache |
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echo - echo args to console |
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erase - erase FLASH memory |
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flinfo - print FLASH memory information |
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go - start application at address 'addr' |
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help - print online help |
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icache - enable or disable instruction cache |
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icrc32 - checksum calculation |
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iloop - infinite loop on address range |
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imd - i2c memory display |
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iminfo - print header information for application image |
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imls - list all images found in flash |
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imm - i2c memory modify (auto-incrementing) |
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imw - memory write (fill) |
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inm - memory modify (constant address) |
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iprobe - probe to discover valid I2C chip addresses |
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itest - return true/false on integer compare |
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loadb - load binary file over serial line (kermit mode) |
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loads - load S-Record file over serial line |
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loady - load binary file over serial line (ymodem mode) |
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loop - infinite loop on address range |
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ls - list files in a directory (default /) |
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md - memory display |
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mii - MII utility commands |
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mm - memory modify (auto-incrementing) |
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mtest - simple RAM test |
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mw - memory write (fill) |
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nand - NAND sub-system |
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nboot - boot from NAND device |
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nfs - boot image via network using NFS protocol |
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nm - memory modify (constant address) |
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ping - send ICMP ECHO_REQUEST to network host |
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printenv- print environment variables |
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protect - enable or disable FLASH write protection |
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rarpboot- boot image via network using RARP/TFTP protocol |
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reset - Perform RESET of the CPU |
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run - run commands in an environment variable |
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saveenv - save environment variables to persistent storage |
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setenv - set environment variables |
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sleep - delay execution for some time |
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tftpboot- boot image via network using TFTP protocol |
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version - print monitor version |
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-> tftp 0x40800000 uImage |
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Using FEC0 device |
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TFTP from server 192.168.1.3; our IP address is 192.168.1.3 Filename 'uImage'. |
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Load address: 0x40800000 |
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Loading: ################################################################# |
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################################################################# |
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########## |
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done |
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Bytes transferred = 2053270 (1f5496 hex) |
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-> bootm 0x40800000 |
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## Booting image at 40800000 ... |
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Image Name: Linux Kernel Image |
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Created: 2007-11-07 20:33:08 UTC |
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Image Type: M68K Linux Kernel Image (gzip compressed) |
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Data Size: 2053206 Bytes = 2 MB |
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Load Address: 40020000 |
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Entry Point: 40020000 |
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Verifying Checksum ... OK |
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Uncompressing Kernel Image ... OK |
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Linux version 2.6.22-uc1 (mattw@loa) (gcc version 4.2.1 (Sourcery G++ Lite 4.2-7 |
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uClinux/COLDFIRE(m537x) |
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COLDFIRE port done by Greg Ungerer, gerg@snapgear.com Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne Built 1 zonelists. Total pages: 8128 Kernel command line: rootfstype=romfs PID hash table entries: 128 (order: 7, 512 bytes) Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) Inode-cache hash table entries: 2048 (order: 1, 8192 bytes) Memory available: 28092k/32768k RAM, (1788k kernel code, 244k data) Mount-cache hash table entries: 512 |
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NET: Registered protocol family 16 |
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USB-MCF537x: (HOST module) EHCI device is registered |
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USB-MCF537x: (OTG module) EHCI device is registered |
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USB-MCF537x: (OTG module) UDC device is registered |
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usbcore: registered new interface driver usbfs |
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usbcore: registered new interface driver hub |
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usbcore: registered new device driver usb |
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NET: Registered protocol family 2 |
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IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 1024 (order: 1, 8192 bytes) TCP bind hash table entries: 1024 (order: 0, 4096 bytes) |
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TCP: Hash tables configured (established 1024 bind 1024) TCP reno registered |
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JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc. |
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io scheduler noop registered |
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io scheduler cfq registered (default) |
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ColdFire internal UART serial driver version 1.00 ttyS0 at 0xfc060000 (irq = 90) is a builtin ColdFire UART |
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ttyS1 at 0xfc064000 (irq = 91) is a builtin ColdFire UART |
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ttyS2 at 0xfc068000 (irq = 92) is a builtin ColdFire UART RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize |
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loop: module loaded |
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nbd: registered device at major 43 |
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usbcore: registered new interface driver ub FEC ENET Version 0.2 |
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fec: PHY @ 0x1, ID 0x20005c90 -- DP83848 |
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eth0: ethernet 00:e0:0c:bc:e5:60 |
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uclinux[mtd]: RAM probe address=0x4021c22c size=0x22b000 Creating 1 MTD partitions on "RAM": |
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0x00000000-0x0022b000 : "ROMfs" |
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uclinux[mtd]: set ROMfs to be root filesystem NAND device: Manufacturer ID: 0x20, Chip ID: 0x73 (ST Micro NAND 16MiB 3,3V 8-b) Scanning device for bad blocks Creating 1 MTD partitions on "NAND 16MiB 3,3V 8-bit": |
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0x00000000-0x01000000 : "M53xx flash partition 1" |
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QSPI: spi->max_speed_hz 300000 |
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QSPI: Baud set to 255 |
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SPI: Coldfire master initialized |
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M537x - Disable UART1 when using Audio |
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udc: Freescale MCF53xx UDC driver version 27 October 2006 init |
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udc: MCF53xx USB Device is found. ID=0x5 Rev=0x41 i2c /dev entries driver |
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usbcore: registered new interface driver usbhid |
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drivers/hid/usbhid/hid-core.c: v2.6:USB HID core driver TCP cubic registered |
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NET: Registered protocol family 1 |
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NET: Registered protocol family 17 |
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VFS: Mounted root (romfs filesystem) readonly. |
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Freeing unused kernel memory: 64k freed (0x401f5000 - 0x40204000) init started: BusyBox v1.00 (2007.11.07-19:57+0000) multi-call binary?Setting e Mounting filesystems |
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mount: Mounting devpts on /dev/pts failed: No such device |
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mount: Mounting usbfs on /proc/bus/usb failed: No such file or directory Starting syslogd and klogd Setting up networking on loopback device: |
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Setting up networking on eth0: |
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info, udhcpc (v0.9.9-pre) started |
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eth0: config: auto-negotiation on, 100FDX, 100HDX, 10FDX, 10HDX. |
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debug, Sending discover... |
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debug, Sending discover... |
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debug, Sending select for 172.27.0.130... |
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info, Lease of 172.27.0.130 obtained, lease time 43200 deleting routers |
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route: SIOC[ADD|DEL]RT: No such process |
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adding dns 172.27.0.1 |
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Starting the boa webserver: |
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Setting time from ntp server: ntp.cs.strath.ac.uk |
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ntp.cs.strath.ac.uk: Unknown host |
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BusyBox v1.00 (2007.11.07-19:57+0000) Built-in shell (msh) Enter 'help' for a list of built-in commands. |
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# |
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@ -0,0 +1,267 @@ |
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/*
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* Configuation settings for the Freescale MCF5373 FireEngine board. |
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* |
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* Copyright (C) 2004-2007 Freescale Semiconductor, Inc. |
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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/*
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* board/config.h - configuration options, board specific |
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*/ |
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#ifndef _M5373EVB_H |
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#define _M5373EVB_H |
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/*
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* High Level Configuration Options |
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* (easy to change) |
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*/ |
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#define CONFIG_MCF532x /* define processor family */ |
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#define CONFIG_M5373 /* define processor type */ |
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#undef DEBUG |
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#define CONFIG_MCFUART |
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#define CFG_UART_PORT (0) |
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#define CONFIG_BAUDRATE 115200 |
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#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } |
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#undef CONFIG_WATCHDOG |
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#define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ |
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/* Command line configuration */ |
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#include <config_cmd_default.h> |
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#define CONFIG_CMD_CACHE |
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#define CONFIG_CMD_DATE |
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#define CONFIG_CMD_ELF |
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#define CONFIG_CMD_FLASH |
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#define CONFIG_CMD_I2C |
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#define CONFIG_CMD_MEMORY |
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#define CONFIG_CMD_MISC |
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#define CONFIG_CMD_MII |
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#define CONFIG_CMD_NET |
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#define CONFIG_CMD_PING |
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#define CONFIG_CMD_REGINFO |
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#ifdef NANDFLASH_SIZE |
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# define CONFIG_CMD_NAND |
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#endif |
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#define CFG_UNIFY_CACHE |
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#define CONFIG_MCFFEC |
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#ifdef CONFIG_MCFFEC |
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# define CONFIG_NET_MULTI 1 |
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# define CONFIG_MII 1 |
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# define CFG_DISCOVER_PHY |
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# define CFG_RX_ETH_BUFFER 8 |
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# define CFG_FAULT_ECHO_LINK_DOWN |
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# define CFG_FEC0_PINMUX 0 |
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# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE |
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# define MCFFEC_TOUT_LOOP 50000 |
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/* If CFG_DISCOVER_PHY is not defined - hardcoded */ |
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# ifndef CFG_DISCOVER_PHY |
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# define FECDUPLEX FULL |
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# define FECSPEED _100BASET |
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# else |
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# ifndef CFG_FAULT_ECHO_LINK_DOWN |
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# define CFG_FAULT_ECHO_LINK_DOWN |
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# endif |
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# endif /* CFG_DISCOVER_PHY */ |
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#endif |
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#define CONFIG_MCFRTC |
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#undef RTC_DEBUG |
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/* Timer */ |
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#define CONFIG_MCFTMR |
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#undef CONFIG_MCFPIT |
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/* I2C */ |
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#define CONFIG_FSL_I2C |
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#define CONFIG_HARD_I2C /* I2C with hw support */ |
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#undef CONFIG_SOFT_I2C /* I2C bit-banged */ |
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#define CFG_I2C_SPEED 80000 |
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#define CFG_I2C_SLAVE 0x7F |
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#define CFG_I2C_OFFSET 0x58000 |
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#define CFG_IMMR CFG_MBAR |
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|
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#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ |
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#define CONFIG_UDP_CHECKSUM |
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#ifdef CONFIG_MCFFEC |
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# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 |
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# define CONFIG_IPADDR 192.162.1.2 |
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# define CONFIG_NETMASK 255.255.255.0 |
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# define CONFIG_SERVERIP 192.162.1.1 |
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# define CONFIG_GATEWAYIP 192.162.1.1 |
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# define CONFIG_OVERWRITE_ETHADDR_ONCE |
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#endif /* FEC_ENET */ |
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|
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#define CONFIG_HOSTNAME M5373EVB |
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#define CONFIG_EXTRA_ENV_SETTINGS \ |
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"netdev=eth0\0" \
|
||||
"loadaddr=" MK_STR(CFG_LOAD_ADDR) "\0" \
|
||||
"u-boot=u-boot.bin\0" \
|
||||
"load=tftp ${loadaddr) ${u-boot}\0" \
|
||||
"upd=run load; run prog\0" \
|
||||
"prog=prot off 0 2ffff;" \
|
||||
"era 0 2ffff;" \
|
||||
"cp.b ${loadaddr} 0 ${filesize};" \
|
||||
"save\0" \
|
||||
"" |
||||
|
||||
#define CONFIG_PRAM 512 /* 512 KB */ |
||||
#define CFG_PROMPT "-> " |
||||
#define CFG_LONGHELP /* undef to save memory */ |
||||
|
||||
#ifdef CONFIG_CMD_KGDB |
||||
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
||||
#else |
||||
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#endif |
||||
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
||||
#define CFG_MAXARGS 16 /* max number of command args */ |
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
||||
#define CFG_LOAD_ADDR 0x40010000 |
||||
|
||||
#define CFG_HZ 1000 |
||||
#define CFG_CLK 80000000 |
||||
#define CFG_CPU_CLK CFG_CLK * 3 |
||||
|
||||
#define CFG_MBAR 0xFC000000 |
||||
|
||||
#define CFG_LATCH_ADDR (CFG_CS1_BASE + 0x80000) |
||||
|
||||
/*
|
||||
* Low Level Configuration Settings |
||||
* (address mappings, register initial values, etc.) |
||||
* You should know what you are doing if you make changes here. |
||||
*/ |
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for initial stack pointer and data area (in DPRAM) |
||||
*/ |
||||
#define CFG_INIT_RAM_ADDR 0x80000000 |
||||
#define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */ |
||||
#define CFG_INIT_RAM_CTRL 0x221 |
||||
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
||||
#define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 0x10) |
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Start addresses for the final memory configuration |
||||
* (Set up by the startup code) |
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0 |
||||
*/ |
||||
#define CFG_SDRAM_BASE 0x40000000 |
||||
#define CFG_SDRAM_SIZE 32 /* SDRAM size in MB */ |
||||
#define CFG_SDRAM_CFG1 0x53722730 |
||||
#define CFG_SDRAM_CFG2 0x56670000 |
||||
#define CFG_SDRAM_CTRL 0xE1092000 |
||||
#define CFG_SDRAM_EMOD 0x40010000 |
||||
#define CFG_SDRAM_MODE 0x018D0000 |
||||
|
||||
#define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400 |
||||
#define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20) |
||||
|
||||
#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) |
||||
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
||||
|
||||
#define CFG_BOOTPARAMS_LEN 64*1024 |
||||
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization ?? |
||||
*/ |
||||
#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20)) |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization |
||||
*/ |
||||
#define CFG_FLASH_CFI |
||||
#ifdef CFG_FLASH_CFI |
||||
# define CFG_FLASH_CFI_DRIVER 1 |
||||
# define CFG_FLASH_SIZE 0x800000 /* Max size that the board might have */ |
||||
# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
||||
# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
||||
# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ |
||||
# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ |
||||
#endif |
||||
|
||||
#ifdef NANDFLASH_SIZE |
||||
# define CFG_MAX_NAND_DEVICE 1 |
||||
# define CFG_NAND_BASE CFG_CS2_BASE |
||||
# define CFG_NAND_SIZE 1 |
||||
# define CFG_NAND_BASE_LIST { CFG_NAND_BASE } |
||||
# define NAND_MAX_CHIPS 1 |
||||
# define NAND_ALLOW_ERASE_ALL 1 |
||||
# define CONFIG_JFFS2_NAND 1 |
||||
# define CONFIG_JFFS2_DEV "nand0" |
||||
# define CONFIG_JFFS2_PART_SIZE (CFG_CS2_MASK & ~1) |
||||
# define CONFIG_JFFS2_PART_OFFSET 0x00000000 |
||||
#endif |
||||
|
||||
#define CFG_FLASH_BASE CFG_CS0_BASE |
||||
|
||||
/* Configuration for environment
|
||||
* Environment is embedded in u-boot in the second sector of the flash |
||||
*/ |
||||
#define CFG_ENV_OFFSET 0x4000 |
||||
#define CFG_ENV_SECT_SIZE 0x2000 |
||||
#define CFG_ENV_IS_IN_FLASH 1 |
||||
#define CFG_ENV_IS_EMBEDDED 1 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration |
||||
*/ |
||||
#define CFG_CACHELINE_SIZE 16 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Chipselect bank definitions |
||||
*/ |
||||
/*
|
||||
* CS0 - NOR Flash 1, 2, 4, or 8MB |
||||
* CS1 - CompactFlash and registers |
||||
* CS2 - NAND Flash 16, 32, or 64MB |
||||
* CS3 - Available |
||||
* CS4 - Available |
||||
* CS5 - Available |
||||
*/ |
||||
#define CFG_CS0_BASE 0 |
||||
#define CFG_CS0_MASK 0x007f0001 |
||||
#define CFG_CS0_CTRL 0x00001fa0 |
||||
|
||||
#define CFG_CS1_BASE 0x10000000 |
||||
#define CFG_CS1_MASK 0x001f0001 |
||||
#define CFG_CS1_CTRL 0x002A3780 |
||||
|
||||
#ifdef NANDFLASH_SIZE |
||||
#define CFG_CS2_BASE 0x20000000 |
||||
#define CFG_CS2_MASK ((NANDFLASH_SIZE << 20) | 1) |
||||
#define CFG_CS2_CTRL 0x00001f60 |
||||
#endif |
||||
|
||||
#endif /* _M5373EVB_H */ |
||||
Loading…
Reference in new issue