Drop three-wire serial (TWS) support

This subsystem has not been converted to driver model, there is only one
driver and only one board that uses it. Drop it and its CONFIG option.

Also drop the rtc4543 RTC driver since it uses TWS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
master
Simon Glass 7 years ago committed by Tom Rini
parent 2c6ebff1e1
commit ab3c4fbe8a
  1. 1
      configs/inka4x0_defconfig
  2. 1
      drivers/Makefile
  3. 1
      drivers/rtc/Makefile
  4. 101
      drivers/rtc/rtc4543.c
  5. 8
      drivers/twserial/Makefile
  6. 94
      drivers/twserial/soft_tws.c
  7. 80
      include/configs/inka4x0.h
  8. 21
      include/tws.h
  9. 2
      scripts/config_whitelist.txt

@ -8,7 +8,6 @@ CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_DATE=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y

@ -87,7 +87,6 @@ obj-y += spmi/
obj-y += sysreset/
obj-y += timer/
obj-y += tpm/
obj-y += twserial/
obj-y += video/
obj-y += watchdog/
obj-$(CONFIG_QE) += qe/

@ -48,7 +48,6 @@ obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
obj-$(CONFIG_RTC_PL031) += pl031.o
obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o
obj-$(CONFIG_RTC_RTC4543) += rtc4543.o
obj-$(CONFIG_RTC_RV3029) += rv3029.o
obj-$(CONFIG_RTC_RX8025) += rx8025.o
obj-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o

@ -1,101 +0,0 @@
/*
* (C) Copyright 2008, 2009
* Andreas Pfefferle, DENX Software Engineering, ap@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/io.h>
#include <common.h>
#include <command.h>
#include <config.h>
#include <rtc.h>
#include <tws.h>
#if defined(CONFIG_CMD_DATE)
/*
* Note: The acrobatics below is due to the hideously ingenius idea of
* the chip designers. As the chip does not allow register
* addressing, all values need to be read and written in one go. Sure
* enough, the 'wday' field (0-6) is transferred using the economic
* number of 4 bits right in the middle of the packet.....
*/
int rtc_get(struct rtc_time *tm)
{
int rel = 0;
uchar buffer[7];
memset(buffer, 0, 7);
/* Read 52 bits into our buffer */
tws_read(buffer, 52);
tm->tm_sec = bcd2bin( buffer[0] & 0x7F);
tm->tm_min = bcd2bin( buffer[1] & 0x7F);
tm->tm_hour = bcd2bin( buffer[2] & 0x3F);
tm->tm_wday = bcd2bin( buffer[3] & 0x07);
tm->tm_mday = bcd2bin((buffer[3] & 0xF0) >> 4 | (buffer[4] & 0x0F) << 4);
tm->tm_mon = bcd2bin((buffer[4] & 0x30) >> 4 | (buffer[5] & 0x0F) << 4);
tm->tm_year = bcd2bin((buffer[5] & 0xF0) >> 4 | (buffer[6] & 0x0F) << 4) + 2000;
tm->tm_yday = 0;
tm->tm_isdst = 0;
if (tm->tm_sec & 0x80) {
puts("### Warning: RTC Low Voltage - date/time not reliable\n");
rel = -1;
}
debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
tm->tm_hour, tm->tm_min, tm->tm_sec);
return rel;
}
int rtc_set(struct rtc_time *tm)
{
uchar buffer[7];
uchar tmp;
debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
tm->tm_hour, tm->tm_min, tm->tm_sec);
memset(buffer, 0, 7);
buffer[0] = bin2bcd(tm->tm_sec);
buffer[1] = bin2bcd(tm->tm_min);
buffer[2] = bin2bcd(tm->tm_hour);
buffer[3] = bin2bcd(tm->tm_wday);
tmp = bin2bcd(tm->tm_mday);
buffer[3] |= (tmp & 0x0F) << 4;
buffer[4] = (tmp & 0xF0) >> 4;
tmp = bin2bcd(tm->tm_mon);
buffer[4] |= (tmp & 0x0F) << 4;
buffer[5] = (tmp & 0xF0) >> 4;
tmp = bin2bcd(tm->tm_year % 100);
buffer[5] |= (tmp & 0x0F) << 4;
buffer[6] = (tmp & 0xF0) >> 4;
/* Write the resulting 52 bits to device */
tws_write(buffer, 52);
return 0;
}
void rtc_reset(void)
{
struct rtc_time tmp;
tmp.tm_sec = 0;
tmp.tm_min = 0;
tmp.tm_hour = 0;
tmp.tm_wday = 4;
tmp.tm_mday = 1;
tmp.tm_mon = 1;
tmp.tm_year = 2000;
rtc_set(&tmp);
}
#endif

@ -1,8 +0,0 @@
#
# (C) Copyright 2009
# Detlev Zundel, DENX Software Engineering, dzu@denx.de.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_SOFT_TWS) += soft_tws.o

@ -1,94 +0,0 @@
/*
* (C) Copyright 2009
* Detlev Zundel, DENX Software Engineering, dzu@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#define TWS_IMPLEMENTATION
#include <common.h>
/*=====================================================================*/
/* Public Functions */
/*=====================================================================*/
/*-----------------------------------------------------------------------
* Read bits
*/
int tws_read(uchar *buffer, int len)
{
int rem = len;
uchar accu, shift;
debug("tws_read: buffer %p len %d\n", buffer, len);
/* Configure the data pin for input */
tws_data_config_output(0);
/* Disable WR, i.e. setup a read */
tws_wr(0);
udelay(1);
/* Rise CE */
tws_ce(1);
udelay(1);
for (; rem > 0; ) {
for (shift = 0, accu = 0;
(rem > 0) && (shift < 8);
rem--, shift++) {
tws_clk(1);
udelay(10);
accu |= (tws_data_read() << shift); /* LSB first */
tws_clk(0);
udelay(10);
}
*buffer++ = accu;
}
/* Lower CE */
tws_ce(0);
return len - rem;
}
/*-----------------------------------------------------------------------
* Write bits
*/
int tws_write(uchar *buffer, int len)
{
int rem = len;
uchar accu, shift;
debug("tws_write: buffer %p len %d\n", buffer, len);
/* Configure the data pin for output */
tws_data_config_output(1);
/* Enable WR, i.e. setup a write */
tws_wr(1);
udelay(1);
/* Rise CE */
tws_ce(1);
udelay(1);
for (; rem > 0; ) {
for (shift = 0, accu = *buffer++;
(rem > 0) && (shift < 8);
rem--, shift++) {
tws_data(accu & 0x01); /* LSB first */
tws_clk(1);
udelay(10);
tws_clk(0);
udelay(10);
accu >>= 1;
}
}
/* Lower CE */
tws_ce(0);
return len - rem;
}

@ -219,86 +219,6 @@
#define CONFIG_SYS_GPS_PORT_CONFIG 0x01501444
/*
* RTC configuration
*/
#define CONFIG_RTC_RTC4543 1 /* use external RTC */
/*
* Software (bit-bang) three wire serial configuration
*
* Note that we need the ifdefs because otherwise compilation of
* mkimage.c fails.
*/
#define CONFIG_SOFT_TWS 1
#ifdef TWS_IMPLEMENTATION
#include <mpc5xxx.h>
#include <asm/io.h>
#define TWS_CE MPC5XXX_GPIO_WKUP_PSC1_4 /* GPIO_WKUP_0 */
#define TWS_WR MPC5XXX_GPIO_WKUP_PSC2_4 /* GPIO_WKUP_1 */
#define TWS_DATA MPC5XXX_GPIO_SINT_PSC3_4 /* GPIO_SINT_0 */
#define TWS_CLK MPC5XXX_GPIO_SINT_PSC3_5 /* GPIO_SINT_1 */
static inline void tws_ce(unsigned bit)
{
struct mpc5xxx_wu_gpio *wu_gpio =
(struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO;
if (bit)
setbits_8(&wu_gpio->dvo, TWS_CE);
else
clrbits_8(&wu_gpio->dvo, TWS_CE);
}
static inline void tws_wr(unsigned bit)
{
struct mpc5xxx_wu_gpio *wu_gpio =
(struct mpc5xxx_wu_gpio *)MPC5XXX_WU_GPIO;
if (bit)
setbits_8(&wu_gpio->dvo, TWS_WR);
else
clrbits_8(&wu_gpio->dvo, TWS_WR);
}
static inline void tws_clk(unsigned bit)
{
struct mpc5xxx_gpio *gpio =
(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
if (bit)
setbits_8(&gpio->sint_dvo, TWS_CLK);
else
clrbits_8(&gpio->sint_dvo, TWS_CLK);
}
static inline void tws_data(unsigned bit)
{
struct mpc5xxx_gpio *gpio =
(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
if (bit)
setbits_8(&gpio->sint_dvo, TWS_DATA);
else
clrbits_8(&gpio->sint_dvo, TWS_DATA);
}
static inline unsigned tws_data_read(void)
{
struct mpc5xxx_gpio *gpio =
(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
return !!(in_8(&gpio->sint_ival) & TWS_DATA);
}
static inline void tws_data_config_output(unsigned output)
{
struct mpc5xxx_gpio *gpio =
(struct mpc5xxx_gpio *)MPC5XXX_GPIO;
if (output)
setbits_8(&gpio->sint_ddr, TWS_DATA);
else
clrbits_8(&gpio->sint_ddr, TWS_DATA);
}
#endif /* TWS_IMPLEMENTATION */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */

@ -1,21 +0,0 @@
/*
* (C) Copyright 2009
* Detlev Zundel, DENX Software Engineering, dzu@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _TWS_H_
#define _TWS_H_
/*
* Read/Write interface:
* buffer: Where to read/write the data
* len: How many bits to read/write
*
* Returns: 0 on success, not 0 on failure
*/
int tws_read(uchar *buffer, int len);
int tws_write(uchar *buffer, int len);
#endif /* _TWS_H_ */

@ -2346,7 +2346,6 @@ CONFIG_RTC_MV
CONFIG_RTC_MXS
CONFIG_RTC_PCF8563
CONFIG_RTC_PT7C4338
CONFIG_RTC_RTC4543
CONFIG_RTC_RV3029
CONFIG_RTC_RX8025
CONFIG_RTC_X1205
@ -2579,7 +2578,6 @@ CONFIG_SOFT_I2C_GPIO_SCL
CONFIG_SOFT_I2C_GPIO_SDA
CONFIG_SOFT_I2C_READ_REPEATED_START
CONFIG_SOFT_SPI
CONFIG_SOFT_TWS
CONFIG_SOURCE
CONFIG_SPARSE_RCU_POINTER
CONFIG_SPDDRAM_SILENT

Loading…
Cancel
Save