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@ -42,6 +42,11 @@ |
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#define MXS_NAND_DMA_DESCRIPTOR_COUNT 4 |
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#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE 512 |
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#if defined(CONFIG_MX6) |
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#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT 2 |
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#else |
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#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT 0 |
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#endif |
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#define MXS_NAND_METADATA_SIZE 10 |
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#define MXS_NAND_COMMAND_BUFFER_SIZE 32 |
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@ -982,14 +987,16 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd) |
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tmp |= MXS_NAND_METADATA_SIZE << BCH_FLASHLAYOUT0_META_SIZE_OFFSET; |
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tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1) |
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<< BCH_FLASHLAYOUT0_ECC0_OFFSET; |
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tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE; |
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tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE |
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>> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT; |
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writel(tmp, &bch_regs->hw_bch_flash0layout0); |
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tmp = (mtd->writesize + mtd->oobsize) |
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<< BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET; |
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tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1) |
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<< BCH_FLASHLAYOUT1_ECCN_OFFSET; |
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tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE; |
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tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE |
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>> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT; |
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writel(tmp, &bch_regs->hw_bch_flash0layout1); |
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/* Set *all* chip selects to use layout 0 */ |
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