imx: spl: Fix NAND bootmode detection

commit 20f1471416 ("imx: spl: Update NAND bootmode detection bit")
broke the NAND bootmode detection by checking if
BOOT_CFG1[7:4] == 0x8 for NAND boot mode.
This commit essentially reverts it, while using the IMX6_BMODE_*
macros that were introduced since.

Tables 8-7 & 8-10 from IMX6DQRM say the NAND boot mode selection
is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not
necessarily 0x0 in this case.
Actually, NAND boot mode is when 0x8 <= BOOT_CFG1[7:4] <= 0xf,
like it was in the code before.

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tim Harvey <tharvey@gateworks.com>
master
Eran Matityahu 7 years ago committed by Stefano Babic
parent baefb63a13
commit af104ae5b8
  1. 3
      arch/arm/include/asm/mach-imx/sys_proto.h
  2. 2
      arch/arm/mach-imx/spl.c
  3. 2
      board/engicam/common/board.c

@ -81,7 +81,8 @@ enum imx6_bmode {
IMX6_BMODE_ESD,
IMX6_BMODE_MMC,
IMX6_BMODE_EMMC,
IMX6_BMODE_NAND,
IMX6_BMODE_NAND_MIN,
IMX6_BMODE_NAND_MAX = 0xf,
};
static inline u8 imx6_is_bmode_from_gpr9(void)

@ -91,7 +91,7 @@ u32 spl_boot_device(void)
case IMX6_BMODE_EMMC:
return BOOT_DEVICE_MMC1;
/* NAND Flash: 8.5.2, Table 8-10 */
case IMX6_BMODE_NAND:
case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
return BOOT_DEVICE_NAND;
}
return BOOT_DEVICE_NONE;

@ -69,7 +69,7 @@ int board_late_init(void)
#endif
env_set("modeboot", "mmcboot");
break;
case IMX6_BMODE_NAND:
case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX:
env_set("modeboot", "nandboot");
break;
default:

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