arm: socfpga: Fix emac1 doesn't work on socdk board

Updated pinmux group MIXED1IO[0-13] for RGMII1.
Updated EMAC1 clock.

Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
master
shengjiangwu 9 years ago committed by Marek Vasut
parent 94f53a7ddf
commit b0808b912d
  1. 28
      board/altera/cyclone5-socdk/qts/pinmux_config.h
  2. 2
      board/altera/cyclone5-socdk/qts/pll_config.h

@ -72,20 +72,20 @@ const u8 sys_mgr_init_table[] = {
0, /* GENERALIO29 */
0, /* GENERALIO30 */
0, /* GENERALIO31 */
0, /* MIXED1IO0 */
1, /* MIXED1IO1 */
1, /* MIXED1IO2 */
1, /* MIXED1IO3 */
1, /* MIXED1IO4 */
0, /* MIXED1IO5 */
0, /* MIXED1IO6 */
0, /* MIXED1IO7 */
1, /* MIXED1IO8 */
1, /* MIXED1IO9 */
1, /* MIXED1IO10 */
1, /* MIXED1IO11 */
0, /* MIXED1IO12 */
0, /* MIXED1IO13 */
2, /* MIXED1IO0 */
2, /* MIXED1IO1 */
2, /* MIXED1IO2 */
2, /* MIXED1IO3 */
2, /* MIXED1IO4 */
2, /* MIXED1IO5 */
2, /* MIXED1IO6 */
2, /* MIXED1IO7 */
2, /* MIXED1IO8 */
2, /* MIXED1IO9 */
2, /* MIXED1IO10 */
2, /* MIXED1IO11 */
2, /* MIXED1IO12 */
2, /* MIXED1IO13 */
0, /* MIXED1IO14 */
1, /* MIXED1IO15 */
1, /* MIXED1IO16 */

@ -31,7 +31,7 @@
#define CONFIG_HPS_PERPLLGRP_VCO_NUMER 79
#define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0
#define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3
#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 511
#define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3
#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511
#define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4
#define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4

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