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6 changed files with
7 additions and
5 deletions
arch/arm/mach-davinci/Kconfig
include/configs/calimain.h
include/configs/da850evm.h
include/configs/ipam390.h
include/configs/legoev3.h
scripts/config_whitelist.txt
@ -8,11 +8,13 @@ config TARGET_IPAM390
bool "IPAM390 board"
select SUPPORT_SPL
select SYS_DA850_PLL_INIT
select SYS_DA850_DDR_INIT
config TARGET_DA850EVM
bool "DA850 EVM board"
select SUPPORT_SPL
select SYS_DA850_PLL_INIT
select SYS_DA850_DDR_INIT
config TARGET_EA20
bool "EA20 board"
@ -24,10 +26,12 @@ config TARGET_OMAPL138_LCDK
config TARGET_CALIMAIN
bool "Calimain board"
select SYS_DA850_PLL_INIT
select SYS_DA850_DDR_INIT
config TARGET_LEGOEV3
bool "LEGO MINDSTORMS EV3"
select SYS_DA850_PLL_INIT
select SYS_DA850_DDR_INIT
endchoice
@ -37,6 +41,9 @@ config SYS_SOC
config SYS_DA850_PLL_INIT
bool
config SYS_DA850_DDR_INIT
bool
source "board/Barix/ipam390/Kconfig"
source "board/davinci/da8xxevm/Kconfig"
source "board/davinci/ea20/Kconfig"
@ -32,7 +32,6 @@
# define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
# define CONFIG_SYS_TEXT_BASE 0x60000000
# define CONFIG_DA850_LOWLEVEL
# define CONFIG_SYS_DA850_DDR_INIT
# define CONFIG_ARCH_CPU_INIT
# define CONFIG_DA8XX_GPIO
# define CONFIG_HW_WATCHDOG
@ -31,7 +31,6 @@
# define CONFIG_SYS_OSCIN_FREQ 24000000
# define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
# define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
# define CONFIG_SYS_DA850_DDR_INIT
# ifdef CONFIG_DIRECT_NOR_BOOT
# define CONFIG_ARCH_CPU_INIT
@ -32,7 +32,6 @@
# define CONFIG_SYS_OSCIN_FREQ 24000000
# define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
# define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
# define CONFIG_SYS_DA850_DDR_INIT
# define CONFIG_SYS_TEXT_BASE 0xc1080000
/*
@ -26,7 +26,6 @@
# define CONFIG_SYS_OSCIN_FREQ 24000000
# define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
# define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
# define CONFIG_SYS_DA850_DDR_INIT
# define CONFIG_SYS_TEXT_BASE 0xc1080000
@ -4690,7 +4690,6 @@ CONFIG_SYS_DA850_DDR2_SDBCR2
CONFIG_SYS_DA850_DDR2_SDRCR
CONFIG_SYS_DA850_DDR2_SDTIMR
CONFIG_SYS_DA850_DDR2_SDTIMR2
CONFIG_SYS_DA850_DDR_INIT
CONFIG_SYS_DA850_PLL0_PLLDIV1
CONFIG_SYS_DA850_PLL0_PLLDIV2
CONFIG_SYS_DA850_PLL0_PLLDIV3