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nand: Embed mtd_info in struct nand_chip

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nand_info[] is now an array of pointers, with the actual mtd_info
instance embedded in struct nand_chip.

This is in preparation for syncing the NAND code with Linux 4.6,
which makes the same change to struct nand_chip.  It's in a separate
commit due to the large amount of changes required to accommodate the
change to nand_info[].

Signed-off-by: Scott Wood <oss@buserror.net>
master
Scott Wood 8 years ago
parent 151c06ec61
commit b616d9b0a7
44 changed files with 247 additions and 239 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 2
      board/BuR/common/common.c
  2. 2
      board/atmel/at91sam9261ek/at91sam9261ek.c
  3. 2
      board/atmel/at91sam9263ek/at91sam9263ek.c
  4. 2
      board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
  5. 2
      board/atmel/at91sam9n12ek/at91sam9n12ek.c
  6. 2
      board/atmel/at91sam9rlek/at91sam9rlek.c
  7. 2
      board/atmel/at91sam9x5ek/at91sam9x5ek.c
  8. 2
      board/atmel/sama5d3xek/sama5d3xek.c
  9. 2
      board/atmel/sama5d4_xplained/sama5d4_xplained.c
  10. 2
      board/atmel/sama5d4ek/sama5d4ek.c
  11. 2
      board/ronetix/pm9261/pm9261.c
  12. 2
      board/ronetix/pm9263/pm9263.c
  13. 2
      cmd/bootm.c
  14. 4
      cmd/jffs2.c
  15. 42
      cmd/nand.c
  16. 18
      common/env_nand.c
  17. 2
      common/fb_nand.c
  18. 4
      common/splash_source.c
  19. 15
      doc/README.nand
  20. 8
      drivers/dfu/dfu_nand.c
  21. 54
      drivers/mtd/nand/am335x_spl_bch.c
  22. 4
      drivers/mtd/nand/arasan_nfc.c
  23. 77
      drivers/mtd/nand/atmel_nand.c
  24. 4
      drivers/mtd/nand/denali.c
  25. 5
      drivers/mtd/nand/fsl_elbc_nand.c
  26. 5
      drivers/mtd/nand/fsl_ifc_nand.c
  27. 10
      drivers/mtd/nand/fsmc_nand.c
  28. 10
      drivers/mtd/nand/lpc32xx_nand_mlc.c
  29. 3
      drivers/mtd/nand/mpc5121_nfc.c
  30. 2
      drivers/mtd/nand/mxc_nand.c
  31. 33
      drivers/mtd/nand/mxs_nand_spl.c
  32. 27
      drivers/mtd/nand/nand.c
  33. 85
      drivers/mtd/nand/nand_spl_simple.c
  34. 4
      drivers/mtd/nand/omap_gpmc.c
  35. 10
      drivers/mtd/nand/pxa3xx_nand.c
  36. 4
      drivers/mtd/nand/tegra_nand.c
  37. 5
      drivers/mtd/nand/vf610_nfc.c
  38. 2
      drivers/net/fm/fm.c
  39. 4
      drivers/net/phy/cortina.c
  40. 2
      fs/jffs2/jffs2_1pass.c
  41. 2
      fs/jffs2/jffs2_nand_1pass.c
  42. 8
      fs/yaffs2/yaffs_uboot_glue.c
  43. 1
      include/linux/mtd/nand.h
  44. 6
      include/nand.h

2
board/BuR/common/common.c
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@ -259,7 +259,7 @@ static int load_devicetree(void)
}
#ifdef CONFIG_NAND
dtbsize = 0x20000;
rc = nand_read_skip_bad(&nand_info[0], 0x40000, (size_t *)&dtbsize,
rc = nand_read_skip_bad(nand_info[0], 0x40000, (size_t *)&dtbsize,
NULL, 0x20000, (u_char *)dtbaddr);
#else
char *dtbname = getenv("dtb");

2
board/atmel/at91sam9261ek/at91sam9261ek.c
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@ -212,7 +212,7 @@ void lcd_show_board_info(void)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20,
nand_size >> 20 );

2
board/atmel/at91sam9263ek/at91sam9263ek.c
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@ -191,7 +191,7 @@ void lcd_show_board_info(void)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
#ifndef CONFIG_SYS_NO_FLASH
flash_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)

2
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
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@ -272,7 +272,7 @@ void lcd_show_board_info(void)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20,
nand_size >> 20 );

2
board/atmel/at91sam9n12ek/at91sam9n12ek.c
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@ -124,7 +124,7 @@ void lcd_show_board_info(void)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
lcd_printf(" %ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20,
nand_size >> 20);

2
board/atmel/at91sam9rlek/at91sam9rlek.c
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@ -151,7 +151,7 @@ void lcd_show_board_info(void)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20,
nand_size >> 20 );

2
board/atmel/at91sam9x5ek/at91sam9x5ek.c
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@ -196,7 +196,7 @@ void lcd_show_board_info(void)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
lcd_printf(" %ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20,
nand_size >> 20);

2
board/atmel/sama5d3xek/sama5d3xek.c
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@ -207,7 +207,7 @@ void lcd_show_board_info(void)
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
#endif
lcd_printf("%ld MB SDRAM, %lld MB NAND\n",
dram_size >> 20, nand_size >> 20);

2
board/atmel/sama5d4_xplained/sama5d4_xplained.c
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@ -191,7 +191,7 @@ void lcd_show_board_info(void)
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
#endif
lcd_printf("%ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20, nand_size >> 20);

2
board/atmel/sama5d4ek/sama5d4ek.c
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@ -187,7 +187,7 @@ void lcd_show_board_info(void)
nand_size = 0;
#ifdef CONFIG_NAND_ATMEL
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
#endif
lcd_printf("%ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20, nand_size >> 20);

2
board/ronetix/pm9261/pm9261.c
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@ -194,7 +194,7 @@ void lcd_show_board_info(void)
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
flash_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)

2
board/ronetix/pm9263/pm9263.c
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@ -293,7 +293,7 @@ void lcd_show_board_info(void)
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
nand_size += nand_info[i]->size;
flash_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)

2
cmd/bootm.c
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@ -461,7 +461,7 @@ static int do_imls_nand(void)
printf("\n");
for (nand_dev = 0; nand_dev < CONFIG_SYS_MAX_NAND_DEVICE; nand_dev++) {
mtd = &nand_info[nand_dev];
mtd = nand_info[nand_dev];
if (!mtd->name || !mtd->size)
continue;

4
cmd/jffs2.c
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@ -167,7 +167,7 @@ static int mtd_device_validate(u8 type, u8 num, u32 *size)
} else if (type == MTD_DEV_TYPE_NAND) {
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
if (num < CONFIG_SYS_MAX_NAND_DEVICE) {
*size = nand_info[num].size;
*size = nand_info[num]->size;
return 0;
}
@ -244,7 +244,7 @@ static inline u32 get_part_sector_size_nand(struct mtdids *id)
#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
struct mtd_info *mtd;
mtd = &nand_info[id->num];
mtd = nand_info[id->num];
return mtd->erasesize;
#else

42
cmd/nand.c
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@ -116,7 +116,7 @@ free_dat:
static int set_dev(int dev)
{
if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE ||
!nand_info[dev].name) {
!nand_info[dev]->name) {
puts("No such device\n");
return -1;
}
@ -124,12 +124,12 @@ static int set_dev(int dev)
if (nand_curr_device == dev)
return 0;
printf("Device %d: %s", dev, nand_info[dev].name);
printf("Device %d: %s", dev, nand_info[dev]->name);
puts("... is now current device\n");
nand_curr_device = dev;
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
board_nand_select_device(nand_info[dev].priv, dev);
board_nand_select_device(nand_info[dev]->priv, dev);
#endif
return 0;
@ -189,7 +189,7 @@ int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char *const argv[])
{
int ret;
uint32_t oob_buf[ENV_OFFSET_SIZE/sizeof(uint32_t)];
struct mtd_info *mtd = &nand_info[0];
struct mtd_info *mtd = nand_info[0];
char *cmd = argv[1];
if (CONFIG_SYS_MAX_NAND_DEVICE == 0 || !mtd->name) {
@ -216,7 +216,7 @@ int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char *const argv[])
/* We don't care about size, or maxsize. */
if (mtd_arg_off(argv[2], &idx, &addr, &maxsize, &maxsize,
MTD_DEV_TYPE_NAND, nand_info[idx].size)) {
MTD_DEV_TYPE_NAND, nand_info[idx]->size)) {
puts("Offset or partition name expected\n");
return 1;
}
@ -284,7 +284,7 @@ usage:
static void nand_print_and_set_info(int idx)
{
struct mtd_info *mtd = &nand_info[idx];
struct mtd_info *mtd = nand_info[idx];
struct nand_chip *chip = mtd->priv;
printf("Device %d: ", idx);
@ -349,7 +349,7 @@ static void adjust_size_for_badblocks(loff_t *size, loff_t offset, int dev)
/* We grab the nand info object here fresh because this is usually
* called after arg_off_size() which can change the value of dev.
*/
struct mtd_info *mtd = &nand_info[dev];
struct mtd_info *mtd = nand_info[dev];
loff_t maxoffset = offset + *size;
int badblocks = 0;
@ -399,7 +399,7 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
putc('\n');
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) {
if (nand_info[i].name)
if (nand_info[i]->name)
nand_print_and_set_info(i);
}
return 0;
@ -434,11 +434,11 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
* for another device is to be used.
*/
if (dev < 0 || dev >= CONFIG_SYS_MAX_NAND_DEVICE ||
!nand_info[dev].name) {
!nand_info[dev]->name) {
puts("\nno devices available\n");
return 1;
}
mtd = &nand_info[dev];
mtd = nand_info[dev];
if (strcmp(cmd, "bad") == 0) {
printf("\nDevice %d bad blocks:\n", dev);
@ -497,13 +497,13 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
/* skip first two or three arguments, look for offset and size */
if (mtd_arg_off_size(argc - o, argv + o, &dev, &off, &size,
&maxsize, MTD_DEV_TYPE_NAND,
nand_info[dev].size) != 0)
nand_info[dev]->size) != 0)
return 1;
if (set_dev(dev))
return 1;
mtd = &nand_info[dev];
mtd = nand_info[dev];
memset(&opts, 0, sizeof(opts));
opts.offset = off;
@ -562,13 +562,13 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
if (mtd_arg_off(argv[3], &dev, &off, &size, &maxsize,
MTD_DEV_TYPE_NAND,
nand_info[dev].size))
nand_info[dev]->size))
return 1;
if (set_dev(dev))
return 1;
mtd = &nand_info[dev];
mtd = nand_info[dev];
if (argc > 4 && !str2long(argv[4], &pagecount)) {
printf("'%s' is not a number\n", argv[4]);
@ -585,7 +585,7 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
if (mtd_arg_off_size(argc - 3, argv + 3, &dev, &off,
&size, &maxsize,
MTD_DEV_TYPE_NAND,
nand_info[dev].size) != 0)
nand_info[dev]->size) != 0)
return 1;
if (set_dev(dev))
@ -597,7 +597,7 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
rwsize = size;
}
mtd = &nand_info[dev];
mtd = nand_info[dev];
if (!s || !strcmp(s, ".jffs2") ||
!strcmp(s, ".e") || !strcmp(s, ".i")) {
@ -728,13 +728,13 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
if (mtd_arg_off_size(argc - 2, argv + 2, &dev, &off, &size,
&maxsize, MTD_DEV_TYPE_NAND,
nand_info[dev].size) < 0)
nand_info[dev]->size) < 0)
return 1;
if (set_dev(dev))
return 1;
if (!nand_unlock(&nand_info[dev], off, size, allexcept)) {
if (!nand_unlock(nand_info[dev], off, size, allexcept)) {
puts("NAND flash successfully unlocked\n");
} else {
puts("Error unlocking NAND flash, "
@ -915,7 +915,7 @@ static int do_nandboot(cmd_tbl_t *cmdtp, int flag, int argc,
addr = simple_strtoul(argv[1], NULL, 16);
else
addr = CONFIG_SYS_LOAD_ADDR;
return nand_load_image(cmdtp, &nand_info[dev->id->num],
return nand_load_image(cmdtp, nand_info[dev->id->num],
part->offset, addr, argv[0]);
}
}
@ -958,14 +958,14 @@ usage:
idx = simple_strtoul(boot_device, NULL, 16);
if (idx < 0 || idx >= CONFIG_SYS_MAX_NAND_DEVICE || !nand_info[idx].name) {
if (idx < 0 || idx >= CONFIG_SYS_MAX_NAND_DEVICE || !nand_info[idx]->name) {
printf("\n** Device %d not available\n", idx);
bootstage_error(BOOTSTAGE_ID_NAND_AVAILABLE);
return 1;
}
bootstage_mark(BOOTSTAGE_ID_NAND_AVAILABLE);
return nand_load_image(cmdtp, &nand_info[idx], offset, addr, argv[0]);
return nand_load_image(cmdtp, nand_info[idx], offset, addr, argv[0]);
}
U_BOOT_CMD(nboot, 4, 1, do_nandboot,

18
common/env_nand.c
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@ -132,15 +132,15 @@ static int writeenv(size_t offset, u_char *buf)
size_t blocksize, len;
u_char *char_ptr;
blocksize = nand_info[0].erasesize;
blocksize = nand_info[0]->erasesize;
len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
while (amount_saved < CONFIG_ENV_SIZE && offset < end) {
if (nand_block_isbad(&nand_info[0], offset)) {
if (nand_block_isbad(nand_info[0], offset)) {
offset += blocksize;
} else {
char_ptr = &buf[amount_saved];
if (nand_write(&nand_info[0], offset, &len, char_ptr))
if (nand_write(nand_info[0], offset, &len, char_ptr))
return 1;
offset += blocksize;
@ -164,7 +164,7 @@ static int erase_and_write_env(const struct env_location *location,
int ret = 0;
printf("Erasing %s...\n", location->name);
if (nand_erase_opts(&nand_info[0], &location->erase_opts))
if (nand_erase_opts(nand_info[0], &location->erase_opts))
return 1;
printf("Writing to %s... ", location->name);
@ -247,20 +247,20 @@ static int readenv(size_t offset, u_char *buf)
size_t blocksize, len;
u_char *char_ptr;
blocksize = nand_info[0].erasesize;
blocksize = nand_info[0]->erasesize;
if (!blocksize)
return 1;
len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
while (amount_loaded < CONFIG_ENV_SIZE && offset < end) {
if (nand_block_isbad(&nand_info[0], offset)) {
if (nand_block_isbad(nand_info[0], offset)) {
offset += blocksize;
} else {
char_ptr = &buf[amount_loaded];
if (nand_read_skip_bad(&nand_info[0], offset,
if (nand_read_skip_bad(nand_info[0], offset,
&len, NULL,
nand_info[0].size, char_ptr))
nand_info[0]->size, char_ptr))
return 1;
offset += blocksize;
@ -387,7 +387,7 @@ void env_relocate_spec(void)
ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
#if defined(CONFIG_ENV_OFFSET_OOB)
ret = get_nand_env_oob(&nand_info[0], &nand_env_oob_offset);
ret = get_nand_env_oob(nand_info[0], &nand_env_oob_offset);
/*
* If unable to read environment offset from NAND OOB then fall through
* to the normal environment reading code below

2
common/fb_nand.c
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@ -62,7 +62,7 @@ static int fb_nand_lookup(const char *partname, char *response,
return -EINVAL;
}
*mtd = &nand_info[dev->id->num];
*mtd = nand_info[dev->id->num];
return 0;
}

4
common/splash_source.c
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@ -45,9 +45,9 @@ static int splash_sf_read_raw(u32 bmp_load_addr, int offset, size_t read_size)
#ifdef CONFIG_CMD_NAND
static int splash_nand_read_raw(u32 bmp_load_addr, int offset, size_t read_size)
{
return nand_read_skip_bad(&nand_info[nand_curr_device], offset,
return nand_read_skip_bad(nand_info[nand_curr_device], offset,
&read_size, NULL,
nand_info[nand_curr_device].size,
nand_info[nand_curr_device]->size,
(u_char *)bmp_load_addr);
}
#else

15
doc/README.nand
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@ -136,15 +136,8 @@ Configuration Options:
Example of new init to be added to the end of an existing driver
init:
/*
* devnum is the device number to be used in nand commands
* and in mtd->name. Must be less than
* CONFIG_SYS_NAND_MAX_DEVICE.
*/
mtd = &nand_info[devnum];
/* chip is struct nand_chip, and is now provided by the driver. */
mtd->priv = &chip;
mtd = &chip.mtd;
/*
* Fill in appropriate values if this driver uses these fields,
@ -165,7 +158,11 @@ Configuration Options:
if (nand_scan_tail(mtd))
error out
if (nand_register(devnum))
/*
* devnum is the device number to be used in nand commands
* and in mtd->name. Must be less than CONFIG_SYS_NAND_MAX_DEVICE.
*/
if (nand_register(devnum, mtd))
error out
In addition to providing more flexibility to the driver, it reduces

8
drivers/dfu/dfu_nand.c
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@ -39,12 +39,12 @@ static int nand_block_op(enum dfu_op op, struct dfu_entity *dfu,
if (nand_curr_device < 0 ||
nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
!nand_info[nand_curr_device].name) {
!nand_info[nand_curr_device]->name) {
printf("%s: invalid nand device\n", __func__);
return -1;
}
mtd = &nand_info[nand_curr_device];
mtd = nand_info[nand_curr_device];
if (op == DFU_OP_READ) {
ret = nand_read_skip_bad(mtd, start, &count, &actual,
@ -147,12 +147,12 @@ static int dfu_flush_medium_nand(struct dfu_entity *dfu)
if (nand_curr_device < 0 ||
nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
!nand_info[nand_curr_device].name) {
!nand_info[nand_curr_device]->name) {
printf("%s: invalid nand device\n", __func__);
return -1;
}
mtd = &nand_info[nand_curr_device];
mtd = nand_info[nand_curr_device];
memset(&opts, 0, sizeof(opts));
opts.offset = dfu->data.nand.start + dfu->offset +

54
drivers/mtd/nand/am335x_spl_bch.c
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@ -16,7 +16,7 @@
#include <linux/mtd/nand_ecc.h>
static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
struct mtd_info nand_info[1];
static struct mtd_info *mtd;
static struct nand_chip nand_chip;
#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
@ -30,12 +30,12 @@ static struct nand_chip nand_chip;
static int nand_command(int block, int page, uint32_t offs,
u8 cmd)
{
struct nand_chip *this = nand_info[0].priv;
struct nand_chip *this = mtd->priv;
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
while (!this->dev_ready(&nand_info[0]))
while (!this->dev_ready(mtd))
;
/* Emulate NAND_CMD_READOOB */
@ -45,11 +45,11 @@ static int nand_command(int block, int page, uint32_t offs,
}
/* Begin command latch cycle */
hwctrl(&nand_info[0], cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
if (cmd == NAND_CMD_RESET) {
hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
while (!this->dev_ready(&nand_info[0]))
hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
while (!this->dev_ready(mtd))
;
return 0;
}
@ -60,39 +60,39 @@ static int nand_command(int block, int page, uint32_t offs,
/* Set ALE and clear CLE to start address cycle */
/* Column address */
hwctrl(&nand_info[0], offs & 0xff,
hwctrl(mtd, offs & 0xff,
NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
hwctrl(&nand_info[0], (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
/* Row address */
if (cmd != NAND_CMD_RNDOUT) {
hwctrl(&nand_info[0], (page_addr & 0xff),
hwctrl(mtd, (page_addr & 0xff),
NAND_CTRL_ALE); /* A[19:12] */
hwctrl(&nand_info[0], ((page_addr >> 8) & 0xff),
hwctrl(mtd, ((page_addr >> 8) & 0xff),
NAND_CTRL_ALE); /* A[27:20] */
#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
/* One more address cycle for devices > 128MiB */
hwctrl(&nand_info[0], (page_addr >> 16) & 0x0f,
hwctrl(mtd, (page_addr >> 16) & 0x0f,
NAND_CTRL_ALE); /* A[31:28] */
#endif
}
hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
if (cmd == NAND_CMD_READ0) {
/* Latch in address */
hwctrl(&nand_info[0], NAND_CMD_READSTART,
hwctrl(mtd, NAND_CMD_READSTART,
NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
/*
* Wait a while for the data to be ready
*/
while (!this->dev_ready(&nand_info[0]))
while (!this->dev_ready(mtd))
;
} else if (cmd == NAND_CMD_RNDOUT) {
hwctrl(&nand_info[0], NAND_CMD_RNDOUTSTART, NAND_CTRL_CLE |
hwctrl(mtd, NAND_CMD_RNDOUTSTART, NAND_CTRL_CLE |
NAND_CTRL_CHANGE);
hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
}
return 0;
@ -100,7 +100,7 @@ static int nand_command(int block, int page, uint32_t offs,
static int nand_is_bad_block(int block)
{
struct nand_chip *this = nand_info[0].priv;
struct nand_chip *this = mtd->priv;
nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
NAND_CMD_READOOB);
@ -121,7 +121,7 @@ static int nand_is_bad_block(int block)
static int nand_read_page(int block, int page, void *dst)
{
struct nand_chip *this = nand_info[0].priv;
struct nand_chip *this = mtd->priv;
u_char ecc_calc[ECCTOTAL];
u_char ecc_code[ECCTOTAL];
u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
@ -137,15 +137,15 @@ static int nand_read_page(int block, int page, void *dst)
nand_command(block, page, 0, NAND_CMD_READ0);
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
this->ecc.hwctl(&nand_info[0], NAND_ECC_READ);
this->ecc.hwctl(mtd, NAND_ECC_READ);
nand_command(block, page, data_pos, NAND_CMD_RNDOUT);
this->read_buf(&nand_info[0], p, eccsize);
this->read_buf(mtd, p, eccsize);
nand_command(block, page, oob_pos, NAND_CMD_RNDOUT);
this->read_buf(&nand_info[0], oob, eccbytes);
this->ecc.calculate(&nand_info[0], p, &ecc_calc[i]);
this->read_buf(mtd, oob, eccbytes);
this->ecc.calculate(mtd, p, &ecc_calc[i]);
data_pos += eccsize;
oob_pos += eccbytes;
@ -164,7 +164,7 @@ static int nand_read_page(int block, int page, void *dst)
* from correct_data(). We just hope that all possible errors
* are corrected by this routine.
*/
this->ecc.correct(&nand_info[0], p, &ecc_code[i], &ecc_calc[i]);
this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
}
return 0;
@ -223,13 +223,13 @@ void nand_init(void)
/*
* Init board specific nand support
*/
nand_info[0].priv = &nand_chip;
mtd = &nand_chip.mtd;
nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
(void __iomem *)CONFIG_SYS_NAND_BASE;
board_nand_init(&nand_chip);
if (nand_chip.select_chip)
nand_chip.select_chip(&nand_info[0], 0);
nand_chip.select_chip(mtd, 0);
/* NAND chip may require reset after power-on */
nand_command(0, 0, 0, NAND_CMD_RESET);
@ -239,5 +239,5 @@ void nand_init(void)
void nand_deselect(void)
{
if (nand_chip.select_chip)
nand_chip.select_chip(&nand_info[0], -1);
nand_chip.select_chip(mtd, -1);
}

4
drivers/mtd/nand/arasan_nfc.c
Unescape View File

@ -1101,7 +1101,7 @@ static int arasan_nand_init(struct nand_chip *nand_chip, int devnum)
}
nand->nand_base = arasan_nand_base;
mtd = &nand_info[0];
mtd = &nand_chip->mtd;
nand_chip->priv = nand;
mtd->priv = nand_chip;
@ -1134,7 +1134,7 @@ static int arasan_nand_init(struct nand_chip *nand_chip, int devnum)
goto fail;
}
if (nand_register(devnum)) {
if (nand_register(devnum, mtd)) {
printf("Nand Register Fail\n");
goto fail;
}

77
drivers/mtd/nand/atmel_nand.c
Unescape View File

@ -1238,17 +1238,17 @@ static int at91_nand_ready(struct mtd_info *mtd)
#ifdef CONFIG_SPL_BUILD
/* The following code is for SPL */
static struct mtd_info mtd;
static struct mtd_info *mtd;
static struct nand_chip nand_chip;
static int nand_command(int block, int page, uint32_t offs, u8 cmd)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv;
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
while (!this->dev_ready(&mtd))
while (!this->dev_ready(mtd))
;
if (cmd == NAND_CMD_READOOB) {
@ -1256,24 +1256,24 @@ static int nand_command(int block, int page, uint32_t offs, u8 cmd)
cmd = NAND_CMD_READ0;
}
hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
if ((this->options & NAND_BUSWIDTH_16) && !nand_opcode_8bits(cmd))
offs >>= 1;
hwctrl(&mtd, offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE);
hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE);
hwctrl(&mtd, ((page_addr >> 8) & 0xff), NAND_CTRL_ALE);
hwctrl(mtd, offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE);
hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE);
hwctrl(mtd, ((page_addr >> 8) & 0xff), NAND_CTRL_ALE);
#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
hwctrl(&mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE);
hwctrl(mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE);
#endif
hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
hwctrl(&mtd, NAND_CMD_READSTART, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_READSTART, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
while (!this->dev_ready(&mtd))
while (!this->dev_ready(mtd))
;
return 0;
@ -1281,7 +1281,7 @@ static int nand_command(int block, int page, uint32_t offs, u8 cmd)
static int nand_is_bad_block(int block)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv;
nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
@ -1304,7 +1304,7 @@ static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
static int nand_read_page(int block, int page, void *dst)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv;
u_char ecc_calc[ECCTOTAL];
u_char ecc_code[ECCTOTAL];
u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
@ -1317,11 +1317,11 @@ static int nand_read_page(int block, int page, void *dst)
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
if (this->ecc.mode != NAND_ECC_SOFT)
this->ecc.hwctl(&mtd, NAND_ECC_READ);
this->read_buf(&mtd, p, eccsize);
this->ecc.calculate(&mtd, p, &ecc_calc[i]);
this->ecc.hwctl(mtd, NAND_ECC_READ);
this->read_buf(mtd, p, eccsize);
this->ecc.calculate(mtd, p, &ecc_calc[i]);
}
this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
for (i = 0; i < ECCTOTAL; i++)
ecc_code[i] = oob_data[nand_ecc_pos[i]];
@ -1330,35 +1330,35 @@ static int nand_read_page(int block, int page, void *dst)
p = dst;
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
return 0;
}
int spl_nand_erase_one(int block, int page)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
int page_addr;
if (nand_chip.select_chip)
nand_chip.select_chip(&mtd, 0);
nand_chip.select_chip(mtd, 0);
page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
hwctrl(&mtd, NAND_CMD_ERASE1, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_ERASE1, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Row address */
hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE | NAND_CTRL_CHANGE);
hwctrl(&mtd, ((page_addr >> 8) & 0xff),
hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE | NAND_CTRL_CHANGE);
hwctrl(mtd, ((page_addr >> 8) & 0xff),
NAND_CTRL_ALE | NAND_CTRL_CHANGE);
#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
/* One more address cycle for devices > 128MiB */
hwctrl(&mtd, (page_addr >> 16) & 0x0f,
hwctrl(mtd, (page_addr >> 16) & 0x0f,
NAND_CTRL_ALE | NAND_CTRL_CHANGE);
#endif
hwctrl(&mtd, NAND_CMD_ERASE2, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_ERASE2, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
while (!this->dev_ready(&mtd))
while (!this->dev_ready(mtd))
;
nand_deselect();
@ -1368,10 +1368,10 @@ int spl_nand_erase_one(int block, int page)
#else
static int nand_read_page(int block, int page, void *dst)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv;
nand_command(block, page, 0, NAND_CMD_READ0);
atmel_nand_pmecc_read_page(&mtd, this, dst, 0, page);
atmel_nand_pmecc_read_page(mtd, this, dst, 0, page);
return 0;
}
@ -1438,7 +1438,7 @@ int board_nand_init(struct nand_chip *nand)
#ifdef CONFIG_ATMEL_NAND_HWECC
#ifdef CONFIG_ATMEL_NAND_HW_PMECC
ret = atmel_pmecc_nand_init_params(nand, &mtd);
ret = atmel_pmecc_nand_init_params(nand, mtd);
#endif
#endif
@ -1447,9 +1447,10 @@ int board_nand_init(struct nand_chip *nand)
void nand_init(void)
{
mtd.writesize = CONFIG_SYS_NAND_PAGE_SIZE;
mtd.oobsize = CONFIG_SYS_NAND_OOBSIZE;
mtd.priv = &nand_chip;
mtd = &nand_chip.mtd;
mtd->writesize = CONFIG_SYS_NAND_PAGE_SIZE;
mtd->oobsize = CONFIG_SYS_NAND_OOBSIZE;
mtd->priv = &nand_chip;
nand_chip.IO_ADDR_R = (void __iomem *)CONFIG_SYS_NAND_BASE;
nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
board_nand_init(&nand_chip);
@ -1462,13 +1463,13 @@ void nand_init(void)
#endif
if (nand_chip.select_chip)
nand_chip.select_chip(&mtd, 0);
nand_chip.select_chip(mtd, 0);
}
void nand_deselect(void)
{
if (nand_chip.select_chip)
nand_chip.select_chip(&mtd, -1);
nand_chip.select_chip(mtd, -1);
}
#else
@ -1482,8 +1483,8 @@ static ulong base_addr[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIST;
int atmel_nand_chip_init(int devnum, ulong base_addr)
{
int ret;
struct mtd_info *mtd = &nand_info[devnum];
struct nand_chip *nand = &nand_chip[devnum];
struct mtd_info *mtd = &nand->mtd;
mtd->priv = nand;
nand->IO_ADDR_R = nand->IO_ADDR_W = (void __iomem *)base_addr;
@ -1521,7 +1522,7 @@ int atmel_nand_chip_init(int devnum, ulong base_addr)
ret = nand_scan_tail(mtd);
if (!ret)
nand_register(devnum);
nand_register(devnum, mtd);
return ret;
}

4
drivers/mtd/nand/denali.c
Unescape View File

@ -1263,7 +1263,7 @@ static int denali_init(struct denali_nand_info *denali)
goto fail;
}
ret = nand_register(0);
ret = nand_register(0, denali->mtd);
fail:
return ret;
@ -1282,7 +1282,7 @@ static int __board_nand_init(void)
* for instantiating struct nand_chip, while drivers/mtd/nand/nand.c
* still provides a "struct mtd_info nand_info" instance.
*/
denali->mtd = &nand_info[0];
denali->mtd = &denali->nand.mtd;
/*
* In the future, these base addresses should be taken from

5
drivers/mtd/nand/fsl_elbc_nand.c
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@ -656,7 +656,7 @@ static void fsl_elbc_ctrl_init(void)
static int fsl_elbc_chip_init(int devnum, u8 *addr)
{
struct mtd_info *mtd = &nand_info[devnum];
struct mtd_info *mtd;
struct nand_chip *nand;
struct fsl_elbc_mtd *priv;
uint32_t br = 0, or = 0;
@ -697,6 +697,7 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr)
}
nand = &priv->chip;
mtd = &nand->mtd;
mtd->priv = nand;
elbc_ctrl->chips[priv->bank] = priv;
@ -787,7 +788,7 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr)
if (ret)
return ret;
ret = nand_register(devnum);
ret = nand_register(devnum, mtd);
if (ret)
return ret;

5
drivers/mtd/nand/fsl_ifc_nand.c
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@ -880,7 +880,7 @@ static int fsl_ifc_sram_init(uint32_t ver)
static int fsl_ifc_chip_init(int devnum, u8 *addr)
{
struct mtd_info *mtd = &nand_info[devnum];
struct mtd_info *mtd;
struct nand_chip *nand;
struct fsl_ifc_mtd *priv;
struct nand_ecclayout *layout;
@ -925,6 +925,7 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr)
}
nand = &priv->chip;
mtd = &nand->mtd;
mtd->priv = nand;
ifc_ctrl->chips[priv->bank] = priv;
@ -1044,7 +1045,7 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr)
if (ret)
return ret;
ret = nand_register(devnum);
ret = nand_register(devnum, mtd);
if (ret)
return ret;
return 0;

10
drivers/mtd/nand/fsmc_nand.c
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@ -409,7 +409,7 @@ int fsmc_nand_switch_ecc(uint32_t eccstrength)
* Nomadik SoC is currently supporting this fsmc_nand_switch_ecc()
* function, as it doesn't need to switch to a different ECC layout.
*/
mtd = &nand_info[nand_curr_device];
mtd = nand_info[nand_curr_device];
nand = mtd->priv;
/* Setup the ecc configurations again */
@ -443,7 +443,6 @@ int fsmc_nand_init(struct nand_chip *nand)
{
static int chip_nr;
struct mtd_info *mtd;
int i;
u32 peripid2 = readl(&fsmc_regs_p->peripid2);
fsmc_version = (peripid2 >> FSMC_REVISION_SHFT) &
@ -480,7 +479,7 @@ int fsmc_nand_init(struct nand_chip *nand)
(void __iomem *)CONFIG_SYS_NAND_BASE;
nand->badblockbits = 7;
mtd = &nand_info[chip_nr++];
mtd = &nand->mtd;
mtd->priv = nand;
switch (fsmc_version) {
@ -514,9 +513,8 @@ int fsmc_nand_init(struct nand_chip *nand)
if (nand_scan_tail(mtd))
return -ENXIO;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
if (nand_register(i))
return -ENXIO;
if (nand_register(chip_nr++, mtd))
return -ENXIO;
return 0;
}

10
drivers/mtd/nand/lpc32xx_nand_mlc.c
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@ -539,13 +539,11 @@ static struct nand_chip lpc32xx_chip;
void board_nand_init(void)
{
/* we have only one device anyway */
struct mtd_info *mtd = &nand_info[0];
/* chip is struct nand_chip, and is now provided by the driver. */
mtd->priv = &lpc32xx_chip;
/* to store return status in case we need to print it */
struct mtd_info *mtd = &lpc32xx_chip.mtd;
int ret;
mtd->priv = &lpc32xx_chip;
/* Set all BOARDSPECIFIC (actually core-specific) fields */
lpc32xx_chip.IO_ADDR_R = &lpc32xx_nand_mlc_registers->buff;
@ -597,7 +595,7 @@ void board_nand_init(void)
}
/* chip is good, register it */
ret = nand_register(0);
ret = nand_register(0, mtd);
if (ret)
error("nand_register returned %i", ret);
}

3
drivers/mtd/nand/mpc5121_nfc.c
Unescape View File

@ -549,7 +549,6 @@ int board_nand_init(struct nand_chip *chip)
int resettime = 0;
int retval = 0;
int rev;
static int chip_nr = 0;
/*
* Check SoC revision. This driver supports only NFC
@ -568,7 +567,7 @@ int board_nand_init(struct nand_chip *chip)
return -ENOMEM;
}
mtd = &nand_info[chip_nr++];
mtd = &chip->mtd;
mtd->priv = chip;
chip->priv = prv;

2
drivers/mtd/nand/mxc_nand.c
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@ -1164,7 +1164,7 @@ int board_nand_init(struct nand_chip *this)
#endif
/* structures must be linked */
mtd = &host->mtd;
mtd = &this->mtd;
mtd->priv = this;
host->nand = this;

33
drivers/mtd/nand/mxs_nand_spl.c
Unescape View File

@ -8,7 +8,7 @@
#include <nand.h>
#include <malloc.h>
static struct mtd_info mtd;
static struct mtd_info *mtd;
static struct nand_chip nand_chip;
static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
@ -147,14 +147,15 @@ static int mxs_nand_init(void)
/* init mxs nand driver */
board_nand_init(&nand_chip);
mtd.priv = &nand_chip;
mtd = &nand_chip.mtd;
mtd->priv = &nand_chip;
/* set mtd functions */
nand_chip.cmdfunc = mxs_nand_command;
nand_chip.numchips = 1;
/* identify flash device */
puts("NAND : ");
if (mxs_flash_ident(&mtd)) {
if (mxs_flash_ident(mtd)) {
printf("Failed to identify\n");
return -1;
}
@ -162,12 +163,12 @@ static int mxs_nand_init(void)
/* allocate and initialize buffers */
nand_chip.buffers = memalign(ARCH_DMA_MINALIGN,
sizeof(*nand_chip.buffers));
nand_chip.oob_poi = nand_chip.buffers->databuf + mtd.writesize;
nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize;
/* setup flash layout (does not scan as we override that) */
mtd.size = nand_chip.chipsize;
nand_chip.scan_bbt(&mtd);
mtd->size = nand_chip.chipsize;
nand_chip.scan_bbt(mtd);
printf("%llu MiB\n", (mtd.size / (1024 * 1024)));
printf("%llu MiB\n", (mtd->size / (1024 * 1024)));
return 0;
}
@ -180,20 +181,20 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
if (mxs_nand_init())
return -ENODEV;
chip = mtd.priv;
chip = mtd->priv;
page = offs >> chip->page_shift;
nand_page_per_block = mtd.erasesize / mtd.writesize;
nand_page_per_block = mtd->erasesize / mtd->writesize;
debug("%s offset:0x%08x len:%d page:%d\n", __func__, offs, size, page);
size = roundup(size, mtd.writesize);
size = roundup(size, mtd->writesize);
while (sz < size) {
if (mxs_read_page_ecc(&mtd, buf, page) < 0)
if (mxs_read_page_ecc(mtd, buf, page) < 0)
return -1;
sz += mtd.writesize;
offs += mtd.writesize;
sz += mtd->writesize;
offs += mtd->writesize;
page++;
buf += mtd.writesize;
buf += mtd->writesize;
/*
* Check if we have crossed a block boundary, and if so
@ -204,10 +205,10 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
* Yes, new block. See if this block is good. If not,
* loop until we find a good block.
*/
while (is_badblock(&mtd, offs, 1)) {
while (is_badblock(mtd, offs, 1)) {
page = page + nand_page_per_block;
/* Check i we've reached the end of flash. */
if (page >= mtd.size >> chip->page_shift)
if (page >= mtd->size >> chip->page_shift)
return -ENOMEM;
}
}

27
drivers/mtd/nand/nand.c
Unescape View File

@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
int nand_curr_device = -1;
struct mtd_info nand_info[CONFIG_SYS_MAX_NAND_DEVICE];
struct mtd_info *nand_info[CONFIG_SYS_MAX_NAND_DEVICE];
#ifndef CONFIG_SYS_NAND_SELF_INIT
static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
@ -30,15 +30,25 @@ static char dev_name[CONFIG_SYS_MAX_NAND_DEVICE][8];
static unsigned long total_nand_size; /* in kiB */
/* Register an initialized NAND mtd device with the U-Boot NAND command. */
int nand_register(int devnum)
int nand_mtd_to_devnum(struct mtd_info *mtd)
{
struct mtd_info *mtd;
int i;
for (i = 0; i < ARRAY_SIZE(nand_info); i++) {
if (mtd && nand_info[i] == mtd)
return i;
}
return -ENODEV;
}
/* Register an initialized NAND mtd device with the U-Boot NAND command. */
int nand_register(int devnum, struct mtd_info *mtd)
{
if (devnum >= CONFIG_SYS_MAX_NAND_DEVICE)
return -EINVAL;
mtd = &nand_info[devnum];
nand_info[devnum] = mtd;
sprintf(dev_name[devnum], "nand%d", devnum);
mtd->name = dev_name[devnum];
@ -62,8 +72,8 @@ int nand_register(int devnum)
#ifndef CONFIG_SYS_NAND_SELF_INIT
static void nand_init_chip(int i)
{
struct mtd_info *mtd = &nand_info[i];
struct nand_chip *nand = &nand_chip[i];
struct mtd_info *mtd = &nand->mtd;
ulong base_addr = base_address[i];
int maxchips = CONFIG_SYS_NAND_MAX_CHIPS;
@ -79,7 +89,7 @@ static void nand_init_chip(int i)
if (nand_scan(mtd, maxchips))
return;
nand_register(i);
nand_register(i, mtd);
}
#endif
@ -100,6 +110,7 @@ void nand_init(void)
/*
* Select the chip in the board/cpu specific driver
*/
board_nand_select_device(nand_info[nand_curr_device].priv, nand_curr_device);
board_nand_select_device(nand_info[nand_curr_device]->priv,
nand_curr_device);
#endif
}

85
drivers/mtd/nand/nand_spl_simple.c
Unescape View File

@ -11,7 +11,7 @@
#include <linux/mtd/nand_ecc.h>
static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
static struct mtd_info mtd;
static struct mtd_info *mtd;
static struct nand_chip nand_chip;
#define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
@ -26,32 +26,32 @@ static struct nand_chip nand_chip;
static int nand_command(int block, int page, uint32_t offs,
u8 cmd)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv();
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
while (!this->dev_ready(&mtd))
while (!this->dev_ready(mtd))
;
/* Begin command latch cycle */
this->cmd_ctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Set ALE and clear CLE to start address cycle */
/* Column address */
this->cmd_ctrl(&mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
this->cmd_ctrl(&mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
this->cmd_ctrl(&mtd, (page_addr >> 8) & 0xff,
this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
NAND_CTRL_ALE); /* A[24:17] */
#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
/* One more address cycle for devices > 32MiB */
this->cmd_ctrl(&mtd, (page_addr >> 16) & 0x0f,
this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
NAND_CTRL_ALE); /* A[28:25] */
#endif
/* Latch in address */
this->cmd_ctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
/*
* Wait a while for the data to be ready
*/
while (!this->dev_ready(&mtd))
while (!this->dev_ready(mtd))
;
return 0;
@ -63,12 +63,12 @@ static int nand_command(int block, int page, uint32_t offs,
static int nand_command(int block, int page, uint32_t offs,
u8 cmd)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv;
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
while (!this->dev_ready(&mtd))
while (!this->dev_ready(mtd))
;
/* Emulate NAND_CMD_READOOB */
@ -82,30 +82,30 @@ static int nand_command(int block, int page, uint32_t offs,
offs >>= 1;
/* Begin command latch cycle */
hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Set ALE and clear CLE to start address cycle */
/* Column address */
hwctrl(&mtd, offs & 0xff,
NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
hwctrl(mtd, offs & 0xff,
NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
/* Row address */
hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
hwctrl(&mtd, ((page_addr >> 8) & 0xff),
NAND_CTRL_ALE); /* A[27:20] */
hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
hwctrl(mtd, ((page_addr >> 8) & 0xff),
NAND_CTRL_ALE); /* A[27:20] */
#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
/* One more address cycle for devices > 128MiB */
hwctrl(&mtd, (page_addr >> 16) & 0x0f,
hwctrl(mtd, (page_addr >> 16) & 0x0f,
NAND_CTRL_ALE); /* A[31:28] */
#endif
/* Latch in address */
hwctrl(&mtd, NAND_CMD_READSTART,
NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_READSTART,
NAND_CTRL_CLE | NAND_CTRL_CHANGE);
hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
/*
* Wait a while for the data to be ready
*/
while (!this->dev_ready(&mtd))
while (!this->dev_ready(mtd))
;
return 0;
@ -114,7 +114,7 @@ static int nand_command(int block, int page, uint32_t offs,
static int nand_is_bad_block(int block)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv;
u_char bb_data[2];
nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
@ -124,11 +124,11 @@ static int nand_is_bad_block(int block)
* Read one byte (or two if it's a 16 bit chip).
*/
if (this->options & NAND_BUSWIDTH_16) {
this->read_buf(&mtd, bb_data, 2);
this->read_buf(mtd, bb_data, 2);
if (bb_data[0] != 0xff || bb_data[1] != 0xff)
return 1;
} else {
this->read_buf(&mtd, bb_data, 1);
this->read_buf(mtd, bb_data, 1);
if (bb_data[0] != 0xff)
return 1;
}
@ -139,7 +139,7 @@ static int nand_is_bad_block(int block)
#if defined(CONFIG_SYS_NAND_HW_ECC_OOBFIRST)
static int nand_read_page(int block, int page, uchar *dst)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv;
u_char ecc_calc[ECCTOTAL];
u_char ecc_code[ECCTOTAL];
u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
@ -150,7 +150,7 @@ static int nand_read_page(int block, int page, uchar *dst)
uint8_t *p = dst;
nand_command(block, page, 0, NAND_CMD_READOOB);
this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
nand_command(block, page, 0, NAND_CMD_READ0);
/* Pick the ECC bytes out of the oob data */
@ -159,10 +159,10 @@ static int nand_read_page(int block, int page, uchar *dst)
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
this->ecc.hwctl(&mtd, NAND_ECC_READ);
this->read_buf(&mtd, p, eccsize);
this->ecc.calculate(&mtd, p, &ecc_calc[i]);
this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
this->ecc.hwctl(mtd, NAND_ECC_READ);
this->read_buf(mtd, p, eccsize);
this->ecc.calculate(mtd, p, &ecc_calc[i]);
this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
}
return 0;
@ -170,7 +170,7 @@ static int nand_read_page(int block, int page, uchar *dst)
#else
static int nand_read_page(int block, int page, void *dst)
{
struct nand_chip *this = mtd.priv;
struct nand_chip *this = mtd->priv;
u_char ecc_calc[ECCTOTAL];
u_char ecc_code[ECCTOTAL];
u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
@ -184,11 +184,11 @@ static int nand_read_page(int block, int page, void *dst)
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
if (this->ecc.mode != NAND_ECC_SOFT)
this->ecc.hwctl(&mtd, NAND_ECC_READ);
this->read_buf(&mtd, p, eccsize);
this->ecc.calculate(&mtd, p, &ecc_calc[i]);
this->ecc.hwctl(mtd, NAND_ECC_READ);
this->read_buf(mtd, p, eccsize);
this->ecc.calculate(mtd, p, &ecc_calc[i]);
}
this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
/* Pick the ECC bytes out of the oob data */
for (i = 0; i < ECCTOTAL; i++)
@ -202,7 +202,7 @@ static int nand_read_page(int block, int page, void *dst)
* from correct_data(). We just hope that all possible errors
* are corrected by this routine.
*/
this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
}
return 0;
@ -249,7 +249,8 @@ void nand_init(void)
/*
* Init board specific nand support
*/
mtd.priv = &nand_chip;
mtd = &nand_chip.mtd;
mtd->priv = &nand_chip;
nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
(void __iomem *)CONFIG_SYS_NAND_BASE;
board_nand_init(&nand_chip);
@ -262,12 +263,12 @@ void nand_init(void)
#endif
if (nand_chip.select_chip)
nand_chip.select_chip(&mtd, 0);
nand_chip.select_chip(mtd, 0);
}
/* Unselect after operation */
void nand_deselect(void)
{
if (nand_chip.select_chip)
nand_chip.select_chip(&mtd, -1);
nand_chip.select_chip(mtd, -1);
}

4
drivers/mtd/nand/omap_gpmc.c
Unescape View File

@ -898,12 +898,12 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength)
if (nand_curr_device < 0 ||
nand_curr_device >= CONFIG_SYS_MAX_NAND_DEVICE ||
!nand_info[nand_curr_device].name) {
!nand_info[nand_curr_device]->name) {
printf("nand: error: no NAND devices found\n");
return -ENODEV;
}
mtd = &nand_info[nand_curr_device];
mtd = nand_info[nand_curr_device];
nand = mtd->priv;
nand->options |= NAND_OWN_BUFFERS;
nand->options &= ~NAND_SUBPAGE_READ;

10
drivers/mtd/nand/pxa3xx_nand.c
Unescape View File

@ -1477,9 +1477,9 @@ static int alloc_nand_resource(struct pxa3xx_nand_info *info)
info->variant = pxa3xx_nand_get_variant();
for (cs = 0; cs < pdata->num_cs; cs++) {
mtd = &nand_info[cs];
chip = (struct nand_chip *)
((u8 *)&info[1] + sizeof(*host) * cs);
mtd = &chip->mtd;
host = (struct pxa3xx_nand_host *)chip;
info->host[cs] = host;
host->mtd = mtd;
@ -1573,8 +1573,10 @@ static int pxa3xx_nand_probe(struct pxa3xx_nand_info *info)
continue;
}
if (!ret)
probe_success = 1;
if (nand_register(cs, mtd))
continue;
probe_success = 1;
}
if (!probe_success)
@ -1601,6 +1603,4 @@ void board_nand_init(void)
ret = pxa3xx_nand_probe(info);
if (ret)
return;
nand_register(0);
}

4
drivers/mtd/nand/tegra_nand.c
Unescape View File

@ -976,7 +976,7 @@ int tegra_nand_init(struct nand_chip *nand, int devnum)
dm_gpio_set_value(&config->wp_gpio, 1);
our_mtd = &nand_info[devnum];
our_mtd = &nand->mtd;
our_mtd->priv = nand;
ret = nand_scan_ident(our_mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL);
if (ret)
@ -989,7 +989,7 @@ int tegra_nand_init(struct nand_chip *nand, int devnum)
if (ret)
return ret;
ret = nand_register(devnum);
ret = nand_register(devnum, our_mtd);
if (ret)
return ret;

5
drivers/mtd/nand/vf610_nfc.c
Unescape View File

@ -630,7 +630,7 @@ struct vf610_nfc_config {
static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
{
struct mtd_info *mtd = &nand_info[devnum];
struct mtd_info *mtd;
struct nand_chip *chip;
struct vf610_nfc *nfc;
int err = 0;
@ -653,6 +653,7 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
chip = &nfc->chip;
nfc->regs = addr;
mtd = &chip->mtd;
mtd->priv = chip;
chip->priv = nfc;
@ -753,7 +754,7 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
if (err)
return err;
err = nand_register(devnum);
err = nand_register(devnum, mtd);
if (err)
return err;

2
drivers/net/fm/fm.c
Unescape View File

@ -360,7 +360,7 @@ int fm_init_common(int index, struct ccsr_fman *reg)
size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_FMAN_FW_ADDR,
rc = nand_read(nand_info[0], (loff_t)CONFIG_SYS_FMAN_FW_ADDR,
&fw_length, (u_char *)addr);
if (rc == -EUCLEAN) {
printf("NAND read of FMAN firmware at offset 0x%x failed %d\n",

4
drivers/net/phy/cortina.c
Unescape View File

@ -139,8 +139,8 @@ void cs4340_upload_firmware(struct phy_device *phydev)
size_t fw_length = CONFIG_CORTINA_FW_LENGTH;
addr = malloc(CONFIG_CORTINA_FW_LENGTH);
ret = nand_read(&nand_info[0], (loff_t)CONFIG_CORTINA_FW_ADDR,
&fw_length, (u_char *)addr);
ret = nand_read(nand_info[0], (loff_t)CONFIG_CORTINA_FW_ADDR,
&fw_length, (u_char *)addr);
if (ret == -EUCLEAN) {
printf("NAND read of Cortina firmware at 0x%x failed %d\n",
CONFIG_CORTINA_FW_ADDR, ret);

2
fs/jffs2/jffs2_1pass.c
Unescape View File

@ -195,7 +195,7 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf)
}
retlen = NAND_CACHE_SIZE;
if (nand_read(&nand_info[id->num], nand_cache_off,
if (nand_read(nand_info[id->num], nand_cache_off,
&retlen, nand_cache) != 0 ||
retlen != NAND_CACHE_SIZE) {
printf("read_nand_cached: error reading nand off %#x size %d bytes\n",

2
fs/jffs2/jffs2_nand_1pass.c
Unescape View File

@ -796,7 +796,7 @@ jffs2_1pass_build_lists(struct part_info * part)
u32 counterN = 0;
struct mtdids *id = part->dev->id;
mtd = nand_info + id->num;
mtd = nand_info[id->num];
/* if we are building a list we need to refresh the cache. */
jffs_init_1pass_list(part);

8
fs/yaffs2/yaffs_uboot_glue.c
Unescape View File

@ -141,8 +141,6 @@ static const char *yaffs_error_str(void)
}
}
extern struct mtd_info nand_info[];
void cmd_yaffs_tracemask(unsigned set, unsigned mask)
{
if (set)
@ -171,7 +169,7 @@ void cmd_yaffs_devconfig(char *_mp, int flash_dev,
dev = calloc(1, sizeof(*dev));
mp = strdup(_mp);
mtd = &nand_info[flash_dev];
mtd = nand_info[flash_dev];
if (!dev || !mp) {
/* Alloc error */
@ -260,9 +258,7 @@ void cmd_yaffs_dev_ls(void)
dev = yaffs_next_dev();
if (!dev)
return;
flash_dev =
((unsigned) dev->driver_context - (unsigned) nand_info)/
sizeof(nand_info[0]);
flash_dev = nand_mtd_to_devnum(dev->driver_context);
printf("%-10s %5d 0x%05x 0x%05x %s",
dev->param.name, flash_dev,
dev->param.start_block, dev->param.end_block,

1
include/linux/mtd/nand.h
Unescape View File

@ -659,6 +659,7 @@ struct nand_buffers {
*/
struct nand_chip {
struct mtd_info mtd;
void __iomem *IO_ADDR_R;
void __iomem *IO_ADDR_W;

6
include/nand.h
Unescape View File

@ -33,15 +33,17 @@ extern void nand_init(void);
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
int nand_mtd_to_devnum(struct mtd_info *mtd);
#ifdef CONFIG_SYS_NAND_SELF_INIT
void board_nand_init(void);
int nand_register(int devnum);
int nand_register(int devnum, struct mtd_info *mtd);
#else
extern int board_nand_init(struct nand_chip *nand);
#endif
extern int nand_curr_device;
extern struct mtd_info nand_info[];
extern struct mtd_info *nand_info[];
static inline int nand_read(struct mtd_info *info, loff_t ofs, size_t *len,
u_char *buf)

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