RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width. This patch is only used for U-Boot, but not for SPL which will comes later, maybe after we merge all the common code into a common file. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>master
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/*
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd. |
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* |
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* SPDX-License-Identifier: GPL-2.0 |
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*/ |
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#include <common.h> |
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#include <dm.h> |
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#include <ram.h> |
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#include <syscon.h> |
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#include <asm/arch/clock.h> |
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#include <asm/arch/grf_rk3128.h> |
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#include <asm/arch/sdram_common.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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struct dram_info { |
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struct ram_info info; |
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struct rk3128_grf *grf; |
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}; |
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static int rk3128_dmc_probe(struct udevice *dev) |
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{ |
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struct dram_info *priv = dev_get_priv(dev); |
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priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); |
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debug("%s: grf=%p\n", __func__, priv->grf); |
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priv->info.base = CONFIG_SYS_SDRAM_BASE; |
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priv->info.size = rockchip_sdram_size( |
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(phys_addr_t)&priv->grf->os_reg[1]); |
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return 0; |
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} |
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static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info) |
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{ |
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struct dram_info *priv = dev_get_priv(dev); |
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*info = priv->info; |
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return 0; |
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} |
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static struct ram_ops rk3128_dmc_ops = { |
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.get_info = rk3128_dmc_get_info, |
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}; |
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static const struct udevice_id rk3128_dmc_ids[] = { |
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{ .compatible = "rockchip,rk3128-dmc" }, |
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{ } |
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}; |
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U_BOOT_DRIVER(dmc_rk3128) = { |
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.name = "rockchip_rk3128_dmc", |
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.id = UCLASS_RAM, |
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.of_match = rk3128_dmc_ids, |
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.ops = &rk3128_dmc_ops, |
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.probe = rk3128_dmc_probe, |
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.priv_auto_alloc_size = sizeof(struct dram_info), |
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}; |
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