This is the generic phy driver for the picoPHY ports used by USB2/1.1 controllers. It is found on STiH407 SoC family from STMicroelectronics. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>master
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ST STiH407 USB PHY controller |
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This file documents the dt bindings for the usb picoPHY driver which is the PHY for both USB2 and USB3 |
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host controllers (when controlling usb2/1.1 devices) available on STiH407 SoC family from STMicroelectronics. |
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Required properties: |
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- compatible : should be "st,stih407-usb2-phy" |
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- st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl register offsets |
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- resets : list of phandle and reset specifier pairs. There should be two entries, one |
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for the whole phy and one for the port |
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- reset-names : list of reset signal names. Should be "global" and "port" |
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See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt |
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See: Documentation/devicetree/bindings/reset/reset.txt |
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Example: |
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usb2_picophy0: usbpicophy { |
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compatible = "st,stih407-usb2-phy"; |
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#phy-cells = <0>; |
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st,syscfg = <&syscfg_core 0x100 0xf4>; |
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resets = <&softreset STIH407_PICOPHY_SOFTRESET>, |
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<&picophyreset STIH407_PICOPHY0_RESET>; |
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reset-names = "global", "port"; |
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}; |
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/*
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* Copyright (c) 2017 |
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* Patrice Chotard <patrice.chotard@st.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <bitfield.h> |
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#include <dm.h> |
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#include <errno.h> |
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#include <fdtdec.h> |
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#include <generic-phy.h> |
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#include <libfdt.h> |
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#include <regmap.h> |
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#include <reset-uclass.h> |
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#include <syscon.h> |
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#include <wait_bit.h> |
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#include <linux/bitops.h> |
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#include <linux/compat.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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/* Default PHY_SEL and REFCLKSEL configuration */ |
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#define STIH407_USB_PICOPHY_CTRL_PORT_CONF 0x6 |
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/* ports parameters overriding */ |
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#define STIH407_USB_PICOPHY_PARAM_DEF 0x39a4dc |
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#define PHYPARAM_REG 1 |
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#define PHYCTRL_REG 2 |
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#define PHYPARAM_NB 3 |
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struct sti_usb_phy { |
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struct regmap *regmap; |
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struct reset_ctl global_ctl; |
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struct reset_ctl port_ctl; |
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int param; |
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int ctrl; |
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}; |
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static int sti_usb_phy_deassert(struct sti_usb_phy *phy) |
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{ |
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int ret; |
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ret = reset_deassert(&phy->global_ctl); |
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if (ret < 0) { |
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error("PHY global deassert failed: %d", ret); |
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return ret; |
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} |
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ret = reset_deassert(&phy->port_ctl); |
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if (ret < 0) |
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error("PHY port deassert failed: %d", ret); |
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return ret; |
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} |
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static int sti_usb_phy_init(struct phy *usb_phy) |
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{ |
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struct udevice *dev = usb_phy->dev; |
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struct sti_usb_phy *phy = dev_get_priv(dev); |
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void __iomem *reg; |
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/* set ctrl picophy value */ |
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reg = (void __iomem *)phy->regmap->base + phy->ctrl; |
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/* CTRL_PORT mask is 0x1f */ |
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clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF); |
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/* set ports parameters overriding */ |
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reg = (void __iomem *)phy->regmap->base + phy->param; |
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/* PARAM_DEF mask is 0xffffffff */ |
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clrsetbits_le32(reg, 0xffffffff, STIH407_USB_PICOPHY_PARAM_DEF); |
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return sti_usb_phy_deassert(phy); |
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} |
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static int sti_usb_phy_exit(struct phy *usb_phy) |
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{ |
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struct udevice *dev = usb_phy->dev; |
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struct sti_usb_phy *phy = dev_get_priv(dev); |
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int ret; |
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ret = reset_assert(&phy->port_ctl); |
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if (ret < 0) { |
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error("PHY port assert failed: %d", ret); |
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return ret; |
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} |
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ret = reset_assert(&phy->global_ctl); |
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if (ret < 0) |
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error("PHY global assert failed: %d", ret); |
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return ret; |
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} |
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struct phy_ops sti_usb_phy_ops = { |
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.init = sti_usb_phy_init, |
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.exit = sti_usb_phy_exit, |
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}; |
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int sti_usb_phy_probe(struct udevice *dev) |
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{ |
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struct sti_usb_phy *priv = dev_get_priv(dev); |
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struct udevice *syscon; |
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struct ofnode_phandle_args syscfg_phandle; |
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u32 cells[PHYPARAM_NB]; |
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int ret, count; |
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/* get corresponding syscon phandle */ |
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ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, |
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&syscfg_phandle); |
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if (ret < 0) { |
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error("Can't get syscfg phandle: %d\n", ret); |
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return ret; |
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} |
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ret = uclass_get_device_by_ofnode(UCLASS_SYSCON, syscfg_phandle.node, |
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&syscon); |
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if (ret) { |
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error("unable to find syscon device (%d)\n", ret); |
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return ret; |
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} |
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priv->regmap = syscon_get_regmap(syscon); |
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if (!priv->regmap) { |
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error("unable to find regmap\n"); |
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return -ENODEV; |
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} |
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/* get phy param offset */ |
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count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev), |
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"st,syscfg", cells, |
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ARRAY_SIZE(cells)); |
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if (count < 0) { |
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error("Bad PHY st,syscfg property %d\n", count); |
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return -EINVAL; |
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} |
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if (count > PHYPARAM_NB) { |
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error("Unsupported PHY param count %d\n", count); |
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return -EINVAL; |
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} |
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priv->param = cells[PHYPARAM_REG]; |
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priv->ctrl = cells[PHYCTRL_REG]; |
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/* get global reset control */ |
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ret = reset_get_by_name(dev, "global", &priv->global_ctl); |
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if (ret) { |
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error("can't get global reset for %s (%d)", dev->name, ret); |
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return ret; |
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} |
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/* get port reset control */ |
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ret = reset_get_by_name(dev, "port", &priv->port_ctl); |
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if (ret) { |
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error("can't get port reset for %s (%d)", dev->name, ret); |
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return ret; |
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} |
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return 0; |
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} |
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static const struct udevice_id sti_usb_phy_ids[] = { |
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{ .compatible = "st,stih407-usb2-phy" }, |
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{ } |
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}; |
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U_BOOT_DRIVER(sti_usb_phy) = { |
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.name = "sti_usb_phy", |
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.id = UCLASS_PHY, |
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.of_match = sti_usb_phy_ids, |
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.probe = sti_usb_phy_probe, |
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.ops = &sti_usb_phy_ops, |
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.priv_auto_alloc_size = sizeof(struct sti_usb_phy), |
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}; |
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