Xilinx changes for v2018.11

- Handle BOARD_LATE_INIT via Kconfig
 
 SPL:
 - Enable GZIP for all partitions types(not only for kernel)
 
 ZynqMP:
 - Rearrange pmufw version handling
 - Support newer PMUFW with improved fpga load sequence
 
 Zynq:
 - Cleanup config file
 - Simplify zybo config by enabling option via Kconfig
 
 net:
 - Fix gems max-speed property reading
 - Enable support for fixed-link phys
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAluss3IACgkQykllyylKDCFQWwCfc7bvoUN1vevGYTfcG2cEYSF5
 IxQAoI/10FGWJS6rgTG0IVFvoSI1ALhA
 =Q/Tg
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2018.11' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.11

- Handle BOARD_LATE_INIT via Kconfig

SPL:
- Enable GZIP for all partitions types(not only for kernel)

ZynqMP:
- Rearrange pmufw version handling
- Support newer PMUFW with improved fpga load sequence

Zynq:
- Cleanup config file
- Simplify zybo config by enabling option via Kconfig

net:
- Fix gems max-speed property reading
- Enable support for fixed-link phys
lime2-spi
Tom Rini 6 years ago
commit bbef20d479
  1. 4
      arch/arm/Kconfig
  2. 40
      arch/arm/cpu/armv8/zynqmp/cpu.c
  3. 17
      arch/arm/include/asm/arch-zynqmp/sys_proto.h
  4. 11
      board/xilinx/zynqmp/zynqmp.c
  5. 2
      common/Kconfig
  6. 5
      common/spl/spl_fit.c
  7. 1
      configs/xilinx_zynqmp_mini_emmc0_defconfig
  8. 1
      configs/xilinx_zynqmp_mini_emmc1_defconfig
  9. 1
      configs/xilinx_zynqmp_mini_nand_defconfig
  10. 1
      configs/xilinx_zynqmp_mini_qspi_defconfig
  11. 1
      configs/zynq_cse_nand_defconfig
  12. 1
      configs/zynq_cse_nor_defconfig
  13. 1
      configs/zynq_cse_qspi_defconfig
  14. 1
      configs/zynq_zybo_defconfig
  15. 35
      drivers/fpga/zynqmppl.c
  16. 16
      drivers/net/zynq_gem.c
  17. 1
      include/configs/xilinx_zynqmp_mini.h
  18. 8
      include/configs/zynq-common.h
  19. 1
      include/configs/zynq_cse.h
  20. 2
      include/configs/zynq_zybo.h

@ -863,7 +863,6 @@ config ARCH_VF610
config ARCH_ZYNQ
bool "Xilinx Zynq based platform"
select BOARD_EARLY_INIT_F if WDT
select BOARD_LATE_INIT
select CLK
select CLK_ZYNQ
select CPU_V7A
@ -883,6 +882,7 @@ config ARCH_ZYNQ
select SPL_SEPARATE_BSS if SPL
select SUPPORT_SPL
imply ARCH_EARLY_INIT_R
imply BOARD_LATE_INIT
imply CMD_CLK
imply CMD_DM
imply CMD_SPL
@ -900,7 +900,6 @@ config ARCH_ZYNQMP_R5
config ARCH_ZYNQMP
bool "Xilinx ZynqMP based platform"
select ARM64
select BOARD_LATE_INIT
select CLK
select DM
select DM_SERIAL
@ -909,6 +908,7 @@ config ARCH_ZYNQMP
select SPL_BOARD_INIT if SPL
select SPL_CLK if SPL
select SUPPORT_SPL
imply BOARD_LATE_INIT
imply CMD_DM
imply FAT_WRITE

@ -171,38 +171,28 @@ int __maybe_unused invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2,
return regs.regs[0];
}
#define ZYNQMP_SIP_SVC_GET_API_VERSION 0xC2000001
#define ZYNQMP_PM_VERSION_MAJOR 1
#define ZYNQMP_PM_VERSION_MINOR 0
#define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16
#define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF
#define ZYNQMP_PM_VERSION \
((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \
ZYNQMP_PM_VERSION_MINOR)
#if defined(CONFIG_CLK_ZYNQMP)
void zynqmp_pmufw_version(void)
unsigned int zynqmp_pmufw_version(void)
{
int ret;
u32 ret_payload[PAYLOAD_ARG_CNT];
u32 pm_api_version;
ret = invoke_smc(ZYNQMP_SIP_SVC_GET_API_VERSION, 0, 0, 0, 0,
ret_payload);
pm_api_version = ret_payload[1];
static u32 pm_api_version = ZYNQMP_PM_VERSION_INVALID;
if (ret)
panic("PMUFW is not found - Please load it!\n");
/*
* Get PMU version only once and later
* just return stored values instead of
* asking PMUFW again.
*/
if (pm_api_version == ZYNQMP_PM_VERSION_INVALID) {
ret = invoke_smc(ZYNQMP_SIP_SVC_GET_API_VERSION, 0, 0, 0, 0,
ret_payload);
pm_api_version = ret_payload[1];
printf("PMUFW:\tv%d.%d\n",
pm_api_version >> ZYNQMP_PM_VERSION_MAJOR_SHIFT,
pm_api_version & ZYNQMP_PM_VERSION_MINOR_MASK);
if (ret)
panic("PMUFW is not found - Please load it!\n");
}
if (pm_api_version < ZYNQMP_PM_VERSION)
panic("PMUFW version error. Expected: v%d.%d\n",
ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR);
return pm_api_version;
}
#endif

@ -21,6 +21,21 @@
#define ZYNQMP_FPGA_AUTH_DDR 1
#define ZYNQMP_SIP_SVC_GET_API_VERSION 0xC2000001
#define ZYNQMP_PM_VERSION_MAJOR 1
#define ZYNQMP_PM_VERSION_MINOR 0
#define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16
#define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF
#define ZYNQMP_PM_VERSION \
((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \
ZYNQMP_PM_VERSION_MINOR)
#define ZYNQMP_PM_VERSION_INVALID ~0
#define PMUFW_V1_0 ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
enum {
IDCODE,
VERSION,
@ -44,7 +59,7 @@ unsigned int zynqmp_get_silicon_version(void);
void handoff_setup(void);
void zynqmp_pmufw_version(void);
unsigned int zynqmp_pmufw_version(void);
int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value);
int zynqmp_mmio_read(const u32 address, u32 *value);
int invoke_smc(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3,

@ -281,7 +281,16 @@ int board_early_init_f(void)
{
int ret = 0;
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_CLK_ZYNQMP)
zynqmp_pmufw_version();
u32 pm_api_version;
pm_api_version = zynqmp_pmufw_version();
printf("PMUFW:\tv%d.%d\n",
pm_api_version >> ZYNQMP_PM_VERSION_MAJOR_SHIFT,
pm_api_version & ZYNQMP_PM_VERSION_MINOR_MASK);
if (pm_api_version < ZYNQMP_PM_VERSION)
panic("PMUFW version error. Expected: v%d.%d\n",
ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR);
#endif
#if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED)

@ -557,7 +557,7 @@ config VERSION_VARIABLE
next reset.
config BOARD_LATE_INIT
bool
bool "Execute Board late init"
help
Sometimes board require some initialization code that might
require once the actual init done, example saving board specific env,

@ -257,10 +257,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
board_fit_image_post_process(&src, &length);
#endif
if (IS_ENABLED(CONFIG_SPL_OS_BOOT) &&
IS_ENABLED(CONFIG_SPL_GZIP) &&
image_comp == IH_COMP_GZIP &&
type == IH_TYPE_KERNEL) {
if (IS_ENABLED(CONFIG_SPL_GZIP) && image_comp == IH_COMP_GZIP) {
size = length;
if (gunzip((void *)load_addr, CONFIG_SYS_BOOTM_LEN,
src, &size)) {

@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_FIT=y
CONFIG_BOOTDELAY=-1
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_CMDLINE_EDITING is not set

@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_FIT=y
CONFIG_BOOTDELAY=-1
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_CMDLINE_EDITING is not set

@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_FIT=y
CONFIG_BOOTDELAY=-1
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
# CONFIG_CMDLINE_EDITING is not set

@ -9,6 +9,7 @@ CONFIG_ZYNQMP_NO_DDR=y
CONFIG_NR_DRAM_BANKS=1
# CONFIG_IMAGE_FORMAT_LEGACY is not set
CONFIG_BOOTDELAY=-1
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set

@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x190
CONFIG_SPL=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SYS_MALLOC_LEN=0x1000
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
CONFIG_SYS_PROMPT="Zynq> "

@ -7,6 +7,7 @@ CONFIG_SPL=y
CONFIG_SPL_STACK_R_ADDR=0x200000
CONFIG_SYS_MALLOC_LEN=0x1000
CONFIG_BOOTDELAY=-1
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_STACK_R=y
CONFIG_SYS_PROMPT="Zynq> "

@ -15,6 +15,7 @@ CONFIG_DISTRO_DEFAULTS=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTDELAY=-1
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_BOARD_LATE_INIT is not set
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_SPL_STACK_R=y

@ -72,3 +72,4 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_USB_FUNCTION_THOR=y
CONFIG_DISPLAY=y

@ -150,7 +150,8 @@ static ulong zynqmp_align_dma_buffer(u32 *buf, u32 len, u32 swap)
new_buf[i] = load_word(&buf[i], swap);
buf = new_buf;
} else if (swap != SWAP_DONE) {
} else if ((swap != SWAP_DONE) &&
(zynqmp_pmufw_version() <= PMUFW_V1_0)) {
/* For bitstream which are aligned */
u32 *new_buf = (u32 *)buf;
@ -196,27 +197,41 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
bitstream_type bstype)
{
ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
u32 swap;
u32 swap = 0;
ulong bin_buf;
int ret;
u32 buf_lo, buf_hi;
u32 ret_payload[PAYLOAD_ARG_CNT];
if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap))
return FPGA_FAIL;
bool xilfpga_old = false;
if (zynqmp_pmufw_version() <= PMUFW_V1_0) {
puts("WARN: PMUFW v1.0 or less is detected\n");
puts("WARN: Not all bitstream formats are supported\n");
puts("WARN: Please upgrade PMUFW\n");
xilfpga_old = true;
if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap))
return FPGA_FAIL;
bsizeptr = (u32 *)&bsize;
flush_dcache_range((ulong)bsizeptr,
(ulong)bsizeptr + sizeof(size_t));
bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
}
bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
bsizeptr = (u32 *)&bsize;
debug("%s called!\n", __func__);
flush_dcache_range(bin_buf, bin_buf + bsize);
flush_dcache_range((ulong)bsizeptr, (ulong)bsizeptr + sizeof(size_t));
buf_lo = (u32)bin_buf;
buf_hi = upper_32_bits(bin_buf);
bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi,
(u32)(uintptr_t)bsizeptr, bstype, ret_payload);
if (xilfpga_old)
ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi,
(u32)(uintptr_t)bsizeptr, bstype, ret_payload);
else
ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo, buf_hi,
(u32)bsize, 0, ret_payload);
if (ret)
debug("PL FPGA LOAD fail\n");

@ -699,14 +699,17 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev)
/* Hardcode for now */
priv->phyaddr = -1;
if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
&phandle_args)) {
debug("phy-handle does not exist %s\n", dev->name);
return -ENOENT;
if (!dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
&phandle_args)) {
debug("phy-handle does exist %s\n", dev->name);
priv->phyaddr = ofnode_read_u32_default(phandle_args.node,
"reg", -1);
priv->phy_of_node = phandle_args.node;
priv->max_speed = ofnode_read_u32_default(phandle_args.node,
"max-speed",
SPEED_1000);
}
priv->phyaddr = ofnode_read_u32_default(phandle_args.node, "reg", -1);
priv->phy_of_node = phandle_args.node;
phy_mode = dev_read_prop(dev, "phy-mode", NULL);
if (phy_mode)
pdata->phy_interface = phy_get_interface_by_name(phy_mode);
@ -716,7 +719,6 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev)
}
priv->interface = pdata->phy_interface;
priv->max_speed = dev_read_u32_default(dev, "max-speed", SPEED_1000);
priv->int_pcs = dev_read_bool(dev, "is-internal-pcspma");
printf("ZYNQ GEM: %lx, phyaddr %x, interface %s\n", (ulong)priv->iobase,

@ -24,7 +24,6 @@
#undef CONFIG_BOOTM_NETBSD
#undef CONFIG_BOOTM_VXWORKS
#undef CONFIG_BOOTM_LINUX
#undef CONFIG_BOARD_LATE_INIT
/* BOOTP options */
#undef CONFIG_BOOTP_BOOTFILESIZE

@ -127,8 +127,6 @@
/* Boot configuration */
#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
/* Distro boot enablement */
#ifdef CONFIG_SPL_BUILD
#define BOOTENV
#else
@ -244,10 +242,6 @@
#define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
/* Commands */
/* SPL part */
/* MMC support */
#ifdef CONFIG_MMC_SDHCI_ZYNQ
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
@ -279,8 +273,6 @@
CONFIG_SYS_SPI_ARGS_SIZE)
#endif
/* for booting directly linux */
/* SP location before relocation, must use scratch RAM */
#define CONFIG_SPL_TEXT_BASE 0x0

@ -17,7 +17,6 @@
/* Undef unneeded configs */
#undef CONFIG_EXTRA_ENV_SETTINGS
#undef CONFIG_BOARD_LATE_INIT
#undef CONFIG_ZLIB
#undef CONFIG_GZIP

@ -12,8 +12,6 @@
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x50
#define CONFIG_DISPLAY
#define CONFIG_I2C_EDID
#include <configs/zynq-common.h>

Loading…
Cancel
Save