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6 changed files with
25 additions and
60 deletions
README
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
board/freescale/ls2080a/ls2080a.c
board/freescale/ls2080aqds/ls2080aqds.c
board/freescale/ls2080ardb/ls2080ardb.c
include/configs/ls2080a_common.h
@ -5056,8 +5056,8 @@ This firmware often needs to be loaded during U-Boot booting.
- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE
Define minimum DDR size required for debug server image
- CONFIG_SYS_MEM_TOP_HIDE_MI N
Define minimum DDR size to be hided from top of the DDR memory
- CONFIG_SYS_MC_RSV_MEM_ALIG N
Define alignment of reserved memory MC requires
Reproducible builds
-------------------
@ -636,3 +636,24 @@ void reset_cpu(ulong addr)
val | = 0x02 ;
scfg_out32 ( rstcr , val ) ;
}
phys_size_t board_reserve_ram_top ( phys_size_t ram_size )
{
phys_size_t ram_top = ram_size ;
# ifdef CONFIG_SYS_MEM_TOP_HIDE
# error CONFIG_SYS_MEM_TOP_HIDE not to be used together with this function
# endif
/* Carve the Debug Server private DRAM block from the end of DRAM */
# ifdef CONFIG_FSL_DEBUG_SERVER
ram_top - = debug_server_get_dram_block_size ( ) ;
# endif
/* Carve the MC private DRAM block from the end of DRAM */
# ifdef CONFIG_FSL_MC_ENET
ram_top - = mc_get_dram_block_size ( ) ;
ram_top & = ~ ( CONFIG_SYS_MC_RSV_MEM_ALIGN - 1 ) ;
# endif
return ram_top ;
}
@ -68,23 +68,6 @@ int arch_misc_init(void)
}
# endif
unsigned long get_dram_size_to_hide ( void )
{
unsigned long dram_to_hide = 0 ;
/* Carve the Debug Server private DRAM block from the end of DRAM */
# ifdef CONFIG_FSL_DEBUG_SERVER
dram_to_hide + = debug_server_get_dram_block_size ( ) ;
# endif
/* Carve the MC private DRAM block from the end of DRAM */
# ifdef CONFIG_FSL_MC_ENET
dram_to_hide + = mc_get_dram_block_size ( ) ;
# endif
return roundup ( dram_to_hide , CONFIG_SYS_MEM_TOP_HIDE_MIN ) ;
}
int board_eth_init ( bd_t * bis )
{
int error = 0 ;
@ -253,23 +253,6 @@ int arch_misc_init(void)
}
# endif
unsigned long get_dram_size_to_hide ( void )
{
unsigned long dram_to_hide = 0 ;
/* Carve the Debug Server private DRAM block from the end of DRAM */
# ifdef CONFIG_FSL_DEBUG_SERVER
dram_to_hide + = debug_server_get_dram_block_size ( ) ;
# endif
/* Carve the MC private DRAM block from the end of DRAM */
# ifdef CONFIG_FSL_MC_ENET
dram_to_hide + = mc_get_dram_block_size ( ) ;
# endif
return roundup ( dram_to_hide , CONFIG_SYS_MEM_TOP_HIDE_MIN ) ;
}
# ifdef CONFIG_FSL_MC_ENET
void fdt_fixup_board_enet ( void * fdt )
{
@ -219,23 +219,6 @@ int arch_misc_init(void)
}
# endif
unsigned long get_dram_size_to_hide ( void )
{
unsigned long dram_to_hide = 0 ;
/* Carve the Debug Server private DRAM block from the end of DRAM */
# ifdef CONFIG_FSL_DEBUG_SERVER
dram_to_hide + = debug_server_get_dram_block_size ( ) ;
# endif
/* Carve the MC private DRAM block from the end of DRAM */
# ifdef CONFIG_FSL_MC_ENET
dram_to_hide + = mc_get_dram_block_size ( ) ;
# endif
return roundup ( dram_to_hide , CONFIG_SYS_MEM_TOP_HIDE_MIN ) ;
}
# ifdef CONFIG_FSL_MC_ENET
void fdt_fixup_board_enet ( void * fdt )
{
@ -195,10 +195,9 @@ unsigned long long get_qixis_addr(void);
* 512 MB aligned , so the min size to hide is 512 MB .
*/
# if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER)
# define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (256 UL * 1024 * 1024)
# define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (254 UL * 1024 * 1024)
# define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (256UL * 1024 * 1024)
# define CONFIG_SYS_MEM_TOP_HIDE_MIN (512UL * 1024 * 1024)
# define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide()
# define CONFIG_SYS_MC_RSV_MEM_ALIGN (512UL * 1024 * 1024)
# endif
/* PCIe */
@ -290,10 +289,6 @@ unsigned long long get_qixis_addr(void);
# define CONFIG_AUTO_COMPLETE
# define CONFIG_SYS_MAXARGS 64 /* max command args */
# ifndef __ASSEMBLY__
unsigned long get_dram_size_to_hide ( void ) ;
# endif
# define CONFIG_PANIC_HANG /* do not reset board on panic */
# define CONFIG_SPL_BSS_START_ADDR 0x80100000