Say good bye to some ancient, very broken and unused code. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>master
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These are brief instructions on how to add support for CF adapters to |
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custom designed PXA boards. You need to set the parameters in the |
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config file. This should work for most implementations especially if you |
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follow the connections of the standard lubbock. Anyway just the block |
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marked memory configuration should be touched since the other parameters |
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are imposed by the PXA architecture. |
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EDIT 2010-07-01: in common/cmd_ide.c, having CONFIG_PXA_PCMCIA defined |
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would cause looping on inw()/outw() rather than using insw()/outsw(), |
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thus making sure IDE / ATA bytes are properly swapped. This behaviour |
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is now controlled by CONFIG_IDE_SWAP_IO, therefore PXA boards with |
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PCMCIA should #define CONFIG_IDE_SWAP_IO. |
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#define CONFIG_IDE_SWAP_IO |
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#define CONFIG_PXA_PCMCIA 1 |
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#define CONFIG_PXA_IDE 1 |
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#define CONFIG_PCMCIA_SLOT_A 1 |
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/* just to keep build system happy */ |
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#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x28000000 |
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#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x10000000 |
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#define CONFIG_SYS_MECR_VAL 0x00000000 |
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#define CONFIG_SYS_MCMEM0_VAL 0x00004204 |
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#define CONFIG_SYS_MCMEM1_VAL 0x00000000 |
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#define CONFIG_SYS_MCATT0_VAL 0x00010504 |
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#define CONFIG_SYS_MCATT1_VAL 0x00000000 |
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#define CONFIG_SYS_MCIO0_VAL 0x00008407 |
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#define CONFIG_SYS_MCIO1_VAL 0x00000000 |
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/* memory configuration */ |
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#define CONFIG_SYS_IDE_MAXBUS 1 |
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/* max. 1 IDE bus */ |
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#define CONFIG_SYS_IDE_MAXDEVICE 1 |
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/* max. 1 drive per IDE bus */ |
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#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 |
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#define CONFIG_SYS_ATA_BASE_ADDR 0x20000000 |
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/* Offset for data I/O */ |
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#define CONFIG_SYS_ATA_DATA_OFFSET 0x1f0 |
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/* Offset for normal register accesses */ |
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#define CONFIG_SYS_ATA_REG_OFFSET 0x1f0 |
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/* Offset for alternate registers */ |
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#define CONFIG_SYS_ATA_ALT_OFFSET 0x3f0 |
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Another important point is that maybe you have to power the pcmcia |
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subsystem. This is very board specific, for an example on how to |
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do it please search for CONFIG_EXADRON1 in cmd_pcmcia.c |
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#include <common.h> |
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#include <config.h> |
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#include <pcmcia.h> |
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#include <asm/arch/pxa-regs.h> |
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#include <asm/io.h> |
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static inline void msWait(unsigned msVal) |
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{ |
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udelay(msVal*1000); |
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} |
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int pcmcia_on (void) |
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{ |
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unsigned int reg_arr[] = { |
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0x48000028, CONFIG_SYS_MCMEM0_VAL, |
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0x4800002c, CONFIG_SYS_MCMEM1_VAL, |
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0x48000030, CONFIG_SYS_MCATT0_VAL, |
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0x48000034, CONFIG_SYS_MCATT1_VAL, |
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0x48000038, CONFIG_SYS_MCIO0_VAL, |
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0x4800003c, CONFIG_SYS_MCIO1_VAL, |
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0, 0 |
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}; |
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int i, rc; |
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#ifdef CONFIG_EXADRON1 |
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int cardDetect; |
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volatile unsigned int *v_pBCRReg = |
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(volatile unsigned int *) 0x08000000; |
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#endif |
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debug ("%s\n", __FUNCTION__); |
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i = 0; |
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while (reg_arr[i]) { |
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(*(volatile unsigned int *) reg_arr[i]) |= reg_arr[i + 1]; |
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i += 2; |
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} |
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udelay (1000); |
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debug ("%s: programmed mem controller \n", __FUNCTION__); |
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#ifdef CONFIG_EXADRON1 |
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/*define useful BCR masks */ |
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#define BCR_CF_INIT_VAL 0x00007230 |
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#define BCR_CF_PWRON_BUSOFF_RESETOFF_VAL 0x00007231 |
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#define BCR_CF_PWRON_BUSOFF_RESETON_VAL 0x00007233 |
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#define BCR_CF_PWRON_BUSON_RESETON_VAL 0x00007213 |
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#define BCR_CF_PWRON_BUSON_RESETOFF_VAL 0x00007211 |
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/* we see from the GPIO bit if the card is present */ |
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cardDetect = !(GPLR0 & GPIO_bit (14)); |
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if (cardDetect) { |
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printf ("No PCMCIA card found!\n"); |
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} |
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/* reset the card via the BCR line */ |
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*v_pBCRReg = (unsigned) BCR_CF_INIT_VAL; |
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msWait (500); |
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*v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETOFF_VAL; |
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msWait (500); |
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*v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETON_VAL; |
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msWait (500); |
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*v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETON_VAL; |
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msWait (500); |
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*v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETOFF_VAL; |
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msWait (1500); |
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/* enable address bus */ |
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GPCR1 = 0x01; |
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/* and the first CF slot */ |
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MECR = 0x00000002; |
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#endif /* EXADRON 1 */ |
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rc = check_ide_device (0); /* use just slot 0 */ |
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return rc; |
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} |
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#if defined(CONFIG_CMD_PCMCIA) |
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int pcmcia_off (void) |
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{ |
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return 0; |
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} |
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#endif |
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