ARM926EJS: Make asm routines volatile in cache ops

We certainly don't want the compiler to reorganise the code for dcache flushing.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Stefano Babic <sbabic@denx.de>

arch/arm/cpu/arm926ejs/cache.c

@@ -82,7 +82,7 @@ void flush_dcache_range(unsigned long start, unsigned long stop)
 		start += CONFIG_SYS_CACHELINE_SIZE;
 	}
 
-	asm("mcr p15, 0, %0, c7, c10, 4\n"::"r"(0));
+	asm volatile("mcr p15, 0, %0, c7, c10, 4\n"::"r"(0));
 }
 
 void flush_cache(unsigned long start, unsigned long size)