NAND: Add CFG_NAND_QUIET option

This config option sets the default for the progress information
output behavior that can also be configured through the 'quiet'
environment variable.

The legacy NAND code does not print the current progress info
on the console. So this option is for backward compatibility for
units that are in the field and where setting the quiet variable
is not an option. With CFG_NAND_QUIET set to '1' the console
progress info is turned off. This can still be overwritten
through the environment variable.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
master
Matthias Fuchs 17 years ago committed by Wolfgang Denk
parent dcb8863029
commit c750d2e669
  1. 4
      common/cmd_nand.c
  2. 3
      include/configs/ASH405.h
  3. 3
      include/configs/CMS700.h
  4. 3
      include/configs/HH405.h
  5. 3
      include/configs/HUB405.h
  6. 3
      include/configs/PLU405.h
  7. 3
      include/configs/VOH405.h

@ -161,7 +161,11 @@ int do_nand(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
ulong addr, off, size;
char *cmd, *s;
nand_info_t *nand;
#ifdef CFG_NAND_QUIET
int quiet = CFG_NAND_QUIET;
#else
int quiet = 0;
#endif
const char *quiet_str = getenv("quiet");
/* at least two arguments please */

@ -158,7 +158,8 @@
#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff

@ -165,7 +165,8 @@
#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff

@ -217,7 +217,8 @@
#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff

@ -157,7 +157,8 @@
#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff

@ -177,7 +177,8 @@
#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff

@ -163,7 +163,8 @@
#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff

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