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@ -24,6 +24,45 @@ |
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#ifndef __ASM_ARCH_MX31_REGS_H |
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#define __ASM_ARCH_MX31_REGS_H |
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#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) |
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#include <asm/types.h> |
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/* Clock control module registers */ |
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struct clock_control_regs { |
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u32 ccmr; |
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u32 pdr0; |
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u32 pdr1; |
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u32 rcsr; |
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u32 mpctl; |
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u32 upctl; |
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u32 spctl; |
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u32 cosr; |
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u32 cgr0; |
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u32 cgr1; |
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u32 cgr2; |
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u32 wimr0; |
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u32 ldc; |
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u32 dcvr0; |
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u32 dcvr1; |
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u32 dcvr2; |
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u32 dcvr3; |
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u32 ltr0; |
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u32 ltr1; |
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u32 ltr2; |
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u32 ltr3; |
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u32 ltbr0; |
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u32 ltbr1; |
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u32 pmcr0; |
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u32 pmcr1; |
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u32 pdr2; |
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}; |
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/* Bit definitions for RCSR register in CCM */ |
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#define CCM_RCSR_NF16B (1 << 31) |
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#define CCM_RCSR_NFMS (1 << 30) |
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#endif |
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#define __REG(x) (*((volatile u32 *)(x))) |
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#define __REG16(x) (*((volatile u16 *)(x))) |
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#define __REG8(x) (*((volatile u8 *)(x))) |
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