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@ -61,8 +61,39 @@ |
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
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#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ |
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/* enable I2C and select the hardware/software driver */ |
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#undef CONFIG_HARD_I2C /* I2C with hardware support */ |
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#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ |
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#define CFG_I2C_SPEED 40000 /* 40 kHz is supposed to work */ |
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#define CFG_I2C_SLAVE 0xFE |
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/* Software (bit-bang) I2C driver configuration */ |
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#define PB_SCL 0x00000020 /* PB 26 */ |
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#define PB_SDA 0x00000010 /* PB 27 */ |
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#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) |
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#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) |
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#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) |
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#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) |
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#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ |
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else immr->im_cpm.cp_pbdat &= ~PB_SDA |
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#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ |
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else immr->im_cpm.cp_pbdat &= ~PB_SCL |
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#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ |
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/* M41T11 Serial Access Timekeeper(R) SRAM */ |
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#define CONFIG_RTC_M41T11 1 |
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#define CFG_I2C_RTC_ADDR 0x68 |
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#define CFG_M41T11_BASE_YEAR 1900 /* play along with the linux driver */ |
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#undef CONFIG_WATCHDOG /* watchdog disabled */ |
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#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ |
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CFG_CMD_DATE | \
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CFG_CMD_DHCP | \
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CFG_CMD_I2C ) |
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#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) |
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
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@ -153,6 +184,11 @@ |
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#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) |
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/*-----------------------------------------------------------------------
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* Reset address |
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*/ |
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#define CFG_RESET_ADDRESS ((ulong)((((immap_t *)CFG_IMMR)->im_clkrst.res))) |
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/*-----------------------------------------------------------------------
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* Cache Configuration |
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*/ |
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#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ |
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