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@ -72,20 +72,20 @@ tests. All POST tests will be divided into the following groups: |
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This group will contain those tests that do not take much |
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time and can be run on the regular basis (e.g. CPU test) |
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3) Tests running on power-fail booting only |
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3) Tests running on in special "slow test more" only |
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This group will contain POST tests that consume much time |
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and cannot be run regularly (e.g. I2C test) |
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and cannot be run regularly (e.g. strong memory test, I2C test) |
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4) Manually executed tests |
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This group will contain those tests that can be run manually. |
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If necessary, some tests may belong to several groups simultaneously. |
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For example, SDRAM test may run on both noarmal and power-fail |
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booting. On normal booting, SDRAM test may perform a fast superficial |
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memory test only, while running on power-fail booting it may perform |
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a full memory check-up. |
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For example, SDRAM test may run in both normal and "slow test" mode. |
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In normal mode, SDRAM test may perform a fast superficial memory test |
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only, while running in slow test mode it may perform a full memory |
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check-up. |
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Also, all tests will be discriminated by the moment they run at. |
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Specifically, the following groups will be singled out: |
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@ -114,13 +114,15 @@ rest of U-Boot. |
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The following flags will be defined: |
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#define POST_ROM 0x01 /* test runs in ROM */ |
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#define POST_RAM 0x02 /* test runs in RAM */ |
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#define POST_POWERON 0x04 /* test runs on power-on booting */ |
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#define POST_NORMAL 0x08 /* test runs on normal booting */ |
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#define POST_SHUTDOWN 0x10 /* test runs on power-fail booting */ |
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#define POST_MANUAL 0x20 /* test can be executed manually */ |
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#define POST_REBOOT 0x80 /* test may cause rebooting */ |
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#define POST_POWERON 0x01 /* test runs on power-on booting */ |
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#define POST_NORMAL 0x02 /* test runs on normal booting */ |
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#define POST_SLOWTEST 0x04 /* test is slow, enabled by key press */ |
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#define POST_POWERTEST 0x08 /* test runs after watchdog reset */ |
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#define POST_ROM 0x100 /* test runs in ROM */ |
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#define POST_RAM 0x200 /* test runs in RAM */ |
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#define POST_MANUAL 0x400 /* test can be executed manually */ |
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#define POST_REBOOT 0x800 /* test may cause rebooting */ |
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#define POST_PREREL 0x1000 /* test runs before relocation */ |
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The POST layer will export the following interface routines: |
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@ -168,6 +170,13 @@ U-Boot common code: |
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will be called on power-fail booting after running all POST |
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tests. |
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o) int post_hotkeys_pressed(gd_t *gd) |
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This routine will scan the keyboard to detect if a magic key |
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combination has been pressed, or otherwise detect if the |
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power-on long-running tests shall be executed or not ("normal" |
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versus "slow" test mode). |
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The list of available POST tests be kept in the post_tests array |
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filled at U-Boot build time. The format of entry in this array will |
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be as follows: |
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@ -725,8 +734,3 @@ TBD |
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2.2.3.4. SPI test |
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TBD |
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2.3. Design notes |
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Currently it is unknown how we will power off the board after running |
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all power-fail POST tests. This point needs further clarification. |
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