sunxi: Move clock_get_pllX / clock_set_pllX protos to mach specific headers

Which pll-s are available depends on the machine type, move the
clock_get_pllX / clock_set_pllX prototypes to the clock_sun?i.h header files
so that we only declare what is actually available. e.g. clock_get_pll5p()
is not available on sun6i / sun8i, and with sun9i we get a completely
different set of plls.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

arch/arm/include/asm/arch-sunxi/clock.h

@@ -24,10 +24,6 @@
 #ifndef __ASSEMBLY__
 int clock_init(void);
 int clock_twi_onoff(int port, int state);
-void clock_set_pll1(unsigned int hz);
-void clock_set_pll3(unsigned int hz);
-unsigned int clock_get_pll5p(void);
-unsigned int clock_get_pll6(void);
 void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz);
 void clock_init_safe(void);
 void clock_init_uart(void);

arch/arm/include/asm/arch-sunxi/clock_sun4i.h

@@ -320,4 +320,11 @@ struct sunxi_ccm_reg {
 #define CCM_DE_CTRL_RST			(1 << 30)
 #define CCM_DE_CTRL_GATE		(1 << 31)
 
+#ifndef __ASSEMBLY__
+void clock_set_pll1(unsigned int hz);
+void clock_set_pll3(unsigned int hz);
+unsigned int clock_get_pll5p(void);
+unsigned int clock_get_pll6(void);
+#endif
+
 #endif /* _SUNXI_CLOCK_SUN4I_H */

arch/arm/include/asm/arch-sunxi/clock_sun6i.h

@@ -320,6 +320,11 @@ struct sunxi_ccm_reg {
 #define CCM_DE_CTRL_PLL10		(5 << 24)
 #define CCM_DE_CTRL_GATE		(1 << 31)
 
+#ifndef __ASSEMBLY__
+void clock_set_pll1(unsigned int hz);
+void clock_set_pll3(unsigned int hz);
 void clock_set_pll5(unsigned int clk, bool sigma_delta_enable);
+unsigned int clock_get_pll6(void);
+#endif
 
 #endif /* _SUNXI_CLOCK_SUN6I_H */