diff --git a/board/renesas/porter/Makefile b/board/renesas/porter/Makefile
index b0cfb1b..c237ee5 100644
--- a/board/renesas/porter/Makefile
+++ b/board/renesas/porter/Makefile
@@ -7,4 +7,8 @@
 # SPDX-License-Identifier: GPL-2.0
 #
 
+ifdef CONFIG_SPL_BUILD
+obj-y	:= porter_spl.o
+else
 obj-y	:= porter.o qos.o
+endif
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index 320841f..acd4f91 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -136,25 +136,3 @@ void reset_cpu(ulong addr)
 	if (ret)
 		hang();
 }
-
-#ifdef CONFIG_SPL_BUILD
-#include <spl.h>
-void board_init_f(ulong dummy)
-{
-	board_early_init_f();
-}
-
-void spl_board_init(void)
-{
-	/* UART clocks enabled and gd valid - init serial console */
-	preloader_console_init();
-}
-
-void board_boot_order(u32 *spl_boot_list)
-{
-	/* Boot from SPI NOR with YMODEM UART fallback. */
-	spl_boot_list[0] = BOOT_DEVICE_SPI;
-	spl_boot_list[1] = BOOT_DEVICE_UART;
-	spl_boot_list[2] = BOOT_DEVICE_NONE;
-}
-#endif
diff --git a/board/renesas/porter/porter_spl.c b/board/renesas/porter/porter_spl.c
new file mode 100644
index 0000000..eb34469
--- /dev/null
+++ b/board/renesas/porter/porter_spl.c
@@ -0,0 +1,55 @@
+/*
+ * board/renesas/porter/porter_spl.c
+ *
+ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <dm/platform_data/serial_sh.h>
+#include <asm/processor.h>
+#include <asm/mach-types.h>
+#include <asm/io.h>
+#include <linux/errno.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/arch/rmobile.h>
+#include <asm/arch/rcar-mstp.h>
+
+#include <spl.h>
+
+#define TMU0_MSTP125	BIT(25)
+
+#define SD2CKCR		0xE615026C
+#define SD_97500KHZ	0x7
+
+void board_init_f(ulong dummy)
+{
+	mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
+
+	/*
+	 * SD0 clock is set to 97.5MHz by default.
+	 * Set SD2 to the 97.5MHz as well.
+	 */
+	writel(SD_97500KHZ, SD2CKCR);
+}
+
+void spl_board_init(void)
+{
+	/* UART clocks enabled and gd valid - init serial console */
+	preloader_console_init();
+}
+
+void board_boot_order(u32 *spl_boot_list)
+{
+	/* Boot from SPI NOR with YMODEM UART fallback. */
+	spl_boot_list[0] = BOOT_DEVICE_SPI;
+	spl_boot_list[1] = BOOT_DEVICE_UART;
+	spl_boot_list[2] = BOOT_DEVICE_NONE;
+}
+
+void reset_cpu(ulong addr)
+{
+}