Import k2l specific DT files from Linux Kernel and enable OF_CONTROL, DM, DM_SERIAL. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>master
Lokesh Vutla
9 years ago
committed by
Tom Rini
parent
391839fb04
commit
cec6a6bf1d
@ -0,0 +1,266 @@ |
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/* |
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* Copyright 2013-2014 Texas Instruments, Inc. |
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* |
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* Keystone 2 lamarr SoC clock nodes |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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|
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clocks { |
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armpllclk: armpllclk@2620370 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,pll-clock"; |
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clocks = <&refclksys>; |
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clock-output-names = "arm-pll-clk"; |
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reg = <0x02620370 4>; |
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reg-names = "control"; |
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}; |
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|
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mainpllclk: mainpllclk@2310110 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,main-pll-clock"; |
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clocks = <&refclksys>; |
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reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>; |
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reg-names = "control", "multiplier", "post-divider"; |
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}; |
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|
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papllclk: papllclk@2620358 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,pll-clock"; |
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clocks = <&refclksys>; |
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clock-output-names = "papllclk"; |
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reg = <0x02620358 4>; |
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reg-names = "control"; |
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}; |
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|
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ddr3apllclk: ddr3apllclk@2620360 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,pll-clock"; |
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clocks = <&refclksys>; |
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clock-output-names = "ddr-3a-pll-clk"; |
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reg = <0x02620360 4>; |
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reg-names = "control"; |
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}; |
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|
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clkdfeiqnsys: clkdfeiqnsys { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk12>; |
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clock-output-names = "dfe"; |
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reg-names = "control", "domain"; |
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reg = <0x02350004 0xb00>, <0x02350000 0x400>; |
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domain-id = <0>; |
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}; |
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|
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clkpcie1: clkpcie1 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk12>; |
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clock-output-names = "pcie"; |
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reg = <0x0235002c 0xb00>, <0x02350000 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <4>; |
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}; |
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|
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clkgem1: clkgem1 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk1>; |
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clock-output-names = "gem1"; |
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reg = <0x02350040 0xb00>, <0x02350024 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <9>; |
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}; |
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|
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clkgem2: clkgem2 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk1>; |
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clock-output-names = "gem2"; |
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reg = <0x02350044 0xb00>, <0x02350028 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <10>; |
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}; |
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|
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clkgem3: clkgem3 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk1>; |
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clock-output-names = "gem3"; |
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reg = <0x02350048 0xb00>, <0x0235002c 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <11>; |
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}; |
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clktac: clktac { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "tac"; |
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reg = <0x02350064 0xb00>, <0x02350044 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <17>; |
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}; |
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clkrac: clkrac { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "rac"; |
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reg = <0x02350068 0xb00>, <0x02350044 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <17>; |
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}; |
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clkdfepd0: clkdfepd0 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "dfe-pd0"; |
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reg = <0x0235006c 0xb00>, <0x02350044 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <18>; |
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}; |
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clkfftc0: clkfftc0 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "fftc-0"; |
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reg = <0x02350070 0xb00>, <0x0235004c 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <19>; |
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}; |
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clkosr: clkosr { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "osr"; |
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reg = <0x02350088 0xb00>, <0x0235004c 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <21>; |
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}; |
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clktcp3d0: clktcp3d0 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "tcp3d-0"; |
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reg = <0x0235008c 0xb00>, <0x02350058 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <22>; |
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}; |
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clktcp3d1: clktcp3d1 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "tcp3d-1"; |
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reg = <0x02350094 0xb00>, <0x02350058 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <23>; |
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}; |
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clkvcp0: clkvcp0 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "vcp-0"; |
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reg = <0x0235009c 0xb00>, <0x02350060 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <24>; |
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}; |
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clkvcp1: clkvcp1 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "vcp-1"; |
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reg = <0x023500a0 0xb00>, <0x02350060 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <24>; |
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}; |
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clkvcp2: clkvcp2 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "vcp-2"; |
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reg = <0x023500a4 0xb00>, <0x02350060 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <24>; |
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}; |
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clkvcp3: clkvcp3 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "vcp-3"; |
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reg = <0x023500a8 0xb00>, <0x02350060 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <24>; |
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}; |
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clkbcp: clkbcp { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "bcp"; |
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reg = <0x023500bc 0xb00>, <0x02350068 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <26>; |
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}; |
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clkdfepd1: clkdfepd1 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "dfe-pd1"; |
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reg = <0x023500c0 0xb00>, <0x02350044 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <27>; |
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}; |
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clkfftc1: clkfftc1 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "fftc-1"; |
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reg = <0x023500c4 0xb00>, <0x023504c0 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <28>; |
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}; |
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clkiqnail: clkiqnail { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&chipclk13>; |
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clock-output-names = "iqn-ail"; |
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reg = <0x023500c8 0xb00>, <0x0235004c 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <29>; |
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}; |
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clkuart2: clkuart2 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&clkmodrst0>; |
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clock-output-names = "uart2"; |
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reg = <0x02350000 0xb00>, <0x02350000 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <0>; |
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}; |
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clkuart3: clkuart3 { |
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#clock-cells = <0>; |
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compatible = "ti,keystone,psc-clock"; |
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clocks = <&clkmodrst0>; |
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clock-output-names = "uart3"; |
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reg = <0x02350000 0xb00>, <0x02350000 0x400>; |
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reg-names = "control", "domain"; |
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domain-id = <0>; |
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}; |
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}; |
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@ -0,0 +1,131 @@ |
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/* |
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* Copyright 2014 Texas Instruments, Inc. |
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* |
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* Keystone 2 Lamarr EVM device tree |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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/dts-v1/; |
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#include "keystone.dtsi" |
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#include "k2l.dtsi" |
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/ { |
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compatible = "ti,k2l-evm","ti,keystone"; |
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model = "Texas Instruments Keystone 2 Lamarr EVM"; |
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soc { |
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clocks { |
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refclksys: refclksys { |
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#clock-cells = <0>; |
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compatible = "fixed-clock"; |
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clock-frequency = <122880000>; |
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clock-output-names = "refclk-sys"; |
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}; |
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}; |
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}; |
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}; |
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&usb_phy { |
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status = "okay"; |
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}; |
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&usb { |
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status = "okay"; |
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}; |
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&i2c0 { |
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dtt@50 { |
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compatible = "at,24c1024"; |
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reg = <0x50>; |
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}; |
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}; |
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&aemif { |
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cs0 { |
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#address-cells = <2>; |
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#size-cells = <1>; |
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clock-ranges; |
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ranges; |
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ti,cs-chipselect = <0>; |
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/* all timings in nanoseconds */ |
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ti,cs-min-turnaround-ns = <12>; |
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ti,cs-read-hold-ns = <6>; |
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ti,cs-read-strobe-ns = <23>; |
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ti,cs-read-setup-ns = <9>; |
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ti,cs-write-hold-ns = <8>; |
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ti,cs-write-strobe-ns = <23>; |
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ti,cs-write-setup-ns = <8>; |
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nand@0,0 { |
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compatible = "ti,keystone-nand","ti,davinci-nand"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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reg = <0 0 0x4000000 |
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1 0 0x0000100>; |
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ti,davinci-chipselect = <0>; |
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ti,davinci-mask-ale = <0x2000>; |
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ti,davinci-mask-cle = <0x4000>; |
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ti,davinci-mask-chipsel = <0>; |
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nand-ecc-mode = "hw"; |
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ti,davinci-ecc-bits = <4>; |
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nand-on-flash-bbt; |
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partition@0 { |
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label = "u-boot"; |
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reg = <0x0 0x100000>; |
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read-only; |
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}; |
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partition@100000 { |
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label = "params"; |
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reg = <0x100000 0x80000>; |
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read-only; |
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}; |
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partition@180000 { |
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label = "ubifs"; |
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reg = <0x180000 0x7FE80000>; |
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}; |
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}; |
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}; |
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}; |
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&spi0 { |
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nor_flash: n25q128a11@0 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "Micron,n25q128a11"; |
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spi-max-frequency = <54000000>; |
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m25p,fast-read; |
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reg = <0>; |
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partition@0 { |
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label = "u-boot-spl"; |
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reg = <0x0 0x80000>; |
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read-only; |
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}; |
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partition@1 { |
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label = "misc"; |
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reg = <0x80000 0xf80000>; |
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}; |
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}; |
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}; |
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&mdio { |
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status = "ok"; |
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ethphy0: ethernet-phy@0 { |
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compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22"; |
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reg = <0>; |
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}; |
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ethphy1: ethernet-phy@1 { |
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compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22"; |
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reg = <1>; |
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}; |
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}; |
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@ -0,0 +1,189 @@ |
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/* |
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* Device Tree Source for Keystone 2 Lamarr Netcp driver |
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* |
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* Copyright 2015 Texas Instruments, Inc. |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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qmss: qmss@2a40000 { |
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compatible = "ti,keystone-navigator-qmss"; |
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dma-coherent; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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clocks = <&chipclk13>; |
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ranges; |
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queue-range = <0 0x2000>; |
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linkram0 = <0x100000 0x4000>; |
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linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */ |
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qmgrs { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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qmgr0 { |
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managed-queues = <0 0x2000>; |
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reg = <0x2a40000 0x20000>, |
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<0x2a06000 0x400>, |
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<0x2a02000 0x1000>, |
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<0x2a03000 0x1000>, |
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<0x23a80000 0x20000>, |
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<0x2a80000 0x20000>; |
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reg-names = "peek", "status", "config", |
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"region", "push", "pop"; |
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}; |
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}; |
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queue-pools { |
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qpend { |
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qpend-0 { |
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qrange = <658 8>; |
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interrupts =<0 40 0xf04 0 41 0xf04 0 42 0xf04 |
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0 43 0xf04 0 44 0xf04 0 45 0xf04 |
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0 46 0xf04 0 47 0xf04>; |
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}; |
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qpend-1 { |
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qrange = <528 16>; |
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interrupts = <0 48 0xf04 0 49 0xf04 0 50 0xf04 |
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0 51 0xf04 0 52 0xf04 0 53 0xf04 |
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0 54 0xf04 0 55 0xf04 0 56 0xf04 |
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0 57 0xf04 0 58 0xf04 0 59 0xf04 |
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0 60 0xf04 0 61 0xf04 0 62 0xf04 |
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0 63 0xf04>; |
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qalloc-by-id; |
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}; |
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qpend-2 { |
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qrange = <544 16>; |
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interrupts = <0 64 0xf04 0 65 0xf04 0 66 0xf04 |
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0 59 0xf04 0 68 0xf04 0 69 0xf04 |
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0 70 0xf04 0 71 0xf04 0 72 0xf04 |
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0 73 0xf04 0 74 0xf04 0 75 0xf04 |
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0 76 0xf04 0 77 0xf04 0 78 0xf04 |
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0 79 0xf04>; |
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}; |
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}; |
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general-purpose { |
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gp-0 { |
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qrange = <4000 64>; |
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}; |
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netcp-tx { |
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qrange = <896 128>; |
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qalloc-by-id; |
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}; |
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}; |
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}; |
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descriptor-regions { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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region-12 { |
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id = <12>; |
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region-spec = <8192 128>; /* num_desc desc_size */ |
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link-index = <0x4000>; |
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}; |
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}; |
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}; /* qmss */ |
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knav_dmas: knav_dmas@0 { |
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compatible = "ti,keystone-navigator-dma"; |
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clocks = <&papllclk>; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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ti,navigator-cloud-address = <0x23a80000 0x23a90000>; |
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|
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dma_gbe: dma_gbe@0 { |
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reg = <0x26186000 0x100>, |
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<0x26187000 0x2a0>, |
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<0x26188000 0xb60>, |
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<0x26186100 0x80>, |
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<0x26189000 0x1000>; |
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reg-names = "global", "txchan", "rxchan", |
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"txsched", "rxflow"; |
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}; |
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}; |
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netcp: netcp@26000000 { |
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reg = <0x2620110 0x8>; |
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reg-names = "efuse"; |
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compatible = "ti,netcp-1.0"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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|
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/* NetCP address range */ |
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ranges = <0 0x26000000 0x1000000>; |
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|
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clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>; |
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dma-coherent; |
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ti,navigator-dmas = <&dma_gbe 0>, |
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<&dma_gbe 8>, |
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<&dma_gbe 0>; |
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ti,navigator-dma-names = "netrx0", "netrx1", "nettx"; |
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|
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netcp-devices { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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ranges; |
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gbe@200000 { /* ETHSS */ |
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label = "netcp-gbe"; |
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compatible = "ti,netcp-gbe-5"; |
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reg = <0x200000 0x900>, <0x220000 0x20000>; |
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/* enable-ale; */ |
||||
tx-queue = <896>; |
||||
tx-channel = "nettx"; |
||||
|
||||
interfaces { |
||||
gbe0: interface-0 { |
||||
slave-port = <0>; |
||||
link-interface = <1>; |
||||
phy-handle = <ðphy0>; |
||||
}; |
||||
gbe1: interface-1 { |
||||
slave-port = <1>; |
||||
link-interface = <1>; |
||||
phy-handle = <ðphy1>; |
||||
}; |
||||
}; |
||||
|
||||
secondary-slave-ports { |
||||
port-2 { |
||||
slave-port = <2>; |
||||
link-interface = <2>; |
||||
}; |
||||
port-3 { |
||||
slave-port = <3>; |
||||
link-interface = <2>; |
||||
}; |
||||
}; |
||||
}; |
||||
}; |
||||
|
||||
netcp-interfaces { |
||||
interface-0 { |
||||
rx-channel = "netrx0"; |
||||
rx-pool = <1024 12>; |
||||
tx-pool = <1024 12>; |
||||
rx-queue-depth = <128 128 0 0>; |
||||
rx-buffer-size = <1518 4096 0 0>; |
||||
rx-queue = <528>; |
||||
tx-completion-queue = <530>; |
||||
efuse-mac = <1>; |
||||
netcp-gbe = <&gbe0>; |
||||
|
||||
}; |
||||
interface-1 { |
||||
rx-channel = "netrx1"; |
||||
rx-pool = <1024 12>; |
||||
tx-pool = <1024 12>; |
||||
rx-queue-depth = <128 128 0 0>; |
||||
rx-buffer-size = <1518 4096 0 0>; |
||||
rx-queue = <529>; |
||||
tx-completion-queue = <531>; |
||||
efuse-mac = <0>; |
||||
local-mac-address = [02 18 31 7e 3e 7f]; |
||||
netcp-gbe = <&gbe1>; |
||||
}; |
||||
}; |
||||
}; |
||||
@ -0,0 +1,108 @@ |
||||
/* |
||||
* Copyright 2014 Texas Instruments, Inc. |
||||
* |
||||
* Keystone 2 Lamarr SoC specific device tree |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify |
||||
* it under the terms of the GNU General Public License version 2 as |
||||
* published by the Free Software Foundation. |
||||
*/ |
||||
|
||||
/ { |
||||
cpus { |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
|
||||
interrupt-parent = <&gic>; |
||||
|
||||
cpu@0 { |
||||
compatible = "arm,cortex-a15"; |
||||
device_type = "cpu"; |
||||
reg = <0>; |
||||
}; |
||||
|
||||
cpu@1 { |
||||
compatible = "arm,cortex-a15"; |
||||
device_type = "cpu"; |
||||
reg = <1>; |
||||
}; |
||||
}; |
||||
|
||||
soc { |
||||
/include/ "k2l-clocks.dtsi" |
||||
|
||||
uart2: serial@02348400 { |
||||
compatible = "ns16550a"; |
||||
current-speed = <115200>; |
||||
reg-shift = <2>; |
||||
reg-io-width = <4>; |
||||
reg = <0x02348400 0x100>; |
||||
clocks = <&clkuart2>; |
||||
interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>; |
||||
}; |
||||
|
||||
uart3: serial@02348800 { |
||||
compatible = "ns16550a"; |
||||
current-speed = <115200>; |
||||
reg-shift = <2>; |
||||
reg-io-width = <4>; |
||||
reg = <0x02348800 0x100>; |
||||
clocks = <&clkuart3>; |
||||
interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>; |
||||
}; |
||||
|
||||
dspgpio0: keystone_dsp_gpio@02620240 { |
||||
compatible = "ti,keystone-dsp-gpio"; |
||||
gpio-controller; |
||||
#gpio-cells = <2>; |
||||
gpio,syscon-dev = <&devctrl 0x240>; |
||||
}; |
||||
|
||||
dspgpio1: keystone_dsp_gpio@2620244 { |
||||
compatible = "ti,keystone-dsp-gpio"; |
||||
gpio-controller; |
||||
#gpio-cells = <2>; |
||||
gpio,syscon-dev = <&devctrl 0x244>; |
||||
}; |
||||
|
||||
dspgpio2: keystone_dsp_gpio@2620248 { |
||||
compatible = "ti,keystone-dsp-gpio"; |
||||
gpio-controller; |
||||
#gpio-cells = <2>; |
||||
gpio,syscon-dev = <&devctrl 0x248>; |
||||
}; |
||||
|
||||
dspgpio3: keystone_dsp_gpio@262024c { |
||||
compatible = "ti,keystone-dsp-gpio"; |
||||
gpio-controller; |
||||
#gpio-cells = <2>; |
||||
gpio,syscon-dev = <&devctrl 0x24c>; |
||||
}; |
||||
|
||||
mdio: mdio@26200f00 { |
||||
compatible = "ti,keystone_mdio", "ti,davinci_mdio"; |
||||
#address-cells = <1>; |
||||
#size-cells = <0>; |
||||
reg = <0x26200f00 0x100>; |
||||
status = "disabled"; |
||||
clocks = <&clkcpgmac>; |
||||
clock-names = "fck"; |
||||
bus_freq = <2500000>; |
||||
}; |
||||
/include/ "k2l-netcp.dtsi" |
||||
}; |
||||
}; |
||||
|
||||
&spi0 { |
||||
ti,davinci-spi-num-cs = <5>; |
||||
}; |
||||
|
||||
&spi1 { |
||||
ti,davinci-spi-num-cs = <3>; |
||||
}; |
||||
|
||||
&spi2 { |
||||
ti,davinci-spi-num-cs = <5>; |
||||
/* Pin muxed. Enabled and configured by Bootloader */ |
||||
status = "disabled"; |
||||
}; |
||||
@ -1,9 +1,13 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_KEYSTONE=y |
||||
CONFIG_TARGET_K2L_EVM=y |
||||
CONFIG_DM_SERIAL=y |
||||
CONFIG_DEFAULT_DEVICE_TREE="k2l-evm" |
||||
CONFIG_SPL=y |
||||
CONFIG_SYS_PROMPT="K2L EVM # " |
||||
# CONFIG_CMD_IMLS is not set |
||||
# CONFIG_CMD_FLASH is not set |
||||
# CONFIG_CMD_SETEXPR is not set |
||||
CONFIG_OF_CONTROL=y |
||||
CONFIG_DM=y |
||||
CONFIG_SPI_FLASH=y |
||||
|
||||
Loading…
Reference in new issue