diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 20a4c37..f7971b6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -225,7 +225,8 @@ dtb-$(CONFIG_STM32F4) += stm32f429-disco.dtb \ stm32f469-disco.dtb dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb \ - stm32f769-disco.dtb + stm32f769-disco.dtb \ + stm32746g-eval.dtb dtb-$(CONFIG_STM32H7) += stm32h743i-disco.dtb \ stm32h743i-eval.dtb diff --git a/arch/arm/dts/stm32746g-eval.dts b/arch/arm/dts/stm32746g-eval.dts new file mode 100644 index 0000000..4f6d38a --- /dev/null +++ b/arch/arm/dts/stm32746g-eval.dts @@ -0,0 +1,240 @@ +/* + * Copyright 2018 - Christophe Priouzeau + * + * Based on: + * stm32f746-disco.dts from U-boot 2018.01 + * Copyright 2016 - Lee Jones + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "stm32f746.dtsi" +#include + +/ { + model = "STMicroelectronics STM32F746G-EVAL board"; + compatible = "st,stm32f746g-eval", "st,stm32f746"; + + chosen { + bootargs = "root=/dev/mmcblk0p1 rw rootwait"; + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0xC0000000 0x2000000>; + }; + + aliases { + serial0 = &usart1; + spi0 = &qspi; + mmc0 = &sdio; + /* Aliases for gpios so as to use sequence */ + gpio0 = &gpioa; + gpio1 = &gpiob; + gpio2 = &gpioc; + gpio3 = &gpiod; + gpio4 = &gpioe; + gpio5 = &gpiof; + gpio6 = &gpiog; + gpio7 = &gpioh; + gpio8 = &gpioi; + gpio9 = &gpioj; + gpio10 = &gpiok; + }; + + led1 { + compatible = "st,led1"; + led-gpio = <&gpiof 10 0>; + }; + + button1 { + compatible = "st,button1"; + button-gpio = <&gpioc 13 0>; + }; +}; + +&clk_hse { + clock-frequency = <25000000>; +}; + +&pinctrl { + usart1_pins_a: usart1@0 { + pins1 { + pinmux = ; + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + pins2 { + pinmux = ; + bias-disable; + }; + }; + + ethernet_mii: mii@0 { + pins { + pinmux = , + , + , + , + , + , + , + , + ; + slew-rate = <2>; + }; + }; + + fmc_pins: fmc@0 { + pins { + pinmux = , /* FMC_D31 */ + , /* FMC_D30*/ + , /* FMC_D29 */ + , /* FMC_D28 */ + , /* FMC_D27 */ + , /* FMC_D26 */ + , /* FMC_D25 */ + , /* FMC_D24 */ + , /* FMC_D23 */ + , /* FMC_D22 */ + , /* FMC_D21 */ + , /* FMC_D20 */ + , /* FMC_D19 */ + , /* FMC_D18 */ + , /* FMC_D17 */ + , /* FMC_D16 */ + + , /* FMC_D15 */ + , /* FMC_D14*/ + , /* FMC_D13 */ + ,/* FMC_D12 */ + ,/* FMC_D11 */ + ,/* FMC_D10 */ + , /* FMC_D9 */ + , /* FMC_D8 */ + , /* FMC_D7 */ + , /* FMC_D6 */ + , /* FMC_D5*/ + , /* FMC_D4 */ + , /* FMC_D3 */ + , /* FMC_D2 */ + , /* FMC_D1 */ + , /* FMC_D0 */ + + , /* FMC_NBL3 */ + , /* FMC_NBL2 */ + , /* FMC_NBL1 */ + , /* FMC_NBL0 */ + + , /* FMC_A15 FMC_BA1 */ + , /* FMC_A14 FMC_BA0*/ + + , /* FMC_A11 */ + , /* FMC_A10 */ + , /* FMC_A9 */ + , /* FMC_A8 */ + , /* FMC_A7 */ + , /* FMC_A6 */ + , /* FUNC_FMC_A5 */ + , /* FMC_A4 */ + , /* FMC_A3 */ + , /* FMC_A2 */ + , /* FMC_A1 */ + , /* FMC_A0 */ + + ,/* FMC_SDNE0 */ + , /* FMC_SDNWE */ + , /* FMC_SDNRAS */ + , /* FMC_SDNCAS */ + , /* FMC_SDCKE0 */ + ; /* FMC_SDCLK */ + slew-rate = <2>; + }; + }; +}; + +&usart1 { + pinctrl-0 = <&usart1_pins_a>; + pinctrl-names = "default"; + status = "okay"; +}; + +&mac { + status = "okay"; + pinctrl-0 = <ðernet_mii>; + phy-mode = "rmii"; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&fmc { + pinctrl-0 = <&fmc_pins>; + pinctrl-names = "default"; + status = "okay"; + + /* + * Memory configuration from sdram datasheet IS42S32800G-6BLI + */ + bank1: bank@0 { + st,sdram-control = /bits/ 8 ; + st,sdram-timing = /bits/ 8 ; + st,sdram-refcount = <1539>; + }; +}; + +&sdio { + status = "okay"; + pinctrl-names = "default", "opendrain"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_pins_od>; + bus-width = <4>; + max-frequency = <25000000>; +};