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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

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master
Wolfgang Denk 14 years ago
parent 17f79e45e1 856e4b0d7f
commit d1a79b71f7
5 changed files with 19 additions and 16 deletions
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  1. 3
      arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
  2. 2
      arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
  3. 1
      board/freescale/common/sys_eeprom.c
  4. 26
      boards.cfg
  5. 3
      include/configs/P1_P2_RDB.h

3
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
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@ -236,9 +236,12 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr,
* tAXPD=1, need design to confirm.
*/
int tXP = max((get_memory_clk_period_ps() * 3), 7500); /* unit=ps */
unsigned int data_rate = fsl_ddr_get_mem_data_rate();
tmrd_mclk = 4;
/* set the turnaround time */
trwt_mclk = 1;
if ((data_rate/1000000 > 1150) || (popts->memctl_interleaving))
twrt_mclk = 1;
if (popts->dynamic_power == 0) { /* powerdown is not used */
act_pd_exit_mclk = 1;

2
arch/powerpc/cpu/mpc8xxx/ddr/ddr.h
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@ -80,5 +80,5 @@ extern void check_interleaving_options(fsl_ddr_info_t *pinfo);
extern unsigned int mclk_to_picos(unsigned int mclk);
extern unsigned int get_memory_clk_period_ps(void);
extern unsigned int picos_to_mclk(unsigned int picos);
extern unsigned int fsl_ddr_get_mem_data_rate(void);
#endif

1
board/freescale/common/sys_eeprom.c
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@ -361,6 +361,7 @@ int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
#else
memcpy(e.id, "CCID", sizeof(e.id));
#endif
update_crc();
return 0;
}

26
boards.cfg
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@ -480,26 +480,26 @@ MPC8569MDS_NAND powerpc mpc85xx mpc8569mds freesca
MPC8572DS powerpc mpc85xx mpc8572ds freescale - MPC8572DS
MPC8572DS_36BIT powerpc mpc85xx mpc8572ds freescale - MPC8572DS:36BIT
MPC8572DS_NAND powerpc mpc85xx mpc8572ds freescale - MPC8572DS:NAND
P1011RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011
P1011RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011,NAND
P1011RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011,SDCARD
P1011RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011,SPIFLASH
P1011RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB
P1011RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,NAND
P1011RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,SDCARD
P1011RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,SPIFLASH
P1020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB
P1020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,NAND
P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SDCARD
P1020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020,SPIFLASH
P1020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SPIFLASH
P1022DS powerpc mpc85xx p1022ds freescale
P2010RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010
P2010RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,NAND
P2010RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,SDCARD
P2010RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010,SPIFLASH
P2010RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB
P2010RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,NAND
P2010RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,SDCARD
P2010RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,SPIFLASH
P2020DS powerpc mpc85xx p2020ds freescale
P2020DS_36BIT powerpc mpc85xx p2020ds freescale - P2020DS:36BIT
P2020DS_DDR2 powerpc mpc85xx p2020ds freescale - P2020DS:DDR2
P2020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020
P2020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,NAND
P2020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,SDCARD
P2020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020,SPIFLASH
P2020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB
P2020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,NAND
P2020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,SDCARD
P2020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,SPIFLASH
P4080DS powerpc mpc85xx corenet_ds freescale
mpq101 powerpc mpc85xx mpq101 mercury - mpq101
stxgp3 powerpc mpc85xx stxgp3 stx

3
include/configs/P1_P2_RDB.h
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@ -344,7 +344,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address*/
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_SLAVE 0x7F
#define CONFIG_SYS_I2C_NOPROBES {{0,0x29}} /* Don't probe these addrs */
#define CONFIG_SYS_I2C_OFFSET 0x3000
@ -357,7 +356,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#ifdef CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#endif
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_BUS_NUM 1

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