- Allow to call sysmon function interactively - PIC on LWMON board needs delay after power-on - Add missing RSR definitions for MPC8xx - Improve log buffer handling: guarantee clean reset after power-on - Add support for EXBITGEN board - Add support for SL8245 boardmaster
parent
8bde7f776c
commit
d1cbe85b08
@ -0,0 +1,49 @@ |
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#
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# (C) Copyright 2000
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk |
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LIB = lib$(BOARD).a
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OBJS = $(BOARD).o flash.o
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SOBJS = init.o
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$(LIB): $(OBJS) $(SOBJS) |
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$(AR) crv $@ $^
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clean: |
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rm -f $(SOBJS) $(OBJS)
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distclean: clean |
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rm -f $(LIB) core *.bak .depend
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#########################################################################
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.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) |
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$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
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sinclude .depend |
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#########################################################################
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@ -0,0 +1,33 @@ |
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#
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# (C) Copyright 2000
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
|
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# modify it under the terms of the GNU General Public License as
|
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# published by the Free Software Foundation; either version 2 of
|
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
|
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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# GNU General Public License for more details.
|
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#
|
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# You should have received a copy of the GNU General Public License
|
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# along with this program; if not, write to the Free Software
|
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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#
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# ExbitGen board
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#
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LDFLAGS += $(LINKER_UNDEFS)
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TEXT_BASE := 0xFFF80000
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#TEXT_BASE := 0x00100000
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PLATFORM_RELFLAGS := $(PLATFORM_RELFLAGS)
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@ -0,0 +1,117 @@ |
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#include <asm/u-boot.h> |
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#include <asm/processor.h> |
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#include <common.h> |
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#include "exbitgen.h" |
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/* ************************************************************************ */ |
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int board_pre_init (void) |
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/* ------------------------------------------------------------------------ --
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* Purpose : |
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* Remarks : |
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* Restrictions: |
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* See also : |
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* Example : |
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* ************************************************************************ */ |
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{ |
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unsigned long i; |
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/*-------------------------------------------------------------------------+
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| Interrupt controller setup for the Walnut board. |
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| Note: IRQ 0-15 405GP internally generated; active high; level sensitive |
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| IRQ 16 405GP internally generated; active low; level sensitive |
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| IRQ 17-24 RESERVED |
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| IRQ 25 (EXT IRQ 0) FPGA; active high; level sensitive |
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| IRQ 26 (EXT IRQ 1) SMI; active high; level sensitive |
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| IRQ 27 (EXT IRQ 2) Not Used |
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| IRQ 28 (EXT IRQ 3) PCI SLOT 3; active low; level sensitive |
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| IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive |
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| IRQ 30 (EXT IRQ 5) PCI SLOT 1; active low; level sensitive |
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| IRQ 31 (EXT IRQ 6) PCI SLOT 0; active low; level sensitive |
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| Note for Walnut board: |
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| An interrupt taken for the FPGA (IRQ 25) indicates that either |
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| the Mouse, Keyboard, IRDA, or External Expansion caused the |
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| interrupt. The FPGA must be read to determine which device |
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| caused the interrupt. The default setting of the FPGA clears |
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| |
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+-------------------------------------------------------------------------*/ |
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mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ |
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mtdcr (uicer, 0x00000000); /* disable all ints */ |
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mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */ |
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mtdcr (uicpr, 0xFFFFFF90); /* set int polarities */ |
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mtdcr (uictr, 0x10000000); /* set int trigger levels */ |
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mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ |
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mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ |
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/* Perform reset of PHY connected to PPC via register in CPLD */ |
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out8 (PHY_CTRL_ADDR, 0x2e); /* activate nRESET,FDX,F100,ANEN, enable output */ |
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for (i = 0; i < 10000000; i++) { |
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; |
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} |
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out8 (PHY_CTRL_ADDR, 0x2f); /* deactivate nRESET */ |
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return 0; |
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} |
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/* ************************************************************************ */ |
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int checkboard (void) |
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/* ------------------------------------------------------------------------ --
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* Purpose : |
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* Remarks : |
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* Restrictions: |
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* See also : |
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* Example : |
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* ************************************************************************ */ |
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{ |
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printf ("Exbit H/W id: %d\n", in8 (HW_ID_ADDR)); |
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return (0); |
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} |
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/* ************************************************************************ */ |
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long int initdram (int board_type) |
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/* ------------------------------------------------------------------------ --
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* Purpose : Determines size of mounted DRAM. |
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* Remarks : Size is determined by reading SDRAM configuration registers as |
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* set up by sdram_init. |
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* Restrictions: |
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* See also : |
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* Example : |
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* ************************************************************************ */ |
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{ |
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ulong tot_size; |
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ulong bank_size; |
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ulong tmp; |
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tot_size = 0; |
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mtdcr (memcfga, mem_mb0cf); |
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tmp = mfdcr (memcfgd); |
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if (tmp & 0x00000001) { |
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bank_size = 0x00400000 << ((tmp >> 17) & 0x7); |
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tot_size += bank_size; |
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} |
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mtdcr (memcfga, mem_mb1cf); |
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tmp = mfdcr (memcfgd); |
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if (tmp & 0x00000001) { |
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bank_size = 0x00400000 << ((tmp >> 17) & 0x7); |
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tot_size += bank_size; |
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} |
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mtdcr (memcfga, mem_mb2cf); |
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tmp = mfdcr (memcfgd); |
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if (tmp & 0x00000001) { |
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bank_size = 0x00400000 << ((tmp >> 17) & 0x7); |
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tot_size += bank_size; |
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} |
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mtdcr (memcfga, mem_mb3cf); |
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tmp = mfdcr (memcfgd); |
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if (tmp & 0x00000001) { |
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bank_size = 0x00400000 << ((tmp >> 17) & 0x7); |
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tot_size += bank_size; |
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} |
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return tot_size; |
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} |
@ -0,0 +1,52 @@ |
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/*
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* (C) Copyright 2003 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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#define GPIO_CPU_LED GPIO_3 |
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#define CPLD_BASE 0x10000000 /* t.b.m. */ |
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#define DEBUG_LEDS_ADDR CPLD_BASE + 0x01 |
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#define HW_ID_ADDR CPLD_BASE + 0x02 |
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#define DIP_SWITCH_ADDR CPLD_BASE + 0x04 |
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#define PHY_CTRL_ADDR CPLD_BASE + 0x05 |
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#define SPI_OUT_ADDR CPLD_BASE + 0x07 |
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#define SPI_IN_ADDR CPLD_BASE + 0x08 |
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#define MDIO_OUT_ADDR CPLD_BASE + 0x09 |
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#define MDIO_IN_ADDR CPLD_BASE + 0x0A |
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#define MISC_OUT_ADDR CPLD_BASE + 0x0B |
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/* Addresses used on I2C bus */ |
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#define LM75_CHIP_ADDR 0x9C |
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#define LM75_CPU_ADDR 0x9E |
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#define SDRAM_SPD_ADDR 0xA0 |
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#define SDRAM_SPD_WRITE_ADDRESS (SDRAM_SPD_ADDR) |
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#define SDRAM_SPD_READ_ADDRESS (SDRAM_SPD_ADDR+1) |
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#ifndef FALSE |
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#define FALSE 0 |
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#endif |
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#ifndef TRUE |
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#define TRUE 1 |
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#endif |
@ -0,0 +1,597 @@ |
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/*
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* (C) Copyright 2003 |
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
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* |
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* See file CREDITS for list of people who contributed to this |
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* project. |
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* |
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* This program is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU General Public License as |
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* published by the Free Software Foundation; either version 2 of |
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* the License, or (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program; if not, write to the Free Software |
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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* MA 02111-1307 USA |
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*/ |
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/*
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* Modified 4/5/2001 |
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* Wait for completion of each sector erase command issued |
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* 4/5/2001 |
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* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com |
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*/ |
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#include <asm/u-boot.h> |
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#include <asm/processor.h> |
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#include <ppc4xx.h> |
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#include <common.h> |
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
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/*-----------------------------------------------------------------------
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* Functions |
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*/ |
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static ulong flash_get_size (vu_long *addr, flash_info_t *info); |
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static int write_word (flash_info_t *info, ulong dest, ulong data); |
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#ifdef MEIGSBOARD_ONBOARD_FLASH /* onboard = 2MB */ |
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# ifdef CONFIG_EXBITGEN |
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# define FLASH_WORD_SIZE unsigned long |
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# endif |
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#else /* Meigsboard socket flash = 512KB */ |
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# ifdef CONFIG_EXBITGEN |
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# define FLASH_WORD_SIZE unsigned char |
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# endif |
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#endif |
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#ifdef CONFIG_EXBITGEN |
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#define ADDR0 0x5555 |
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#define ADDR1 0x2aaa |
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#define FLASH_WORD_SIZE unsigned char |
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#endif |
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/*-----------------------------------------------------------------------
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*/ |
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unsigned long flash_init (void) |
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{ |
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unsigned long bank_size; |
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unsigned long tot_size; |
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unsigned long bank_addr; |
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int i; |
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/* Init: no FLASHes known */ |
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for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { |
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flash_info[i].flash_id = FLASH_UNKNOWN; |
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flash_info[i].size = 0; |
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} |
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tot_size = 0; |
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/* Detect Boot Flash */ |
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bank_addr = CFG_FLASH0_BASE; |
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bank_size = flash_get_size((vu_long *)bank_addr, &flash_info[0]); |
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if (bank_size > 0) { |
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(void)flash_protect(FLAG_PROTECT_CLEAR, |
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bank_addr, |
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bank_addr + bank_size - 1, |
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&flash_info[0]); |
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} |
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if (flash_info[0].flash_id == FLASH_UNKNOWN) { |
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printf ("## Unknown FLASH on Boot Flash Bank\n"); |
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} |
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flash_info[0].size = bank_size; |
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tot_size += bank_size; |
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/* Detect Application Flash */ |
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bank_addr = CFG_FLASH1_BASE; |
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for (i = 1; i < CFG_MAX_FLASH_BANKS; ++i) { |
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bank_size = flash_get_size((vu_long *)bank_addr, &flash_info[i]); |
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if (flash_info[i].flash_id == FLASH_UNKNOWN) { |
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break; |
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} |
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if (bank_size > 0) { |
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(void)flash_protect(FLAG_PROTECT_CLEAR, |
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bank_addr, |
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bank_addr + bank_size - 1, |
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&flash_info[i]); |
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} |
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flash_info[i].size = bank_size; |
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tot_size += bank_size; |
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bank_addr += bank_size; |
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} |
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if (flash_info[1].flash_id == FLASH_UNKNOWN) { |
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printf ("## Unknown FLASH on Application Flash Bank\n"); |
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} |
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|
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/* Protect monitor and environment sectors */ |
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#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE |
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flash_protect(FLAG_PROTECT_SET, |
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CFG_MONITOR_BASE, |
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CFG_MONITOR_BASE + monitor_flash_len - 1, |
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&flash_info[0]); |
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#if 0xfffffffc >= CFG_FLASH0_BASE
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#if 0xfffffffc <= CFG_FLASH0_BASE + CFG_FLASH0_SIZE - 1
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flash_protect(FLAG_PROTECT_SET, |
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0xfffffffc, 0xffffffff, |
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&flash_info[0]); |
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#endif |
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#endif |
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#endif |
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|
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#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR) |
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flash_protect(FLAG_PROTECT_SET, |
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CFG_ENV_ADDR, |
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CFG_ENV_ADDR + CFG_ENV_SIZE - 1, |
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&flash_info[0]); |
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#endif |
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return tot_size; |
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} |
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/*-----------------------------------------------------------------------
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*/ |
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void flash_print_info (flash_info_t *info) |
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{ |
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int i; |
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if (info->flash_id == FLASH_UNKNOWN) { |
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printf ("missing or unknown FLASH type\n"); |
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return; |
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} |
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|
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switch (info->flash_id & FLASH_VENDMASK) { |
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case FLASH_MAN_AMD: printf ("AMD "); break; |
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case FLASH_MAN_FUJ: printf ("FUJITSU "); break; |
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case FLASH_MAN_SST: printf ("SST "); break; |
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default: printf ("Unknown Vendor "); break; |
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} |
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|
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switch (info->flash_id & FLASH_TYPEMASK) { |
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case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n"); |
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break; |
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case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); |
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break; |
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case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); |
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break; |
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case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); |
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break; |
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case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); |
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break; |
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case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); |
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break; |
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case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); |
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break; |
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case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); |
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break; |
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case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); |
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break; |
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case FLASH_AMDLV033C: printf ("AM29LV033C (32 Mbit, uniform sector size)\n"); |
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break; |
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case FLASH_AMDLV065D: printf ("AM29LV065D (64 Mbit, uniform sector size)\n"); |
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break; |
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case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n"); |
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break; |
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case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n"); |
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break; |
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case FLASH_SST040: printf ("SST39LF/VF040 (4 Mbit, uniform sector size)\n"); |
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break; |
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default: printf ("Unknown Chip Type\n"); |
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break; |
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} |
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|
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printf (" Size: %ld KB in %d Sectors\n", |
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info->size >> 10, info->sector_count); |
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|
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printf (" Sector Start Addresses:"); |
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for (i=0; i<info->sector_count; ++i) { |
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if ((i % 5) == 0) |
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printf ("\n "); |
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printf (" %08lX%s", |
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info->start[i], |
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info->protect[i] ? " (RO)" : " " |
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); |
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} |
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printf ("\n"); |
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} |
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|
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/*-----------------------------------------------------------------------
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*/ |
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|
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|
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/*-----------------------------------------------------------------------
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*/ |
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|
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/*
|
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* The following code cannot be run from FLASH! |
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*/ |
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static ulong flash_get_size (vu_long *addr, flash_info_t *info) |
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{ |
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short i; |
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FLASH_WORD_SIZE value; |
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ulong base = (ulong)addr; |
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volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; |
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|
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/* Write auto select command: read Manufacturer ID */ |
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addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
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addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
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addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090; |
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|
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value = addr2[0]; |
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|
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switch (value) { |
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case (FLASH_WORD_SIZE)AMD_MANUFACT: |
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info->flash_id = FLASH_MAN_AMD; |
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break; |
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case (FLASH_WORD_SIZE)FUJ_MANUFACT: |
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info->flash_id = FLASH_MAN_FUJ; |
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break; |
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case (FLASH_WORD_SIZE)SST_MANUFACT: |
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info->flash_id = FLASH_MAN_SST; |
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break; |
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default: |
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info->flash_id = FLASH_UNKNOWN; |
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info->sector_count = 0; |
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info->size = 0; |
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return (0); /* no or unknown flash */ |
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} |
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|
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value = addr2[1]; /* device ID */ |
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|
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switch (value) { |
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case (FLASH_WORD_SIZE)AMD_ID_F040B: |
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info->flash_id += FLASH_AM040; |
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info->sector_count = 8; |
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info->size = 0x0080000; /* => 512 ko */ |
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break; |
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case (FLASH_WORD_SIZE)AMD_ID_LV400T: |
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info->flash_id += FLASH_AM400T; |
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info->sector_count = 11; |
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info->size = 0x00080000; |
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break; /* => 0.5 MB */ |
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|
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case (FLASH_WORD_SIZE)AMD_ID_LV400B: |
||||
info->flash_id += FLASH_AM400B; |
||||
info->sector_count = 11; |
||||
info->size = 0x00080000; |
||||
break; /* => 0.5 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV800T: |
||||
info->flash_id += FLASH_AM800T; |
||||
info->sector_count = 19; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV800B: |
||||
info->flash_id += FLASH_AM800B; |
||||
info->sector_count = 19; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV160T: |
||||
info->flash_id += FLASH_AM160T; |
||||
info->sector_count = 35; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV160B: |
||||
info->flash_id += FLASH_AM160B; |
||||
info->sector_count = 35; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV033C: |
||||
info->flash_id += FLASH_AMDLV033C; |
||||
info->sector_count = 64; |
||||
info->size = 0x00400000; |
||||
break; /* => 4 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV065D: |
||||
info->flash_id += FLASH_AMDLV065D; |
||||
info->sector_count = 128; |
||||
info->size = 0x00800000; |
||||
break; /* => 8 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV320T: |
||||
info->flash_id += FLASH_AM320T; |
||||
info->sector_count = 67; |
||||
info->size = 0x00400000; |
||||
break; /* => 4 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)AMD_ID_LV320B: |
||||
info->flash_id += FLASH_AM320B; |
||||
info->sector_count = 67; |
||||
info->size = 0x00400000; |
||||
break; /* => 4 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)SST_ID_xF800A: |
||||
info->flash_id += FLASH_SST800A; |
||||
info->sector_count = 16; |
||||
info->size = 0x00100000; |
||||
break; /* => 1 MB */ |
||||
|
||||
case (FLASH_WORD_SIZE)SST_ID_xF160A: |
||||
info->flash_id += FLASH_SST160A; |
||||
info->sector_count = 32; |
||||
info->size = 0x00200000; |
||||
break; /* => 2 MB */ |
||||
case (FLASH_WORD_SIZE)SST_ID_xF040: |
||||
info->flash_id += FLASH_SST040; |
||||
info->sector_count = 128; |
||||
info->size = 0x00080000; |
||||
break; /* => 512KB */ |
||||
|
||||
default: |
||||
info->flash_id = FLASH_UNKNOWN; |
||||
return (0); /* => no or unknown flash */ |
||||
|
||||
} |
||||
|
||||
/* set up sector start address table */ |
||||
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || |
||||
(info->flash_id == FLASH_AM040) || |
||||
(info->flash_id == FLASH_AMDLV033C) || |
||||
(info->flash_id == FLASH_AMDLV065D)) { |
||||
ulong sectsize = info->size / info->sector_count; |
||||
for (i = 0; i < info->sector_count; i++) |
||||
info->start[i] = base + (i * sectsize); |
||||
} else { |
||||
if (info->flash_id & FLASH_BTYPE) { |
||||
/* set sector offsets for bottom boot block type */ |
||||
info->start[0] = base + 0x00000000; |
||||
info->start[1] = base + 0x00004000; |
||||
info->start[2] = base + 0x00006000; |
||||
info->start[3] = base + 0x00008000; |
||||
for (i = 4; i < info->sector_count; i++) { |
||||
info->start[i] = base + (i * 0x00010000) - 0x00030000; |
||||
} |
||||
} else { |
||||
/* set sector offsets for top boot block type */ |
||||
i = info->sector_count - 1; |
||||
info->start[i--] = base + info->size - 0x00004000; |
||||
info->start[i--] = base + info->size - 0x00006000; |
||||
info->start[i--] = base + info->size - 0x00008000; |
||||
for (; i >= 0; i--) { |
||||
info->start[i] = base + i * 0x00010000; |
||||
} |
||||
} |
||||
} |
||||
|
||||
/* check for protected sectors */ |
||||
for (i = 0; i < info->sector_count; i++) { |
||||
/* read sector protection at sector address, (A7 .. A0) = 0x02 */ |
||||
/* D0 = 1 if protected */ |
||||
|
||||
addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); |
||||
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) |
||||
info->protect[i] = 0; |
||||
else |
||||
info->protect[i] = addr2[2] & 1; |
||||
} |
||||
|
||||
/* switch to the read mode */ |
||||
if (info->flash_id != FLASH_UNKNOWN) { |
||||
addr2 = (FLASH_WORD_SIZE *)info->start[0]; |
||||
*addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ |
||||
} |
||||
|
||||
return (info->size); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
int flash_erase (flash_info_t *info, int s_first, int s_last) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); |
||||
volatile FLASH_WORD_SIZE *addr2; |
||||
int flag, prot, sect; |
||||
ulong start, now, last; |
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) { |
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("- missing\n"); |
||||
} else { |
||||
printf ("- no sectors to erase\n"); |
||||
} |
||||
return 1; |
||||
} |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("Can't erase unknown flash type - aborted\n"); |
||||
return 1; |
||||
} |
||||
|
||||
prot = 0; |
||||
for (sect=s_first; sect<=s_last; ++sect) { |
||||
if (info->protect[sect]) { |
||||
prot++; |
||||
} |
||||
} |
||||
|
||||
if (prot) { |
||||
printf ("- Warning: %d protected sectors will not be erased!\n", |
||||
prot); |
||||
} else { |
||||
printf ("\n"); |
||||
} |
||||
|
||||
start = get_timer (0); |
||||
last = start; |
||||
/* Start erase on unprotected sectors */ |
||||
for (sect = s_first; sect <= s_last; sect++) { |
||||
if (info->protect[sect] == 0) { /* not protected */ |
||||
addr2 = (FLASH_WORD_SIZE *)(info->start[sect]); |
||||
|
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts(); |
||||
|
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; |
||||
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[0] = (FLASH_WORD_SIZE)0x00300030; |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts(); |
||||
|
||||
/* wait at least 80us - let's wait 1 ms */ |
||||
udelay (1000); |
||||
|
||||
while ((addr2[0] & 0x00800080) != |
||||
(FLASH_WORD_SIZE) 0x00800080) { |
||||
if ((now=get_timer(start)) > |
||||
CFG_FLASH_ERASE_TOUT) { |
||||
printf ("Timeout\n"); |
||||
addr[0] = (FLASH_WORD_SIZE)0x00F000F0; |
||||
return 1; |
||||
} |
||||
|
||||
/* show that we're waiting */ |
||||
if ((now - last) > 1000) { /* every second */ |
||||
putc ('.'); |
||||
last = now; |
||||
} |
||||
} |
||||
|
||||
addr[0] = (FLASH_WORD_SIZE)0x00F000F0; |
||||
} |
||||
} |
||||
|
||||
printf (" done\n"); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
|
||||
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
||||
{ |
||||
ulong cp, wp, data; |
||||
int i, l, rc; |
||||
|
||||
wp = (addr & ~3); /* get lower word aligned address */ |
||||
|
||||
/*
|
||||
* handle unaligned start bytes |
||||
*/ |
||||
if ((l = addr - wp) != 0) { |
||||
data = 0; |
||||
for (i=0, cp=wp; i<l; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
for (; i<4 && cnt>0; ++i) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
++cp; |
||||
} |
||||
for (; cnt==0 && i<4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
|
||||
if ((rc = write_word(info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
} |
||||
|
||||
/*
|
||||
* handle word aligned part |
||||
*/ |
||||
while (cnt >= 4) { |
||||
data = 0; |
||||
for (i=0; i<4; ++i) { |
||||
data = (data << 8) | *src++; |
||||
} |
||||
if ((rc = write_word(info, wp, data)) != 0) { |
||||
return (rc); |
||||
} |
||||
wp += 4; |
||||
cnt -= 4; |
||||
} |
||||
|
||||
if (cnt == 0) { |
||||
return (0); |
||||
} |
||||
|
||||
/*
|
||||
* handle unaligned tail bytes |
||||
*/ |
||||
data = 0; |
||||
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { |
||||
data = (data << 8) | *src++; |
||||
--cnt; |
||||
} |
||||
for (; i<4; ++i, ++cp) { |
||||
data = (data << 8) | (*(uchar *)cp); |
||||
} |
||||
|
||||
return (write_word(info, wp, data)); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
static int write_word (flash_info_t *info, ulong dest, ulong data) |
||||
{ |
||||
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); |
||||
volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; |
||||
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; |
||||
ulong start; |
||||
int flag; |
||||
int i; |
||||
|
||||
/* Check if Flash is (sufficiently) erased */ |
||||
if ((*((volatile ulong *)dest) & data) != data) { |
||||
printf("dest = %08lx, *dest = %08lx, data = %08lx\n", |
||||
dest, *(volatile ulong *)dest, data); |
||||
return 2; |
||||
} |
||||
|
||||
for (i=0; i < 4/sizeof(FLASH_WORD_SIZE); i++) { |
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts(); |
||||
|
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; |
||||
addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; |
||||
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; |
||||
dest2[i] = data2[i]; |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts(); |
||||
|
||||
/* data polling for D7 */ |
||||
start = get_timer (0); |
||||
while ((dest2[i] & 0x00800080) != (data2[i] & 0x00800080)) { |
||||
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { |
||||
addr2[0] = (FLASH_WORD_SIZE)0x00F000F0; |
||||
return (1); |
||||
} |
||||
} |
||||
} |
||||
|
||||
addr2[0] = (FLASH_WORD_SIZE)0x00F000F0; |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,144 @@ |
||||
/* |
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
.resetvec 0xFFFFFFFC : |
||||
{ |
||||
*(.resetvec) |
||||
} = 0xffff |
||||
|
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
/* WARNING - the following is hand-optimized to fit within */ |
||||
/* the sector layout of our flash chips! XXX FIXME XXX */ |
||||
|
||||
cpu/ppc4xx/start.o (.text) |
||||
board/exbitgen/init.o (.text) |
||||
cpu/ppc4xx/kgdb.o (.text) |
||||
cpu/ppc4xx/traps.o (.text) |
||||
cpu/ppc4xx/interrupts.o (.text) |
||||
cpu/ppc4xx/serial.o (.text) |
||||
cpu/ppc4xx/cpu_init.o (.text) |
||||
cpu/ppc4xx/speed.o (.text) |
||||
common/dlmalloc.o (.text) |
||||
lib_generic/crc32.o (.text) |
||||
lib_ppc/extable.o (.text) |
||||
lib_generic/zlib.o (.text) |
||||
|
||||
/* . = env_offset;*/ |
||||
common/environment.o(.text) |
||||
|
||||
*(.text) |
||||
*(.fixup) |
||||
*(.got1) |
||||
} |
||||
_etext = .; |
||||
PROVIDE (etext = .); |
||||
.rodata : |
||||
{ |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x00FF) & 0xFFFFFF00; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_)>>2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(256); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(256); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
. = ALIGN(4); |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
@ -0,0 +1,40 @@ |
||||
#
|
||||
# (C) Copyright 2001 - 2003
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = lib$(BOARD).a
|
||||
|
||||
OBJS = $(BOARD).o flash.o
|
||||
|
||||
$(LIB): .depend $(OBJS) |
||||
$(AR) crv $@ $^
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(OBJS:.o=.c) |
||||
$(CC) -M $(CFLAGS) $(OBJS:.o=.c) > $@
|
||||
|
||||
sinclude .depend |
||||
|
||||
#########################################################################
|
@ -0,0 +1,30 @@ |
||||
#
|
||||
# (C) Copyright 2001 - 2003
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
#
|
||||
# SL8245 board
|
||||
#
|
||||
|
||||
TEXT_BASE = 0xFFF00000
|
||||
|
||||
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
|
@ -0,0 +1,488 @@ |
||||
/*
|
||||
* (C) Copyright 2001 - 2003 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <mpc824x.h> |
||||
#include <asm/processor.h> |
||||
|
||||
#if defined(CFG_ENV_IS_IN_FLASH) |
||||
# ifndef CFG_ENV_ADDR |
||||
# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET) |
||||
# endif |
||||
# ifndef CFG_ENV_SIZE |
||||
# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE |
||||
# endif |
||||
# ifndef CFG_ENV_SECT_SIZE |
||||
# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE |
||||
# endif |
||||
#endif |
||||
|
||||
#define FLASH_BANK_SIZE 0x800000 |
||||
#define MAIN_SECT_SIZE 0x40000 |
||||
#define PARAM_SECT1_SIZE 0x20000 |
||||
#define PARAM_SECT23_SIZE 0x8000 |
||||
#define PARAM_SECT4_SIZE 0x10000 |
||||
|
||||
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; |
||||
|
||||
static int write_data (flash_info_t *info, ulong dest, ulong *data); |
||||
static void write_via_fpu(vu_long *addr, ulong *data); |
||||
static __inline__ unsigned long get_msr(void); |
||||
static __inline__ void set_msr(unsigned long msr); |
||||
|
||||
/*---------------------------------------------------------------------*/ |
||||
#undef DEBUG_FLASH |
||||
|
||||
/*---------------------------------------------------------------------*/ |
||||
#ifdef DEBUG_FLASH |
||||
#define DEBUGF(fmt,args...) printf(fmt ,##args) |
||||
#else |
||||
#define DEBUGF(fmt,args...) |
||||
#endif |
||||
/*---------------------------------------------------------------------*/ |
||||
|
||||
#define __align__ __attribute__ ((aligned (8))) |
||||
static __align__ ulong precmd0[2] = { 0x00aa00aa, 0x00aa00aa }; |
||||
static __align__ ulong precmd1[2] = { 0x00550055, 0x00550055 }; |
||||
static __align__ ulong cmdid[2] = { 0x00900090, 0x00900090 }; |
||||
static __align__ ulong cmderase[2] = { 0x00800080, 0x00800080 }; |
||||
static __align__ ulong cmdersusp[2] = { 0x00b000b0, 0x00b000b0 }; |
||||
static __align__ ulong cmdsecter[2] = { 0x00300030, 0x00300030 }; |
||||
static __align__ ulong cmdprog[2] = { 0x00a000a0, 0x00a000a0 }; |
||||
static __align__ ulong cmdres[2] = { 0x00f000f0, 0x00f000f0 }; |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
unsigned long flash_init (void) |
||||
{ |
||||
int i, j; |
||||
ulong size = 0; |
||||
|
||||
for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { |
||||
vu_long *addr = (vu_long *) (CFG_FLASH_BASE + i * FLASH_BANK_SIZE); |
||||
|
||||
write_via_fpu (&addr[0xaaa], precmd0); |
||||
write_via_fpu (&addr[0x554], precmd1); |
||||
write_via_fpu (&addr[0xaaa], cmdid); |
||||
|
||||
DEBUGF ("Flash bank # %d:\n" |
||||
"\tManuf. ID @ 0x%08lX: 0x%08lX\n" |
||||
"\tDevice ID @ 0x%08lX: 0x%08lX\n", |
||||
i, |
||||
(ulong) (&addr[0]), addr[0], |
||||
(ulong) (&addr[2]), addr[2]); |
||||
|
||||
if ((addr[0] == addr[1]) && (addr[0] == AMD_MANUFACT) && |
||||
(addr[2] == addr[3]) && (addr[2] == AMD_ID_LV160T)) { |
||||
flash_info[i].flash_id = (FLASH_MAN_AMD & FLASH_VENDMASK) | |
||||
(FLASH_AM160T & FLASH_TYPEMASK); |
||||
} else { |
||||
flash_info[i].flash_id = FLASH_UNKNOWN; |
||||
write_via_fpu (addr, cmdres); |
||||
goto Done; |
||||
} |
||||
|
||||
DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id); |
||||
|
||||
write_via_fpu (addr, cmdres); |
||||
|
||||
flash_info[i].size = FLASH_BANK_SIZE; |
||||
flash_info[i].sector_count = CFG_MAX_FLASH_SECT; |
||||
memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); |
||||
for (j = 0; j < 32; j++) { |
||||
flash_info[i].start[j] = CFG_FLASH_BASE + |
||||
i * FLASH_BANK_SIZE + j * MAIN_SECT_SIZE; |
||||
} |
||||
flash_info[i].start[32] = |
||||
flash_info[i].start[31] + PARAM_SECT1_SIZE; |
||||
flash_info[i].start[33] = |
||||
flash_info[i].start[32] + PARAM_SECT23_SIZE; |
||||
flash_info[i].start[34] = |
||||
flash_info[i].start[33] + PARAM_SECT23_SIZE; |
||||
size += flash_info[i].size; |
||||
} |
||||
|
||||
/* Protect monitor and environment sectors
|
||||
*/ |
||||
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE |
||||
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE |
||||
flash_protect ( FLAG_PROTECT_SET, |
||||
CFG_MONITOR_BASE, |
||||
CFG_MONITOR_BASE + monitor_flash_len - 1, |
||||
&flash_info[1]); |
||||
#else |
||||
flash_protect ( FLAG_PROTECT_SET, |
||||
CFG_MONITOR_BASE, |
||||
CFG_MONITOR_BASE + monitor_flash_len - 1, |
||||
&flash_info[0]); |
||||
#endif |
||||
#endif |
||||
|
||||
#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR) |
||||
#if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE |
||||
flash_protect ( FLAG_PROTECT_SET, |
||||
CFG_ENV_ADDR, |
||||
CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[1]); |
||||
#else |
||||
flash_protect ( FLAG_PROTECT_SET, |
||||
CFG_ENV_ADDR, |
||||
CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); |
||||
#endif |
||||
#endif |
||||
|
||||
Done: |
||||
return size; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
void flash_print_info (flash_info_t * info) |
||||
{ |
||||
int i; |
||||
|
||||
switch ((i = info->flash_id & FLASH_VENDMASK)) { |
||||
case (FLASH_MAN_AMD & FLASH_VENDMASK): |
||||
printf ("Intel: "); |
||||
break; |
||||
default: |
||||
printf ("Unknown Vendor 0x%04x ", i); |
||||
break; |
||||
} |
||||
|
||||
switch ((i = info->flash_id & FLASH_TYPEMASK)) { |
||||
case (FLASH_AM160T & FLASH_TYPEMASK): |
||||
printf ("AM29LV160BT (16Mbit)\n"); |
||||
break; |
||||
default: |
||||
printf ("Unknown Chip Type 0x%04x\n", i); |
||||
goto Done; |
||||
break; |
||||
} |
||||
|
||||
printf (" Size: %ld MB in %d Sectors\n", |
||||
info->size >> 20, info->sector_count); |
||||
|
||||
printf (" Sector Start Addresses:"); |
||||
for (i = 0; i < info->sector_count; i++) { |
||||
if ((i % 5) == 0) { |
||||
printf ("\n "); |
||||
} |
||||
printf (" %08lX%s", info->start[i], |
||||
info->protect[i] ? " (RO)" : " "); |
||||
} |
||||
printf ("\n"); |
||||
|
||||
Done: |
||||
return; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
|
||||
int flash_erase (flash_info_t * info, int s_first, int s_last) |
||||
{ |
||||
int flag, prot, sect; |
||||
ulong start, now, last; |
||||
|
||||
DEBUGF ("Erase flash bank %d sect %d ... %d\n", |
||||
info - &flash_info[0], s_first, s_last); |
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) { |
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
printf ("- missing\n"); |
||||
} else { |
||||
printf ("- no sectors to erase\n"); |
||||
} |
||||
return 1; |
||||
} |
||||
|
||||
if ((info->flash_id & FLASH_VENDMASK) != |
||||
(FLASH_MAN_AMD & FLASH_VENDMASK)) { |
||||
printf ("Can erase only AMD flash types - aborted\n"); |
||||
return 1; |
||||
} |
||||
|
||||
prot = 0; |
||||
for (sect = s_first; sect <= s_last; ++sect) { |
||||
if (info->protect[sect]) { |
||||
prot++; |
||||
} |
||||
} |
||||
|
||||
if (prot) { |
||||
printf ("- Warning: %d protected sectors will not be erased!\n", |
||||
prot); |
||||
} else { |
||||
printf ("\n"); |
||||
} |
||||
|
||||
start = get_timer (0); |
||||
last = start; |
||||
/* Start erase on unprotected sectors */ |
||||
for (sect = s_first; sect <= s_last; sect++) { |
||||
if (info->protect[sect] == 0) { /* not protected */ |
||||
vu_long *addr = (vu_long *) (info->start[sect]); |
||||
|
||||
DEBUGF ("Erase sect %d @ 0x%08lX\n", sect, (ulong) addr); |
||||
|
||||
/* Disable interrupts which might cause a timeout
|
||||
* here. |
||||
*/ |
||||
flag = disable_interrupts (); |
||||
|
||||
write_via_fpu (&addr[0xaaa], precmd0); |
||||
write_via_fpu (&addr[0x554], precmd1); |
||||
write_via_fpu (&addr[0xaaa], cmderase); |
||||
write_via_fpu (&addr[0xaaa], precmd0); |
||||
write_via_fpu (&addr[0x554], precmd1); |
||||
write_via_fpu (&addr[0xaaa], cmdsecter); |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts (); |
||||
|
||||
/* wait at least 80us - let's wait 1 ms */ |
||||
udelay (1000); |
||||
|
||||
while (((addr[0] & 0x00800080) != 0x00800080) || |
||||
((addr[1] & 0x00800080) != 0x00800080)) { |
||||
if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) { |
||||
printf ("Timeout\n"); |
||||
write_via_fpu (addr, cmdersusp); |
||||
write_via_fpu (addr, cmdres); |
||||
return 1; |
||||
} |
||||
|
||||
/* show that we're waiting */ |
||||
if ((now - last) > 1000) { /* every second */ |
||||
putc ('.'); |
||||
last = now; |
||||
} |
||||
} |
||||
|
||||
write_via_fpu (addr, cmdres); |
||||
} |
||||
} |
||||
printf (" done\n"); |
||||
return 0; |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
* 4 - Flash not identified |
||||
*/ |
||||
|
||||
#define FLASH_WIDTH 8 /* flash bus width in bytes */ |
||||
|
||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
||||
{ |
||||
ulong wp, cp, msr; |
||||
int l, rc, i; |
||||
ulong data[2]; |
||||
ulong *datah = &data[0]; |
||||
ulong *datal = &data[1]; |
||||
|
||||
DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n", |
||||
addr, (ulong) src, cnt); |
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN) { |
||||
return 4; |
||||
} |
||||
|
||||
msr = get_msr (); |
||||
set_msr (msr | MSR_FP); |
||||
|
||||
wp = (addr & ~(FLASH_WIDTH - 1)); /* get lower aligned address */ |
||||
|
||||
/*
|
||||
* handle unaligned start bytes |
||||
*/ |
||||
if ((l = addr - wp) != 0) { |
||||
*datah = *datal = 0; |
||||
|
||||
for (i = 0, cp = wp; i < l; i++, cp++) { |
||||
if (i >= 4) { |
||||
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24); |
||||
} |
||||
|
||||
*datal = (*datal << 8) | (*(uchar *) cp); |
||||
} |
||||
for (; i < FLASH_WIDTH && cnt > 0; ++i) { |
||||
char tmp; |
||||
|
||||
tmp = *src; |
||||
|
||||
src++; |
||||
|
||||
if (i >= 4) { |
||||
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24); |
||||
} |
||||
|
||||
*datal = (*datal << 8) | tmp; |
||||
|
||||
--cnt; |
||||
++cp; |
||||
} |
||||
|
||||
for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) { |
||||
if (i >= 4) { |
||||
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24); |
||||
} |
||||
|
||||
*datal = (*datah << 8) | (*(uchar *) cp); |
||||
} |
||||
|
||||
if ((rc = write_data (info, wp, data)) != 0) { |
||||
set_msr (msr); |
||||
return (rc); |
||||
} |
||||
|
||||
wp += FLASH_WIDTH; |
||||
} |
||||
|
||||
/*
|
||||
* handle FLASH_WIDTH aligned part |
||||
*/ |
||||
while (cnt >= FLASH_WIDTH) { |
||||
*datah = *(ulong *) src; |
||||
*datal = *(ulong *) (src + 4); |
||||
if ((rc = write_data (info, wp, data)) != 0) { |
||||
set_msr (msr); |
||||
return (rc); |
||||
} |
||||
wp += FLASH_WIDTH; |
||||
cnt -= FLASH_WIDTH; |
||||
src += FLASH_WIDTH; |
||||
} |
||||
|
||||
if (cnt == 0) { |
||||
set_msr (msr); |
||||
return (0); |
||||
} |
||||
|
||||
/*
|
||||
* handle unaligned tail bytes |
||||
*/ |
||||
*datah = *datal = 0; |
||||
for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) { |
||||
char tmp; |
||||
|
||||
tmp = *src; |
||||
|
||||
src++; |
||||
|
||||
if (i >= 4) { |
||||
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24); |
||||
} |
||||
|
||||
*datal = (*datal << 8) | tmp; |
||||
|
||||
--cnt; |
||||
} |
||||
|
||||
for (; i < FLASH_WIDTH; ++i, ++cp) { |
||||
if (i >= 4) { |
||||
*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24); |
||||
} |
||||
|
||||
*datal = (*datal << 8) | (*(uchar *) cp); |
||||
} |
||||
|
||||
rc = write_data (info, wp, data); |
||||
set_msr (msr); |
||||
|
||||
return (rc); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Write a word to Flash, returns: |
||||
* 0 - OK |
||||
* 1 - write timeout |
||||
* 2 - Flash not erased |
||||
*/ |
||||
static int write_data (flash_info_t * info, ulong dest, ulong * data) |
||||
{ |
||||
vu_long *chip = (vu_long *) (info->start[0]); |
||||
vu_long *addr = (vu_long *) dest; |
||||
ulong start; |
||||
int flag; |
||||
|
||||
/* Check if Flash is (sufficiently) erased */ |
||||
if (((addr[0] & data[0]) != data[0]) || |
||||
((addr[1] & data[1]) != data[1])) { |
||||
return (2); |
||||
} |
||||
/* Disable interrupts which might cause a timeout here */ |
||||
flag = disable_interrupts (); |
||||
|
||||
write_via_fpu (&chip[0xaaa], precmd0); |
||||
write_via_fpu (&chip[0x554], precmd1); |
||||
write_via_fpu (&chip[0xaaa], cmdprog); |
||||
write_via_fpu (addr, data); |
||||
|
||||
/* re-enable interrupts if necessary */ |
||||
if (flag) |
||||
enable_interrupts (); |
||||
|
||||
start = get_timer (0); |
||||
|
||||
while (((addr[0] & 0x00800080) != (data[0] & 0x00800080)) || |
||||
((addr[1] & 0x00800080) != (data[1] & 0x00800080))) { |
||||
if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { |
||||
write_via_fpu (chip, cmdres); |
||||
return (1); |
||||
} |
||||
} |
||||
|
||||
write_via_fpu (chip, cmdres); |
||||
|
||||
return (0); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
static void write_via_fpu (vu_long * addr, ulong * data) |
||||
{ |
||||
__asm__ __volatile__ ("lfd 1, 0(%0)"::"r" (data)); |
||||
__asm__ __volatile__ ("stfd 1, 0(%0)"::"r" (addr)); |
||||
} |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/ |
||||
static __inline__ unsigned long get_msr (void) |
||||
{ |
||||
unsigned long msr; |
||||
|
||||
__asm__ __volatile__ ("mfmsr %0":"=r" (msr):); |
||||
|
||||
return msr; |
||||
} |
||||
|
||||
static __inline__ void set_msr (unsigned long msr) |
||||
{ |
||||
__asm__ __volatile__ ("mtmsr %0"::"r" (msr)); |
||||
} |
@ -0,0 +1,86 @@ |
||||
/*
|
||||
* (C) Copyright 2003 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <mpc824x.h> |
||||
|
||||
int checkboard (void) |
||||
{ |
||||
ulong busfreq = get_bus_freq(0); |
||||
char buf[32]; |
||||
|
||||
printf("Board: SL8245, local bus @ %s MHz\n", strmhz(buf, busfreq)); |
||||
return 0; |
||||
} |
||||
|
||||
long int initdram (int board_type) |
||||
{ |
||||
#ifndef CFG_RAMBOOT |
||||
int i, cnt; |
||||
volatile uchar * base= CFG_SDRAM_BASE; |
||||
volatile ulong * addr; |
||||
ulong save[32]; |
||||
ulong val, ret = 0; |
||||
|
||||
for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) { |
||||
addr = (volatile ulong *)base + cnt; |
||||
save[i++] = *addr; |
||||
*addr = ~cnt; |
||||
} |
||||
|
||||
addr = (volatile ulong *)base; |
||||
save[i] = *addr; |
||||
*addr = 0; |
||||
|
||||
if (*addr != 0) { |
||||
*addr = save[i]; |
||||
goto Done; |
||||
} |
||||
|
||||
for (cnt = 1; cnt < CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) { |
||||
addr = (volatile ulong *)base + cnt; |
||||
val = *addr; |
||||
*addr = save[--i]; |
||||
if (val != ~cnt) { |
||||
ulong new_bank0_end = cnt * sizeof(long) - 1; |
||||
ulong mear1 = mpc824x_mpc107_getreg(MEAR1); |
||||
ulong emear1 = mpc824x_mpc107_getreg(EMEAR1); |
||||
mear1 = (mear1 & 0xFFFFFF00) | |
||||
((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT); |
||||
emear1 = (emear1 & 0xFFFFFF00) | |
||||
((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT); |
||||
mpc824x_mpc107_setreg(MEAR1, mear1); |
||||
mpc824x_mpc107_setreg(EMEAR1, emear1); |
||||
|
||||
ret = cnt * sizeof(long); |
||||
goto Done; |
||||
} |
||||
} |
||||
|
||||
ret = CFG_MAX_RAM_SIZE; |
||||
Done: |
||||
return ret; |
||||
#else |
||||
return CFG_MAX_RAM_SIZE; |
||||
#endif |
||||
} |
@ -0,0 +1,128 @@ |
||||
/* |
||||
* (C) Copyright 2001 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
OUTPUT_ARCH(powerpc) |
||||
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); |
||||
/* Do we need any of these for elf? |
||||
__DYNAMIC = 0; */ |
||||
SECTIONS |
||||
{ |
||||
/* Read-only sections, merged into text segment: */ |
||||
. = + SIZEOF_HEADERS; |
||||
.interp : { *(.interp) } |
||||
.hash : { *(.hash) } |
||||
.dynsym : { *(.dynsym) } |
||||
.dynstr : { *(.dynstr) } |
||||
.rel.text : { *(.rel.text) } |
||||
.rela.text : { *(.rela.text) } |
||||
.rel.data : { *(.rel.data) } |
||||
.rela.data : { *(.rela.data) } |
||||
.rel.rodata : { *(.rel.rodata) } |
||||
.rela.rodata : { *(.rela.rodata) } |
||||
.rel.got : { *(.rel.got) } |
||||
.rela.got : { *(.rela.got) } |
||||
.rel.ctors : { *(.rel.ctors) } |
||||
.rela.ctors : { *(.rela.ctors) } |
||||
.rel.dtors : { *(.rel.dtors) } |
||||
.rela.dtors : { *(.rela.dtors) } |
||||
.rel.bss : { *(.rel.bss) } |
||||
.rela.bss : { *(.rela.bss) } |
||||
.rel.plt : { *(.rel.plt) } |
||||
.rela.plt : { *(.rela.plt) } |
||||
.init : { *(.init) } |
||||
.plt : { *(.plt) } |
||||
.text : |
||||
{ |
||||
cpu/mpc824x/start.o (.text) |
||||
lib_ppc/board.o (.text) |
||||
lib_ppc/ppcstring.o (.text) |
||||
lib_generic/vsprintf.o (.text) |
||||
lib_generic/crc32.o (.text) |
||||
lib_generic/zlib.o (.text) |
||||
|
||||
. = DEFINED(env_offset) ? env_offset : .; |
||||
common/environment.o (.text) |
||||
|
||||
*(.text) |
||||
|
||||
*(.fixup) |
||||
*(.got1) |
||||
. = ALIGN(16); |
||||
*(.rodata) |
||||
*(.rodata1) |
||||
} |
||||
.fini : { *(.fini) } =0 |
||||
.ctors : { *(.ctors) } |
||||
.dtors : { *(.dtors) } |
||||
|
||||
/* Read-write section, merged into data segment: */ |
||||
. = (. + 0x0FFF) & 0xFFFFF000; |
||||
_erotext = .; |
||||
PROVIDE (erotext = .); |
||||
.reloc : |
||||
{ |
||||
*(.got) |
||||
_GOT2_TABLE_ = .; |
||||
*(.got2) |
||||
_FIXUP_TABLE_ = .; |
||||
*(.fixup) |
||||
} |
||||
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; |
||||
__fixup_entries = (. - _FIXUP_TABLE_) >> 2; |
||||
|
||||
.data : |
||||
{ |
||||
*(.data) |
||||
*(.data1) |
||||
*(.sdata) |
||||
*(.sdata2) |
||||
*(.dynamic) |
||||
CONSTRUCTORS |
||||
} |
||||
_edata = .; |
||||
PROVIDE (edata = .); |
||||
|
||||
__start___ex_table = .; |
||||
__ex_table : { *(__ex_table) } |
||||
__stop___ex_table = .; |
||||
|
||||
. = ALIGN(4096); |
||||
__init_begin = .; |
||||
.text.init : { *(.text.init) } |
||||
.data.init : { *(.data.init) } |
||||
. = ALIGN(4096); |
||||
__init_end = .; |
||||
|
||||
__bss_start = .; |
||||
.bss : |
||||
{ |
||||
*(.sbss) *(.scommon) |
||||
*(.dynbss) |
||||
*(.bss) |
||||
*(COMMON) |
||||
} |
||||
|
||||
_end = . ; |
||||
PROVIDE (end = .); |
||||
} |
||||
|
@ -0,0 +1,213 @@ |
||||
/*
|
||||
* (C) Copyright 2000 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/*
|
||||
* board/config.h - configuration options, board specific |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/*
|
||||
* High Level Configuration Options |
||||
* (easy to change) |
||||
*/ |
||||
|
||||
#define CONFIG_405GP 1 /* This is a PPC405GP CPU */ |
||||
#define CONFIG_4xx 1 /* ...member of PPC4xx family */ |
||||
#define CONFIG_EXBITGEN 1 /* on a Exbit Generic board */ |
||||
|
||||
#define CONFIG_BOARD_PRE_INIT 1 /* Call board_pre_init */ |
||||
|
||||
#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */ |
||||
|
||||
/* I2C configuration */ |
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */ |
||||
#define CFG_I2C_SPEED 40000 /* I2C speed */ |
||||
#define CFG_I2C_SLAVE 0x7F /* I2C slave address */ |
||||
|
||||
/* environment is in EEPROM */ |
||||
#define CFG_ENV_IS_IN_EEPROM 1 |
||||
#undef CFG_ENV_IS_IN_FLASH |
||||
#undef CFG_ENV_IS_IN_NVRAM |
||||
|
||||
#ifdef CFG_ENV_IS_IN_EEPROM |
||||
#define CFG_I2C_EEPROM_ADDR 0x56 /* 1010110 */ |
||||
#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 8-bit internal addressing */ |
||||
#define CFG_I2C_EEPROM_ADDR_OVERFLOW 1 /* ... and 1 bit in I2C address */ |
||||
#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 4 bytes per page */ |
||||
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 40 /* write takes up to 40 msec */ |
||||
#define CFG_ENV_OFFSET 4 /* Offset of Environment Sector */ |
||||
#define CFG_ENV_SIZE 350 /* that is 350 bytes only! */ |
||||
#endif |
||||
|
||||
#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */ |
||||
/* Explanation:
|
||||
autbooting is altogether disabled and cannot be |
||||
enabled if CONFIG_BOOTDELAY is negative. |
||||
If you want shorter bootdelay, then
|
||||
- "setenv bootdelay <delay>" to the proper value |
||||
*/ |
||||
|
||||
#define CONFIG_BOOTCOMMAND "bootm 20400000 20800000" |
||||
|
||||
#define CONFIG_BOOTARGS "root=/dev/ram " \ |
||||
"ramdisk_size=32768 " \
|
||||
"console=ttyS0,115200 " \
|
||||
"ram=128M debug" |
||||
|
||||
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
||||
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
||||
|
||||
#define CONFIG_MII 1 /* MII PHY management */ |
||||
#define CONFIG_PHY_ADDR 0 /* PHY address */ |
||||
|
||||
#define CONFIG_COMMANDS (CONFIG_CMD_DFL) |
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||
#include <cmd_confdefs.h> |
||||
|
||||
#undef CONFIG_WATCHDOG /* watchdog disabled */ |
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#define CFG_LONGHELP /* undef to save memory */ |
||||
#define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ |
||||
#else |
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
#endif |
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ |
||||
#define CFG_MAXARGS 16 /* max number of command args */ |
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
||||
|
||||
#define CFG_MEMTEST_START 0x0400000 /* memtest works on */ |
||||
#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */ |
||||
|
||||
/* UART configuration */ |
||||
#define CFG_BASE_BAUD 691200 |
||||
|
||||
/* Default baud rate */ |
||||
#define CONFIG_BAUDRATE 115200 |
||||
|
||||
/* The following table includes the supported baudrates */ |
||||
#define CFG_BAUDRATE_TABLE \ |
||||
{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
|
||||
57600, 115200, 230400, 460800, 921600 } |
||||
|
||||
#define CFG_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */ |
||||
|
||||
#define CFG_LOAD_ADDR 0x100000 /* default load address */ |
||||
#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ |
||||
|
||||
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* PCI stuff |
||||
*----------------------------------------------------------------------- |
||||
*/ |
||||
#undef CONFIG_PCI /* no pci support */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* External peripheral base address |
||||
*----------------------------------------------------------------------- |
||||
*/ |
||||
#undef CONFIG_IDE_PCMCIA /* no pcmcia interface required */ |
||||
#undef CONFIG_IDE_LED /* no led for ide supported */ |
||||
#undef CONFIG_IDE_RESET /* no reset for ide supported */ |
||||
|
||||
#define CFG_KEY_REG_BASE_ADDR 0xF0100000 |
||||
#define CFG_IR_REG_BASE_ADDR 0xF0200000 |
||||
#define CFG_FPGA_REG_BASE_ADDR 0xF0300000 |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Start addresses for the final memory configuration |
||||
* (Set up by the startup code) |
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0 |
||||
*/ |
||||
#define CFG_SDRAM_BASE 0x00000000 |
||||
#define CFG_FLASH0_BASE 0xFFF80000 |
||||
#define CFG_FLASH0_SIZE 0x00080000 |
||||
#define CFG_FLASH1_BASE 0x20000000 |
||||
#define CFG_FLASH1_SIZE 0x02000000 |
||||
#define CFG_FLASH_BASE CFG_FLASH0_BASE |
||||
#define CFG_FLASH_SIZE CFG_FLASH0_SIZE |
||||
#define CFG_MONITOR_BASE TEXT_BASE |
||||
#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */ |
||||
#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */ |
||||
|
||||
#if CFG_MONITOR_BASE < CFG_FLASH0_BASE |
||||
#define CFG_RAMSTART |
||||
#endif |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization. |
||||
*/ |
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization |
||||
*/ |
||||
#define CFG_MAX_FLASH_BANKS 5 /* max number of memory banks */ |
||||
#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ |
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
||||
|
||||
#ifdef CFG_ENV_IS_IN_FLASH |
||||
#define CFG_ENV_OFFSET 0x00060000 /* Offset of Environment Sector */ |
||||
#define CFG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */ |
||||
#define CFG_ENV_SECT_SIZE 0x00010000 /* see README - env sector total size */ |
||||
#endif |
||||
|
||||
/* On Chip Memory location/size */ |
||||
#define CFG_OCM_DATA_ADDR 0xF8000000 |
||||
#define CFG_OCM_DATA_SIZE 0x1000 |
||||
|
||||
/* Global info and initial stack */ |
||||
#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* inside of on-chip SRAM */ |
||||
#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */ |
||||
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ |
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET |
||||
|
||||
/* Cache configuration */ |
||||
#define CFG_DCACHE_SIZE 8192 |
||||
#define CFG_CACHELINE_SIZE 32 |
||||
|
||||
/*
|
||||
* Internal Definitions |
||||
* |
||||
* Boot Flags |
||||
*/ |
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */ |
||||
|
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
||||
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
||||
#endif |
||||
#endif /* __CONFIG_H */ |
@ -0,0 +1,268 @@ |
||||
/*
|
||||
* (C) Copyright 2001 - 2003 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
/*
|
||||
* Configuration settings for the SL8245 board. |
||||
*/ |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
|
||||
/*
|
||||
* board/config.h - configuration options, board specific |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/*
|
||||
* High Level Configuration Options |
||||
* (easy to change) |
||||
*/ |
||||
|
||||
#define CONFIG_MPC824X 1 |
||||
#define CONFIG_MPC8245 1 |
||||
#define CONFIG_SL8245 1 |
||||
|
||||
|
||||
#define CONFIG_CONS_INDEX 1 |
||||
#define CONFIG_BAUDRATE 115200 |
||||
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
||||
|
||||
#define CONFIG_BOOTDELAY 5 |
||||
|
||||
#define CONFIG_COMMANDS ( CONFIG_CMD_DFL & ~CFG_CMD_NET ) |
||||
|
||||
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ |
||||
|
||||
#include <cmd_confdefs.h> |
||||
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options |
||||
*/ |
||||
#undef CFG_LONGHELP /* undef to save memory */ |
||||
#define CFG_PROMPT "=> " /* Monitor Command Prompt */ |
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ |
||||
|
||||
/* Print Buffer Size
|
||||
*/ |
||||
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) |
||||
#define CFG_MAXARGS 8 /* Max number of command args */ |
||||
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ |
||||
#define CFG_LOAD_ADDR 0x00400000 /* Default load address */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Start addresses for the final memory configuration |
||||
* (Set up by the startup code) |
||||
* Please note that CFG_SDRAM_BASE _must_ start at 0 |
||||
*/ |
||||
#define CFG_SDRAM_BASE 0x00000000 |
||||
|
||||
#define CFG_FLASH_BASE0_PRELIM 0xFF800000 /* FLASH bank on RCS#0 */ |
||||
#define CFG_FLASH_BASE CFG_FLASH_BASE0_PRELIM |
||||
#define CFG_FLASH_BANKS { CFG_FLASH_BASE0_PRELIM } |
||||
|
||||
#define CFG_RESET_ADDRESS 0xFFF00100 |
||||
|
||||
#define CFG_EUMB_ADDR 0xFC000000 |
||||
|
||||
#define CFG_MONITOR_BASE TEXT_BASE |
||||
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
||||
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
||||
|
||||
#define CFG_MEMTEST_START 0x00004000 /* memtest works on */ |
||||
#define CFG_MEMTEST_END 0x02000000 /* 0 ... 32 MB in DRAM */ |
||||
|
||||
/* Maximum amount of RAM.
|
||||
*/ |
||||
#define CFG_MAX_RAM_SIZE 0x10000000 /* 0 .. 256 MB of (S)DRAM */ |
||||
|
||||
|
||||
#if CFG_MONITOR_BASE >= CFG_FLASH_BASE |
||||
#undef CFG_RAMBOOT |
||||
#else |
||||
#define CFG_RAMBOOT |
||||
#endif |
||||
|
||||
/*
|
||||
* NS16550 Configuration |
||||
*/ |
||||
#define CFG_NS16550 |
||||
#define CFG_NS16550_SERIAL |
||||
|
||||
#define CFG_NS16550_REG_SIZE 1 |
||||
|
||||
#define CFG_NS16550_CLK get_bus_freq(0) |
||||
|
||||
#define CFG_NS16550_COM1 (CFG_EUMB_ADDR + 0x4500) |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions for initial stack pointer and data area |
||||
*/ |
||||
|
||||
#define CFG_GBL_DATA_SIZE 128 |
||||
#define CFG_INIT_RAM_ADDR 0x40000000 |
||||
#define CFG_INIT_RAM_END 0x1000 |
||||
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) |
||||
|
||||
/*
|
||||
* Low Level Configuration Settings |
||||
* (address mappings, register initial values, etc.) |
||||
* You should know what you are doing if you make changes here. |
||||
* For the detail description refer to the MPC8240 user's manual. |
||||
*/ |
||||
|
||||
#define CONFIG_SYS_CLK_FREQ 66666666 /* external frequency to pll */ |
||||
#define CFG_HZ 1000 |
||||
|
||||
/* Bit-field values for MCCR1.
|
||||
*/ |
||||
#define CFG_ROMNAL 0 |
||||
#define CFG_ROMFAL 7 |
||||
#define CFG_BANK0_ROW 2 |
||||
|
||||
/* Bit-field values for MCCR2.
|
||||
*/ |
||||
#define CFG_REFINT 0x400 /* Refresh interval FIXME: was 0t430 */ |
||||
|
||||
/* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4.
|
||||
*/ |
||||
#define CFG_BSTOPRE 192 |
||||
|
||||
/* Bit-field values for MCCR3.
|
||||
*/ |
||||
#define CFG_REFREC 2 /* Refresh to activate interval */ |
||||
|
||||
/* Bit-field values for MCCR4.
|
||||
*/ |
||||
#define CFG_PRETOACT 2 /* Precharge to activate interval */ |
||||
#define CFG_ACTTOPRE 5 /* Activate to Precharge interval */ |
||||
#define CFG_ACTORW 3 /* FIXME was 2 */ |
||||
#define CFG_SDMODE_CAS_LAT 3 /* SDMODE CAS latancy */ |
||||
#define CFG_SDMODE_WRAP 0 /* SDMODE wrap type */ |
||||
#define CFG_REGISTERD_TYPE_BUFFER 1 |
||||
#define CFG_EXTROM 1 |
||||
#define CFG_REGDIMM 0 |
||||
|
||||
#define CFG_ODCR 0xff /* configures line driver impedances, */ |
||||
/* see 8245 book for bit definitions */ |
||||
#define CFG_PGMAX 0x32 /* how long the 8245 retains the */ |
||||
/* currently accessed page in memory */ |
||||
/* see 8245 book for details */ |
||||
|
||||
/* Memory bank settings.
|
||||
* Only bits 20-29 are actually used from these vales to set the |
||||
* start/end addresses. The upper two bits will always be 0, and the lower |
||||
* 20 bits will be 0x00000 for a start address, or 0xfffff for an end |
||||
* address. Refer to the MPC8240 book. |
||||
*/ |
||||
|
||||
#define CFG_BANK0_START 0x00000000 |
||||
#define CFG_BANK0_END (CFG_MAX_RAM_SIZE - 1) |
||||
#define CFG_BANK0_ENABLE 1 |
||||
#define CFG_BANK1_START 0x3ff00000 |
||||
#define CFG_BANK1_END 0x3fffffff |
||||
#define CFG_BANK1_ENABLE 0 |
||||
#define CFG_BANK2_START 0x3ff00000 |
||||
#define CFG_BANK2_END 0x3fffffff |
||||
#define CFG_BANK2_ENABLE 0 |
||||
#define CFG_BANK3_START 0x3ff00000 |
||||
#define CFG_BANK3_END 0x3fffffff |
||||
#define CFG_BANK3_ENABLE 0 |
||||
#define CFG_BANK4_START 0x3ff00000 |
||||
#define CFG_BANK4_END 0x3fffffff |
||||
#define CFG_BANK4_ENABLE 0 |
||||
#define CFG_BANK5_START 0x3ff00000 |
||||
#define CFG_BANK5_END 0x3fffffff |
||||
#define CFG_BANK5_ENABLE 0 |
||||
#define CFG_BANK6_START 0x3ff00000 |
||||
#define CFG_BANK6_END 0x3fffffff |
||||
#define CFG_BANK6_ENABLE 0 |
||||
#define CFG_BANK7_START 0x3ff00000 |
||||
#define CFG_BANK7_END 0x3fffffff |
||||
#define CFG_BANK7_ENABLE 0 |
||||
|
||||
#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) |
||||
#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) |
||||
|
||||
#define CFG_IBAT1L (CFG_INIT_RAM_ADDR | BATL_PP_10 | BATL_MEMCOHERENCE) |
||||
#define CFG_IBAT1U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP) |
||||
|
||||
#define CFG_IBAT2L (0x80000000 | BATL_PP_10 | BATL_CACHEINHIBIT) |
||||
#define CFG_IBAT2U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) |
||||
|
||||
#define CFG_IBAT3L (0xF0000000 | BATL_PP_10 | BATL_CACHEINHIBIT) |
||||
#define CFG_IBAT3U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) |
||||
|
||||
#define CFG_DBAT0L CFG_IBAT0L |
||||
#define CFG_DBAT0U CFG_IBAT0U |
||||
#define CFG_DBAT1L CFG_IBAT1L |
||||
#define CFG_DBAT1U CFG_IBAT1U |
||||
#define CFG_DBAT2L CFG_IBAT2L |
||||
#define CFG_DBAT2U CFG_IBAT2U |
||||
#define CFG_DBAT3L CFG_IBAT3L |
||||
#define CFG_DBAT3U CFG_IBAT3U |
||||
|
||||
/*
|
||||
* For booting Linux, the board info and command line data |
||||
* have to be in the first 8 MB of memory, since this is |
||||
* the maximum mapped by the Linux kernel during initialization. |
||||
*/ |
||||
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH organization |
||||
*/ |
||||
#define CFG_MAX_FLASH_BANKS 1 /* Max number of flash banks */ |
||||
#define CFG_MAX_FLASH_SECT 35 /* Max number of sectors per flash */ |
||||
|
||||
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ |
||||
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ |
||||
|
||||
|
||||
/* Warining: environment is not EMBEDDED in the U-Boot code.
|
||||
* It's stored in flash separately. |
||||
*/ |
||||
#define CFG_ENV_IS_IN_FLASH 1 |
||||
#define CFG_ENV_ADDR 0xFFFF0000 |
||||
#define CFG_ENV_SIZE 0x00010000 /* Size of the Environment */ |
||||
#define CFG_ENV_SECT_SIZE 0x00010000 /* Size of the Environment Sector */ |
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration |
||||
*/ |
||||
#define CFG_CACHELINE_SIZE 32 |
||||
#if (CONFIG_COMMANDS & CFG_CMD_KGDB) |
||||
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ |
||||
#endif |
||||
|
||||
/*
|
||||
* Internal Definitions |
||||
* |
||||
* Boot Flags |
||||
*/ |
||||
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ |
||||
#define BOOTFLAG_WARM 0x02 /* Software reboot */ |
||||
|
||||
#endif /* __CONFIG_H */ |
Loading…
Reference in new issue