From 33aae6b5ed54168b763f60021ef38423e45f72ca Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 10 Sep 2018 12:58:32 +0900 Subject: [PATCH 1/5] ARM: dts: uniphier: sync DT with Linux 4.19-rc1 Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld11-global.dts | 3 ++- arch/arm/dts/uniphier-ld11.dtsi | 2 +- arch/arm/dts/uniphier-ld20-global.dts | 3 ++- arch/arm/dts/uniphier-ld20.dtsi | 4 +++- arch/arm/dts/uniphier-ld4.dtsi | 3 +-- arch/arm/dts/uniphier-pinctrl.dtsi | 5 ----- arch/arm/dts/uniphier-pro4.dtsi | 3 +-- arch/arm/dts/uniphier-pxs2.dtsi | 3 +++ arch/arm/dts/uniphier-pxs3.dtsi | 2 +- arch/arm/dts/uniphier-sld8.dtsi | 3 +-- 10 files changed, 15 insertions(+), 16 deletions(-) diff --git a/arch/arm/dts/uniphier-ld11-global.dts b/arch/arm/dts/uniphier-ld11-global.dts index 11be2aa..744b36e 100644 --- a/arch/arm/dts/uniphier-ld11-global.dts +++ b/arch/arm/dts/uniphier-ld11-global.dts @@ -54,12 +54,13 @@ sound { compatible = "audio-graph-card"; label = "UniPhier LD11"; - widgets = "Headphone", "Headphone Jack"; + widgets = "Headphone", "Headphones"; dais = <&i2s_port2 &i2s_port3 &i2s_port4 &spdif_port0 &comp_spdif_port0>; + hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>; }; spdif-out { diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index 3f9237c..d63b56e 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -407,7 +407,7 @@ reg = <0x5a000000 0x400>; interrupts = <0 78 4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc_1v8>; + pinctrl-0 = <&pinctrl_emmc>; clocks = <&sys_clk 4>; resets = <&sys_rst 4>; bus-width = <8>; diff --git a/arch/arm/dts/uniphier-ld20-global.dts b/arch/arm/dts/uniphier-ld20-global.dts index fe6608e..1a5e7c2 100644 --- a/arch/arm/dts/uniphier-ld20-global.dts +++ b/arch/arm/dts/uniphier-ld20-global.dts @@ -54,12 +54,13 @@ sound { compatible = "audio-graph-card"; label = "UniPhier LD20"; - widgets = "Headphone", "Headphone Jack"; + widgets = "Headphone", "Headphones"; dais = <&i2s_port2 &i2s_port3 &i2s_port4 &spdif_port0 &comp_spdif_port0>; + hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>; }; spdif-out { diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index 6ffbf18..35867ab 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -58,6 +58,7 @@ clocks = <&sys_clk 32>; enable-method = "psci"; operating-points-v2 = <&cluster0_opp>; + #cooling-cells = <2>; }; cpu2: cpu@100 { @@ -77,6 +78,7 @@ clocks = <&sys_clk 33>; enable-method = "psci"; operating-points-v2 = <&cluster1_opp>; + #cooling-cells = <2>; }; }; @@ -512,7 +514,7 @@ reg = <0x5a000000 0x400>; interrupts = <0 78 4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc_1v8>; + pinctrl-0 = <&pinctrl_emmc>; clocks = <&sys_clk 4>; resets = <&sys_rst 4>; bus-width = <8>; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index 4545056..e3d3138 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -247,9 +247,8 @@ status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; - pinctrl-1 = <&pinctrl_emmc_1v8>; clocks = <&mio_clk 1>; reset-names = "host", "bridge"; resets = <&mio_rst 1>, <&mio_rst 4>; diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index 9dd9d49..2dc86d2 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -56,11 +56,6 @@ function = "emmc"; }; - pinctrl_emmc_1v8: emmc-1v8 { - groups = "emmc", "emmc_dat8"; - function = "emmc"; - }; - pinctrl_ether_mii: ether-mii { groups = "ether_mii"; function = "ether_mii"; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 8185b54..3cd9b72 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -281,9 +281,8 @@ status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; - pinctrl-1 = <&pinctrl_emmc_1v8>; clocks = <&mio_clk 1>; reset-names = "host", "bridge"; resets = <&mio_rst 1>, <&mio_rst 4>; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index f4101c0..48782a5 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -36,6 +36,7 @@ enable-method = "psci"; next-level-cache = <&l2>; operating-points-v2 = <&cpu_opp>; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -46,6 +47,7 @@ enable-method = "psci"; next-level-cache = <&l2>; operating-points-v2 = <&cpu_opp>; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -56,6 +58,7 @@ enable-method = "psci"; next-level-cache = <&l2>; operating-points-v2 = <&cpu_opp>; + #cooling-cells = <2>; }; }; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index cfeeecd..c6ec63c 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -327,7 +327,7 @@ reg = <0x5a000000 0x400>; interrupts = <0 78 4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_emmc_1v8>; + pinctrl-0 = <&pinctrl_emmc>; clocks = <&sys_clk 4>; resets = <&sys_rst 4>; bus-width = <8>; diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index f20926e..35c2f85 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -251,9 +251,8 @@ status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; - pinctrl-1 = <&pinctrl_emmc_1v8>; clocks = <&mio_clk 1>; reset-names = "host", "bridge"; resets = <&mio_rst 1>, <&mio_rst 4>; From 1a4bd3a095b2680b0012b3b62c5d89e6731747fc Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 10 Sep 2018 12:58:33 +0900 Subject: [PATCH 2/5] ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN again With the migration to distro-boot, the size of the U-Boot proper image for uniphier_v7_defconfig exceeded the current limit, 576KB. Increase it to 832KB. CONFIG_SYS_UBOOT_BASE must be moved as well to avoid the image over-wrap because the boot ROM of Pro4, Pro5, PXs2/LD6b loads the SPL to the physical address 0x100000. Signed-off-by: Masahiro Yamada --- include/configs/uniphier.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 21ed1d3..ff44749 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -60,7 +60,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_MONITOR_BASE 0 -#define CONFIG_SYS_MONITOR_LEN 0x00090000 /* 576KB */ +#define CONFIG_SYS_MONITOR_LEN 0x000d0000 /* 832KB */ #define CONFIG_SYS_FLASH_BASE 0 /* @@ -218,7 +218,7 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 /* subtract sizeof(struct image_header) */ -#define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40) +#define CONFIG_SYS_UBOOT_BASE (0x130000 - 0x40) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 From b07f6e9faf3a111bd88a1814f346d56a6d48d215 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 10 Sep 2018 12:58:34 +0900 Subject: [PATCH 3/5] ARM: uniphier: enable CONFIG_CMD_UBI Now that CONFIG_SYS_MONITOR_LEN increased, we have room for enabling more options again. Signed-off-by: Masahiro Yamada --- configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_v7_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index a06e791..7afdd7c 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)" +CONFIG_CMD_UBI=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index fc33b72..1b7bd5b 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_TIME=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)" +CONFIG_CMD_UBI=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" From c3ab1e118fc64b5ac49e949dab40507f6fdbbde3 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 10 Sep 2018 12:58:35 +0900 Subject: [PATCH 4/5] mmc: uniphier-sd: sync with Linux Sync with the driver code and the binding recently merged in Linux. Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld20.dtsi | 2 +- arch/arm/dts/uniphier-ld4.dtsi | 14 +++++++------- arch/arm/dts/uniphier-pinctrl.dtsi | 7 +------ arch/arm/dts/uniphier-pro4-ref.dts | 4 ---- arch/arm/dts/uniphier-pro4.dtsi | 23 ++++++++++------------- arch/arm/dts/uniphier-pro5.dtsi | 15 +++++++-------- arch/arm/dts/uniphier-pxs2.dtsi | 15 +++++++-------- arch/arm/dts/uniphier-pxs3.dtsi | 8 ++++++-- arch/arm/dts/uniphier-sld8.dtsi | 14 +++++++------- drivers/mmc/uniphier-sd.c | 4 +++- 10 files changed, 49 insertions(+), 57 deletions(-) diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index 35867ab..9970497 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -529,7 +529,7 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; interrupts = <0 76 4>; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index e3d3138..f505f64 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -225,13 +225,13 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a400000 0x200>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; @@ -243,19 +243,19 @@ }; emmc: sdhc@5a500000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&mio_clk 1>; - reset-names = "host", "bridge"; - resets = <&mio_rst 1>, <&mio_rst 4>; + reset-names = "host", "bridge", "hw"; + resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; + non-removable; }; usb0: usb@5a800100 { diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index 2dc86d2..aeb47b0 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -121,7 +121,7 @@ function = "sd"; }; - pinctrl_sd_1v8: sd-1v8 { + pinctrl_sd_uhs: sd-uhs { groups = "sd"; function = "sd"; }; @@ -131,11 +131,6 @@ function = "sd1"; }; - pinctrl_sd1_1v8: sd1-1v8 { - groups = "sd1"; - function = "sd1"; - }; - pinctrl_system_bus: system-bus { groups = "system_bus", "system_bus_cs1"; function = "system_bus"; diff --git a/arch/arm/dts/uniphier-pro4-ref.dts b/arch/arm/dts/uniphier-pro4-ref.dts index 198add3..06065eb 100644 --- a/arch/arm/dts/uniphier-pro4-ref.dts +++ b/arch/arm/dts/uniphier-pro4-ref.dts @@ -70,10 +70,6 @@ status = "okay"; }; -&sd1 { - status = "okay"; -}; - &usb2 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index 3cd9b72..8974844 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -259,13 +259,13 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a400000 0x200>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; @@ -277,36 +277,33 @@ }; emmc: sdhc@5a500000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&mio_clk 1>; - reset-names = "host", "bridge"; - resets = <&mio_rst 1>, <&mio_rst 4>; + reset-names = "host", "bridge", "hw"; + resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; + non-removable; }; sd1: sdhc@5a600000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a600000 0x200>; interrupts = <0 85 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sd1>; - pinctrl-1 = <&pinctrl_sd1_1v8>; clocks = <&mio_clk 2>; + reset-names = "host", "bridge"; resets = <&mio_rst 2>, <&mio_rst 5>; bus-width = <4>; cap-sd-highspeed; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; }; usb2: usb@5a800100 { diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi index 6aea9af..6e0ea79 100644 --- a/arch/arm/dts/uniphier-pro5.dtsi +++ b/arch/arm/dts/uniphier-pro5.dtsi @@ -480,30 +480,29 @@ }; emmc: sdhc@68400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1"; status = "disabled"; reg = <0x68400000 0x800>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&sd_clk 1>; - reset-names = "host"; - resets = <&sd_rst 1>; + reset-names = "host", "hw"; + resets = <&sd_rst 1>, <&sd_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; - no-3-3-v; + non-removable; }; sd: sdhc@68800000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1"; status = "disabled"; reg = <0x68800000 0x800>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&sd_clk 0>; reset-names = "host"; resets = <&sd_rst 0>; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 48782a5..63c1c2c 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -423,30 +423,29 @@ }; emmc: sdhc@5a000000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a000000 0x800>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&sd_clk 1>; - reset-names = "host"; - resets = <&sd_rst 1>; + reset-names = "host", "hw"; + resets = <&sd_rst 1>, <&sd_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; - no-3-3-v; + non-removable; }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&sd_clk 0>; reset-names = "host"; resets = <&sd_rst 0>; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index c6ec63c..daf7453 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -342,17 +342,21 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v3.1.1"; status = "disabled"; reg = <0x5a400000 0x800>; interrupts = <0 76 4>; - pinctrl-names = "default"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&sd_clk 0>; reset-names = "host"; resets = <&sd_rst 0>; bus-width = <4>; cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; }; soc_glue: soc-glue@5f800000 { diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index 35c2f85..437265b 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -229,13 +229,13 @@ }; sd: sdhc@5a400000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a400000 0x200>; interrupts = <0 76 4>; - pinctrl-names = "default", "1.8v"; + pinctrl-names = "default", "uhs"; pinctrl-0 = <&pinctrl_sd>; - pinctrl-1 = <&pinctrl_sd_1v8>; + pinctrl-1 = <&pinctrl_sd_uhs>; clocks = <&mio_clk 0>; reset-names = "host", "bridge"; resets = <&mio_rst 0>, <&mio_rst 3>; @@ -247,19 +247,19 @@ }; emmc: sdhc@5a500000 { - compatible = "socionext,uniphier-sdhc"; + compatible = "socionext,uniphier-sd-v2.91"; status = "disabled"; reg = <0x5a500000 0x200>; interrupts = <0 78 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc>; clocks = <&mio_clk 1>; - reset-names = "host", "bridge"; - resets = <&mio_rst 1>, <&mio_rst 4>; + reset-names = "host", "bridge", "hw"; + resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>; bus-width = <8>; - non-removable; cap-mmc-highspeed; cap-mmc-hw-reset; + non-removable; }; usb0: usb@5a800100 { diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c index ad5dbb3..813c284 100644 --- a/drivers/mmc/uniphier-sd.c +++ b/drivers/mmc/uniphier-sd.c @@ -25,7 +25,9 @@ static const struct dm_mmc_ops uniphier_sd_ops = { }; static const struct udevice_id uniphier_sd_match[] = { - { .compatible = "socionext,uniphier-sdhc", .data = 0 }, + { .compatible = "socionext,uniphier-sd-v2.91" }, + { .compatible = "socionext,uniphier-sd-v3.1" }, + { .compatible = "socionext,uniphier-sd-v3.1.1" }, { /* sentinel */ } }; From e39eed8f476b6f8861318fc122b546158edce259 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 10 Sep 2018 12:58:36 +0900 Subject: [PATCH 5/5] ARM: uniphier: remove ad-hoc clock enabling for EHCI The MIO clock is enabled by default, and the STDMAC clock is enabled by the clk driver. The ad-hoc way to enable the clock is no longer needed. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/clk/clk-ld11.c | 6 ------ arch/arm/mach-uniphier/clk/clk-ld4.c | 3 --- arch/arm/mach-uniphier/clk/clk-pro4.c | 3 --- arch/arm/mach-uniphier/sc-regs.h | 3 --- 4 files changed, 15 deletions(-) diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c index ec5fa7b..e997acf 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld11.c +++ b/arch/arm/mach-uniphier/clk/clk-ld11.c @@ -34,14 +34,8 @@ void uniphier_ld11_clk_init(void) #ifdef CONFIG_USB_EHCI_HCD { - /* FIXME: the current clk driver can not handle parents */ - u32 tmp; int ch; - tmp = readl(SC_CLKCTRL4); - tmp |= BIT(10) | BIT(8); /* MIO, STDMAC */ - writel(tmp, SC_CLKCTRL4); - for (ch = 0; ch < 3; ch++) { void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL; diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c index d90fef0..9c88cde 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-ld4.c @@ -24,9 +24,6 @@ void uniphier_ld4_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_EHCI_HCD - tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index e73bf38..32d44c0 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -39,9 +39,6 @@ void uniphier_pro4_clk_init(void) tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif -#ifdef CONFIG_USB_EHCI_HCD - tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h index c5c054e..b105335 100644 --- a/arch/arm/mach-uniphier/sc-regs.h +++ b/arch/arm/mach-uniphier/sc-regs.h @@ -42,7 +42,6 @@ #define SC_RSTCTRL_NRST_USB3B0 (0x1 << 17) /* USB3 #0 bus */ #define SC_RSTCTRL_NRST_USB3C0 (0x1 << 16) /* USB3 #0 core */ #define SC_RSTCTRL_NRST_ETHER (0x1 << 12) -#define SC_RSTCTRL_NRST_STDMAC (0x1 << 10) #define SC_RSTCTRL_NRST_GIO (0x1 << 6) /* Pro4 or older */ #define SC_RSTCTRL_NRST_UMC1 (0x1 << 5) @@ -73,8 +72,6 @@ #define SC_CLKCTRL_CEN_USB31 (0x1 << 17) /* USB3 #1 */ #define SC_CLKCTRL_CEN_USB30 (0x1 << 16) /* USB3 #0 */ #define SC_CLKCTRL_CEN_ETHER (0x1 << 12) -#define SC_CLKCTRL_CEN_MIO (0x1 << 11) -#define SC_CLKCTRL_CEN_STDMAC (0x1 << 10) #define SC_CLKCTRL_CEN_GIO (0x1 << 6) /* Pro4 or older */ #define SC_CLKCTRL_CEN_UMC (0x1 << 4)