Your ROOT_URL in app.ini is https://src.whiteboxsystems.nl/ but you are visiting http://src.whiteboxsystems.nl/Whitebox/u-boot/commit/d3f8752ed60cbd18022aee0afb7784754c125170
You should set ROOT_URL correctly, otherwise the web may not work correctly.
12 changed files with
0 additions and
147 deletions
arch/arm/dts/tegra20.dtsi
arch/arm/dts/tegra30.dtsi
board/avionic-design/dts/tegra20-medcom-wide.dts
board/avionic-design/dts/tegra20-plutux.dts
board/avionic-design/dts/tegra20-tec.dts
board/compal/dts/tegra20-paz00.dts
board/compulab/dts/tegra20-trimslice.dts
board/nvidia/dts/tegra20-harmony.dts
board/nvidia/dts/tegra20-seaboard.dts
board/nvidia/dts/tegra20-ventana.dts
board/nvidia/dts/tegra20-whistler.dts
board/nvidia/dts/tegra30-cardhu.dts
@ -10,16 +10,6 @@
#clock-cells = <1>;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
osc: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
};
};
intc: interrupt-controller@50041000 {
compatible = "nvidia,tegra20-gic";
interrupt-controller;
@ -9,16 +9,6 @@
#clock-cells = <1>;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
osc: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
};
};
i2c@7000c000 {
#address-cells = <1>;
#size-cells = <0>;
@ -14,16 +14,6 @@
reg = <0x00000000 0x20000000>;
};
clocks {
clk_32k: clk_32k {
clock-frequency = <32000>;
};
osc {
clock-frequency = <12000000>;
};
};
host1x {
status = "okay";
@ -37,10 +27,6 @@
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006300 {
clock-frequency = <216000000>;
};
@ -14,20 +14,6 @@
reg = <0x00000000 0x20000000>;
};
clocks {
clk_32k: clk_32k {
clock-frequency = <32000>;
};
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006300 {
clock-frequency = <216000000>;
};
@ -14,16 +14,6 @@
reg = <0x00000000 0x20000000>;
};
clocks {
clk_32k: clk_32k {
clock-frequency = <32000>;
};
osc {
clock-frequency = <12000000>;
};
};
host1x {
status = "okay";
@ -37,10 +27,6 @@
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006300 {
clock-frequency = <216000000>;
};
@ -14,19 +14,6 @@
reg = <0x00000000 0x20000000>;
};
clocks {
clk_32k: clk_32k {
clock-frequency = <32000>;
};
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006000 {
clock-frequency = < 216000000 >;
};
@ -15,19 +15,6 @@
reg = <0x00000000 0x40000000>;
};
clocks {
clk_32k: clk_32k {
clock-frequency = <32000>;
};
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006000 {
clock-frequency = <216000000>;
};
@ -15,19 +15,6 @@
reg = <0x00000000 0x40000000>;
};
clocks {
clk_32k: clk_32k {
clock-frequency = <32000>;
};
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
@ -45,16 +45,6 @@
};
};
clocks {
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
@ -14,19 +14,6 @@
reg = <0x00000000 0x40000000>;
};
clocks {
clk_32k: clk_32k {
clock-frequency = <32000>;
};
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006300 {
clock-frequency = < 216000000 >;
};
@ -16,16 +16,6 @@
reg = < 0x00000000 0x20000000 >;
};
clocks {
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
serial@70006000 {
clock-frequency = < 216000000 >;
};
@ -20,19 +20,6 @@
reg = <0x80000000 0x40000000>;
};
clocks {
clk_32k: clk_32K {
clock-frequency = <32768>;
};
osc {
clock-frequency = <12000000>;
};
};
clock@60006000 {
clocks = <&clk_32k &osc>;
};
i2c@7000c000 {
clock-frequency = <100000>;
};