powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mk

Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk
because all target boards with mpc85xx cpu define it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
master
Masahiro Yamada 11 years ago committed by Tom Rini
parent 52de0e49df
commit d40ddae4b3
  1. 2
      arch/powerpc/cpu/mpc85xx/config.mk
  2. 1
      include/configs/B4860QDS.h
  3. 1
      include/configs/BSC9131RDB.h
  4. 1
      include/configs/BSC9132QDS.h
  5. 1
      include/configs/C29XPCIE.h
  6. 1
      include/configs/HWW1U1A.h
  7. 1
      include/configs/MPC8536DS.h
  8. 1
      include/configs/MPC8540ADS.h
  9. 1
      include/configs/MPC8541CDS.h
  10. 1
      include/configs/MPC8544DS.h
  11. 1
      include/configs/MPC8548CDS.h
  12. 1
      include/configs/MPC8555CDS.h
  13. 1
      include/configs/MPC8560ADS.h
  14. 1
      include/configs/MPC8568MDS.h
  15. 1
      include/configs/MPC8569MDS.h
  16. 1
      include/configs/MPC8572DS.h
  17. 1
      include/configs/P1010RDB.h
  18. 1
      include/configs/P1022DS.h
  19. 1
      include/configs/P1023RDB.h
  20. 1
      include/configs/P1023RDS.h
  21. 1
      include/configs/P1_P2_RDB.h
  22. 1
      include/configs/P2020COME.h
  23. 1
      include/configs/P2020DS.h
  24. 1
      include/configs/P2041RDB.h
  25. 1
      include/configs/T1040QDS.h
  26. 1
      include/configs/T1040RDB.h
  27. 1
      include/configs/T1042RDB_PI.h
  28. 1
      include/configs/T2080QDS.h
  29. 1
      include/configs/controlcenterd.h
  30. 1
      include/configs/corenet_ds.h
  31. 1
      include/configs/km/kmp204x-common.h
  32. 1
      include/configs/p1_p2_rdb_pc.h
  33. 1
      include/configs/p1_twr.h
  34. 1
      include/configs/sbc8548.h
  35. 1
      include/configs/socrates.h
  36. 1
      include/configs/stxgp3.h
  37. 1
      include/configs/stxssa.h
  38. 1
      include/configs/t4qds.h
  39. 1
      include/configs/xpedite520x.h
  40. 1
      include/configs/xpedite537x.h
  41. 1
      include/configs/xpedite550x.h

@ -5,7 +5,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
PLATFORM_CPPFLAGS += -Wa,-me500 -msoft-float -mno-string
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx -Wa,-me500 -msoft-float -mno-string
# -mspe=yes is needed to have -mno-spe accepted by a buggy GCC;
# see "[PATCH,rs6000] make -mno-spe work as expected" on

@ -34,7 +34,6 @@
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
#define CONFIG_MP /* support multiple processors */
#ifndef CONFIG_SYS_TEXT_BASE

@ -55,7 +55,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_MPC85xx /* MPC8540/60/55/41/48/P1020/P2020/P1010,etc*/
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_LAW /* Use common FSL init code */

@ -71,7 +71,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_MPC85xx
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */

@ -87,7 +87,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_MPC85xx
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */

@ -13,7 +13,6 @@
/* High-level system configuration options */
#define CONFIG_BOOKE /* Power/PowerPC Book-E */
#define CONFIG_E500 /* e500 (Power ISA v2.03 with SPE) */
#define CONFIG_MPC85xx /* MPC8540/60/55/41/48 family */
#define CONFIG_FSL_ELBC /* FreeScale Enhanced LocalBus Cntlr */
#define CONFIG_FSL_LAW /* FreeScale Local Access Window */
#define CONFIG_P2020 /* FreeScale P2020 */

@ -56,7 +56,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_MPC8536 1
#define CONFIG_MPC8536DS 1

@ -21,7 +21,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_MPC8540 1 /* MPC8540 specific */
#define CONFIG_MPC8540ADS 1 /* MPC8540ADS board specific */

@ -16,7 +16,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_MPC8541 1 /* MPC8541 specific */
#define CONFIG_MPC8541CDS 1 /* MPC8541CDS board specific */

@ -14,7 +14,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_MPC8544 1
#define CONFIG_MPC8544DS 1

@ -20,7 +20,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_MPC8548CDS 1 /* MPC8548CDS board specific */

@ -16,7 +16,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_MPC8555 1 /* MPC8555 specific */
#define CONFIG_MPC8555CDS 1 /* MPC8555CDS board specific */

@ -21,7 +21,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_MPC8560ADS 1 /* MPC8560ADS board specific */
#define CONFIG_MPC8560 1

@ -13,7 +13,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/68 */
#define CONFIG_MPC8568 1 /* MPC8568 specific */
#define CONFIG_MPC8568MDS 1 /* MPC8568MDS board specific */

@ -13,7 +13,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/68 */
#define CONFIG_MPC8569 1 /* MPC8569 specific */
#define CONFIG_MPC8569MDS 1 /* MPC8569MDS board specific */

@ -44,7 +44,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_MPC8572 1
#define CONFIG_MPC8572DS 1
#define CONFIG_MP 1 /* support multiple processors */

@ -77,7 +77,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_MPC85xx
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */

@ -122,7 +122,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_MPC85xx /* MPC8540/60/55/41/48 */
#define CONFIG_P1022
#define CONFIG_P1022DS
#define CONFIG_MP /* support multiple processors */

@ -25,7 +25,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_MPC85xx
#define CONFIG_P1023
#define CONFIG_MP /* support multiple processors */

@ -46,7 +46,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_MPC85xx
#define CONFIG_P1023
#define CONFIG_P1023RDS
#define CONFIG_MP /* support multiple processors */

@ -70,7 +70,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/P1020/P2020,etc*/
#define CONFIG_FSL_ELBC 1 /* Enable eLBC Support */
#define CONFIG_PCI 1 /* Enable PCI/PCIE */

@ -29,7 +29,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/P1020/P2020,etc*/
#define CONFIG_P2020 1
#define CONFIG_P2020COME 1
#define CONFIG_FSL_ELBC 1 /* Enable eLBC Support */

@ -34,7 +34,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_P2020 1
#define CONFIG_P2020DS 1
#define CONFIG_MP 1 /* support multiple processors */

@ -37,7 +37,6 @@
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
#define CONFIG_MP /* support multiple processors */
#ifndef CONFIG_SYS_TEXT_BASE

@ -41,7 +41,6 @@
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
#define CONFIG_MP /* support multiple processors */
#ifndef CONFIG_SYS_TEXT_BASE

@ -40,7 +40,6 @@
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
#define CONFIG_MP /* support multiple processors */
#ifndef CONFIG_SYS_TEXT_BASE

@ -40,7 +40,6 @@
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
#define CONFIG_MP /* support multiple processors */
#ifndef CONFIG_SYS_TEXT_BASE

@ -27,7 +27,6 @@
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
#define CONFIG_MP /* support multiple processors */
#define CONFIG_ENABLE_36BIT_PHYS

@ -41,7 +41,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE /* BOOKE */
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_MPC85xx /* MPC8540/60/55/41/48 */
#define CONFIG_P1022
#define CONFIG_CONTROLCENTERD
#define CONFIG_MP /* support multiple processors */

@ -45,7 +45,6 @@
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
#define CONFIG_MP /* support multiple processors */
#ifndef CONFIG_SYS_TEXT_BASE

@ -32,7 +32,6 @@
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_MP /* support multiple processors */

@ -265,7 +265,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE
#define CONFIG_E500
#define CONFIG_MPC85xx
#define CONFIG_MP

@ -42,7 +42,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE
#define CONFIG_E500
#define CONFIG_MPC85xx
#define CONFIG_MP

@ -38,7 +38,6 @@
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_SBC8548 1 /* SBC8548 board specific */

@ -25,7 +25,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */
#define CONFIG_MPC8544 1
#define CONFIG_SOCRATES 1

@ -22,7 +22,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_STXGP3 1 /* Silicon Tx GPPP board specific*/
#define CONFIG_MPC8560 1

@ -22,7 +22,6 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/MPC8560 */
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/
#define CONFIG_MPC8560 1

@ -17,7 +17,6 @@
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */
#define CONFIG_MP /* support multiple processors */
#ifndef CONFIG_SYS_TEXT_BASE

@ -16,7 +16,6 @@
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_MPC8548 1
#define CONFIG_XPEDITE5200 1
#define CONFIG_SYS_BOARD_NAME "XPedite5200"

@ -16,7 +16,6 @@
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_MPC8572 1
#define CONFIG_XPEDITE5370 1
#define CONFIG_SYS_BOARD_NAME "XPedite5370"

@ -16,7 +16,6 @@
*/
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48 */
#define CONFIG_P2020 1
#define CONFIG_XPEDITE550X 1
#define CONFIG_SYS_BOARD_NAME "XPedite5500"

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