bcm2836 SoC support (used in Raspberry Pi 2 model B)

The bcm2835 and bcm2836 are essentially identical, except:
- The CPU is an ARM1176 v.s. a quad-core Cortex-A7.
- The physical address of many IO controllers has moved.

Rather than introducing a whole new bcm2836 value for $(SOC) or $(ARCH),
update the existing bcm2835 code to handle the minor differences, and
plumb it into the ARMv7 CPU architecture.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
master
Stephen Warren 9 years ago committed by Tom Rini
parent a033171b2e
commit db75356f14
  1. 1
      arch/arm/cpu/armv7/Makefile
  2. 13
      arch/arm/cpu/armv7/bcm2835/Makefile
  3. 5
      arch/arm/include/asm/arch-bcm2835/gpio.h
  4. 6
      arch/arm/include/asm/arch-bcm2835/mbox.h
  5. 6
      arch/arm/include/asm/arch-bcm2835/sdhci.h
  6. 6
      arch/arm/include/asm/arch-bcm2835/timer.h
  7. 6
      arch/arm/include/asm/arch-bcm2835/wdog.h

@ -39,6 +39,7 @@ endif
obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/
obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/
obj-$(CONFIG_BCM2835) += bcm2835/
obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/
obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/

@ -0,0 +1,13 @@
#
# (C) Copyright 2012 Stephen Warren
#
# SPDX-License-Identifier: GPL-2.0+
#
src_dir := ../../arm1176/bcm2835/
obj-y :=
obj-y += $(src_dir)/init.o
obj-y += $(src_dir)/reset.o
obj-y += $(src_dir)/timer.o
obj-y += $(src_dir)/mbox.o

@ -1,6 +1,7 @@
/*
* Copyright (C) 2012 Vikram Narayananan
* <vikram186@gmail.com>
* (C) Copyright 2012,2015 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -8,7 +9,11 @@
#ifndef _BCM2835_GPIO_H_
#define _BCM2835_GPIO_H_
#ifdef CONFIG_BCM2836
#define BCM2835_GPIO_BASE 0x3f200000
#else
#define BCM2835_GPIO_BASE 0x20200000
#endif
#define BCM2835_GPIO_COUNT 54
#define BCM2835_GPIO_FSEL_MASK 0x7

@ -1,5 +1,5 @@
/*
* (C) Copyright 2012 Stephen Warren
* (C) Copyright 2012,2015 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -38,7 +38,11 @@
/* Raw mailbox HW */
#ifdef CONFIG_BCM2836
#define BCM2835_MBOX_PHYSADDR 0x3f00b880
#else
#define BCM2835_MBOX_PHYSADDR 0x2000b880
#endif
struct bcm2835_mbox_regs {
u32 read;

@ -1,5 +1,5 @@
/*
* (C) Copyright 2012 Stephen Warren
* (C) Copyright 2012,2015 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0
*/
@ -7,7 +7,11 @@
#ifndef _BCM2835_SDHCI_H_
#define _BCM2835_SDHCI_H_
#ifdef CONFIG_BCM2836
#define BCM2835_SDHCI_BASE 0x3f300000
#else
#define BCM2835_SDHCI_BASE 0x20300000
#endif
int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq);

@ -1,5 +1,5 @@
/*
* (C) Copyright 2012 Stephen Warren
* (C) Copyright 2012,2015 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0
*/
@ -7,7 +7,11 @@
#ifndef _BCM2835_TIMER_H
#define _BCM2835_TIMER_H
#ifdef CONFIG_BCM2836
#define BCM2835_TIMER_PHYSADDR 0x3f003000
#else
#define BCM2835_TIMER_PHYSADDR 0x20003000
#endif
struct bcm2835_timer_regs {
u32 cs;

@ -1,5 +1,5 @@
/*
* (C) Copyright 2012 Stephen Warren
* (C) Copyright 2012,2015 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0
*/
@ -7,7 +7,11 @@
#ifndef _BCM2835_TIMER_H
#define _BCM2835_TIMER_H
#ifdef CONFIG_BCM2836
#define BCM2835_WDOG_PHYSADDR 0x3f100000
#else
#define BCM2835_WDOG_PHYSADDR 0x20100000
#endif
struct bcm2835_wdog_regs {
u32 unknown0[7];

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